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tensor: Increase numSourceId to 16 to match RadianceTile

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Hansung Kim
2024-10-22 17:08:38 -07:00
parent 8818fc9203
commit 54ce0f7c34
1 changed files with 4 additions and 4 deletions
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8
src/main/scala/radiance/core/TensorCoreDecoupled.scala
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@@ -573,20 +573,20 @@ class FillBuffer[T <: Data](
// wraps TensorCoreDecoupled with a TileLink client node for use in a Diplomacy // wraps TensorCoreDecoupled with a TileLink client node for use in a Diplomacy
// graph. // graph.
class TensorCoreDecoupledTL(implicit p: Parameters) extends LazyModule { class TensorCoreDecoupledTL(implicit p: Parameters) extends LazyModule {
val numSrcIds = 4 val numSourceIds = 16
// node with two edges; one for A and one for B matrix // node with two edges; one for A and one for B matrix
val node = TLClientNode(Seq( val node = TLClientNode(Seq(
TLMasterPortParameters.v2( TLMasterPortParameters.v2(
Seq(TLMasterParameters.v2( Seq(TLMasterParameters.v2(
name = "TensorCoreDecoupledMatrixANode", name = "TensorCoreDecoupledMatrixANode",
sourceId = IdRange(0, numSrcIds) sourceId = IdRange(0, numSourceIds)
)) ))
), ),
TLMasterPortParameters.v2( TLMasterPortParameters.v2(
Seq(TLMasterParameters.v2( Seq(TLMasterParameters.v2(
name = "TensorCoreDecoupledMatrixBNode", name = "TensorCoreDecoupledMatrixBNode",
sourceId = IdRange(0, numSrcIds) sourceId = IdRange(0, numSourceIds)
)) ))
) )
)) ))
@@ -599,7 +599,7 @@ class TensorCoreDecoupledTLImp(outer: TensorCoreDecoupledTL)
require(outer.node.out.length == 2/*A and B*/) require(outer.node.out.length == 2/*A and B*/)
val tensor = Module(new TensorCoreDecoupled( val tensor = Module(new TensorCoreDecoupled(
8, 8, outer.numSrcIds , TensorTilingParams())) 8, 8, outer.numSourceIds , TensorTilingParams()))
val wordSize = 4 // @cleanup: hardcoded val wordSize = 4 // @cleanup: hardcoded
val zip = Seq((outer.node.out(0), tensor.io.reqA), val zip = Seq((outer.node.out(0), tensor.io.reqA),