From 01efe02e8b7ad37c382378d81d248a024861ddbf Mon Sep 17 00:00:00 2001
From: felsabbagh3 <felsabbagh3@gatech.edu>
Date: Fri, 25 Oct 2019 03:03:09 -0400
Subject: [PATCH] CACHE WORKING just needs lb/sb

---
 kernel/vortex_test.dump          | 3334 +++++++++++++++---------------
 kernel/vortex_test.elf           |  Bin 15636 -> 15724 bytes
 kernel/vortex_test.hex           |  794 ++++---
 kernel/vx_main.c                 |   17 +-
 kernel/vx_os/vx_back/vx_back.s   |   54 +-
 kernel/vx_os/vx_io/vx_io.c       |   31 +-
 rtl/Makefile                     |    8 +-
 rtl/VX_back_end.v                |    7 +-
 rtl/VX_dmem_controller.v         |    7 +-
 rtl/VX_lsu.v                     |   35 +-
 rtl/VX_priority_encoder_w_mask.v |    7 +-
 rtl/VX_writeback.v               |   16 +-
 rtl/Vortex.v                     |   19 +-
 rtl/cache/VX_Cache_Bank.v        |    9 +-
 rtl/cache/VX_cache_bank_valid.v  |   17 +-
 rtl/cache/VX_d_cache.v           |   48 +-
 rtl/results.txt                  |    7 +
 rtl/simulate/test_bench.cpp      |    2 +-
 rtl/simulate/test_bench.h        |  248 +--
 19 files changed, 2302 insertions(+), 2358 deletions(-)

diff --git a/kernel/vortex_test.dump b/kernel/vortex_test.dump
index 5960dff2..4b0a7877 100644
--- a/kernel/vortex_test.dump
+++ b/kernel/vortex_test.dump
@@ -5,1707 +5,1669 @@ vortex_test.elf:     file format elf32-littleriscv
 Disassembly of section .text:
 
 80000000 <_start>:
-80000000:	00020537          	lui	a0,0x20
-80000004:	00700593          	li	a1,7
-80000008:	00b52223          	sw	a1,4(a0) # 20004 <SIZE+0x1ffd2>
-8000000c:	00000013          	nop
-80000010:	00000013          	nop
-80000014:	00000013          	nop
-80000018:	00452603          	lw	a2,4(a0)
-8000001c:	00000513          	li	a0,0
-80000020:	0005006b          	0x5006b
+80000000:	7ffff137          	lui	sp,0x7ffff
+80000004:	041010ef          	jal	ra,80001844 <main>
+80000008:	00000513          	li	a0,0
+8000000c:	0005006b          	0x5006b
 
-80000024 <vx_createThreads>:
-80000024:	00068b93          	mv	s7,a3
-80000028:	00070d13          	mv	s10,a4
-8000002c:	00010f13          	mv	t5,sp
-80000030:	00050393          	mv	t2,a0
+80000010 <vx_createThreads>:
+80000010:	00068b93          	mv	s7,a3
+80000014:	00070d13          	mv	s10,a4
+80000018:	00010f13          	mv	t5,sp
+8000001c:	00050393          	mv	t2,a0
 
-80000034 <loop_init>:
-80000034:	00100513          	li	a0,1
+80000020 <loop_init>:
+80000020:	00100513          	li	a0,1
 
-80000038 <loop_cond>:
-80000038:	00755c63          	bge	a0,t2,80000050 <loop_done>
+80000024 <loop_cond>:
+80000024:	00755c63          	bge	a0,t2,8000003c <loop_done>
 
-8000003c <loop_body>:
-8000003c:	80010113          	addi	sp,sp,-2048
-80000040:	00050313          	mv	t1,a0
-80000044:	0003506b          	0x3506b
+80000028 <loop_body>:
+80000028:	80010113          	addi	sp,sp,-2048 # 7fffe800 <SIZE+0x7fffe7ce>
+8000002c:	00050313          	mv	t1,a0
+80000030:	0003506b          	0x3506b
 
-80000048 <loop_inc>:
-80000048:	00150513          	addi	a0,a0,1
-8000004c:	fedff06f          	j	80000038 <loop_cond>
+80000034 <loop_inc>:
+80000034:	00150513          	addi	a0,a0,1
+80000038:	fedff06f          	j	80000024 <loop_cond>
 
-80000050 <loop_done>:
+8000003c <loop_done>:
+8000003c:	00000013          	nop
+80000040:	00000013          	nop
+80000044:	00000013          	nop
+80000048:	00000013          	nop
+8000004c:	00000013          	nop
 80000050:	00000013          	nop
-80000054:	00000013          	nop
-80000058:	00000013          	nop
-8000005c:	00000013          	nop
-80000060:	00000013          	nop
+80000054:	000f0113          	mv	sp,t5
+80000058:	00000513          	li	a0,0
+8000005c:	00060f93          	mv	t6,a2
+80000060:	00038d93          	mv	s11,t2
 80000064:	00000013          	nop
-80000068:	000f0113          	mv	sp,t5
-8000006c:	00000513          	li	a0,0
-80000070:	00060f93          	mv	t6,a2
-80000074:	00038d93          	mv	s11,t2
+80000068:	00000013          	nop
+8000006c:	00000013          	nop
+80000070:	00000013          	nop
+80000074:	00000013          	nop
 80000078:	00000013          	nop
 8000007c:	00000013          	nop
 80000080:	00000013          	nop
-80000084:	00000013          	nop
+80000084:	01bfe0eb          	0x1bfe0eb
 80000088:	00000013          	nop
 8000008c:	00000013          	nop
 80000090:	00000013          	nop
 80000094:	00000013          	nop
-80000098:	01bfe0eb          	0x1bfe0eb
+80000098:	00000013          	nop
 8000009c:	00000013          	nop
-800000a0:	00000013          	nop
-800000a4:	00000013          	nop
-800000a8:	00000013          	nop
-800000ac:	00000013          	nop
-800000b0:	00000013          	nop
-800000b4:	00000517          	auipc	a0,0x0
-800000b8:	1b450513          	addi	a0,a0,436 # 80000268 <vx_reschedule_warps>
-800000bc:	0005406b          	0x5406b
+800000a0:	00000517          	auipc	a0,0x0
+800000a4:	1b450513          	addi	a0,a0,436 # 80000254 <vx_reschedule_warps>
+800000a8:	0005406b          	0x5406b
 
-800000c0 <vx_wspawn>:
-800000c0:	00000317          	auipc	t1,0x0
-800000c4:	f6430313          	addi	t1,t1,-156 # 80000024 <vx_createThreads>
-800000c8:	0003006b          	0x3006b
-800000cc:	00008067          	ret
+800000ac <vx_wspawn>:
+800000ac:	00000317          	auipc	t1,0x0
+800000b0:	f6430313          	addi	t1,t1,-156 # 80000010 <vx_createThreads>
+800000b4:	0003006b          	0x3006b
+800000b8:	00008067          	ret
 
-800000d0 <vx_save_context>:
-800000d0:	01000217          	auipc	tp,0x1000
-800000d4:	24020213          	addi	tp,tp,576 # 81000310 <context>
-800000d8:	00022023          	sw	zero,0(tp) # 0 <A_WARPS-0x7>
-800000dc:	00122223          	sw	ra,4(tp) # 4 <A_WARPS-0x3>
-800000e0:	00222423          	sw	sp,8(tp) # 8 <A_WARPS+0x1>
-800000e4:	00322623          	sw	gp,12(tp) # c <A_WARPS+0x5>
-800000e8:	00422823          	sw	tp,16(tp) # 10 <A_WARPS+0x9>
-800000ec:	00522a23          	sw	t0,20(tp) # 14 <A_WARPS+0xd>
-800000f0:	00622c23          	sw	t1,24(tp) # 18 <A_WARPS+0x11>
-800000f4:	00722e23          	sw	t2,28(tp) # 1c <A_WARPS+0x15>
-800000f8:	02822023          	sw	s0,32(tp) # 20 <A_WARPS+0x19>
-800000fc:	02922223          	sw	s1,36(tp) # 24 <A_WARPS+0x1d>
-80000100:	02a22423          	sw	a0,40(tp) # 28 <A_WARPS+0x21>
-80000104:	02b22623          	sw	a1,44(tp) # 2c <A_WARPS+0x25>
-80000108:	02c22823          	sw	a2,48(tp) # 30 <A_WARPS+0x29>
-8000010c:	02d22a23          	sw	a3,52(tp) # 34 <SIZE+0x2>
-80000110:	02e22c23          	sw	a4,56(tp) # 38 <SIZE+0x6>
-80000114:	02f22e23          	sw	a5,60(tp) # 3c <SIZE+0xa>
-80000118:	05022023          	sw	a6,64(tp) # 40 <SIZE+0xe>
-8000011c:	05122223          	sw	a7,68(tp) # 44 <SIZE+0x12>
-80000120:	05222423          	sw	s2,72(tp) # 48 <SIZE+0x16>
-80000124:	05322623          	sw	s3,76(tp) # 4c <SIZE+0x1a>
-80000128:	05422823          	sw	s4,80(tp) # 50 <SIZE+0x1e>
-8000012c:	05522a23          	sw	s5,84(tp) # 54 <SIZE+0x22>
-80000130:	05622c23          	sw	s6,88(tp) # 58 <SIZE+0x26>
-80000134:	05722e23          	sw	s7,92(tp) # 5c <SIZE+0x2a>
-80000138:	07822023          	sw	s8,96(tp) # 60 <SIZE+0x2e>
-8000013c:	07922223          	sw	s9,100(tp) # 64 <SIZE+0x32>
-80000140:	07a22423          	sw	s10,104(tp) # 68 <SIZE+0x36>
-80000144:	07b22623          	sw	s11,108(tp) # 6c <SIZE+0x3a>
-80000148:	07c22823          	sw	t3,112(tp) # 70 <SIZE+0x3e>
-8000014c:	07d22a23          	sw	t4,116(tp) # 74 <SIZE+0x42>
-80000150:	07e22c23          	sw	t5,120(tp) # 78 <SIZE+0x46>
-80000154:	07f22e23          	sw	t6,124(tp) # 7c <SIZE+0x4a>
-80000158:	00100213          	li	tp,1
-8000015c:	00008067          	ret
+800000bc <vx_save_context>:
+800000bc:	01000217          	auipc	tp,0x1000
+800000c0:	25820213          	addi	tp,tp,600 # 81000314 <context>
+800000c4:	00022023          	sw	zero,0(tp) # 0 <A_WARPS-0x7>
+800000c8:	00122223          	sw	ra,4(tp) # 4 <A_WARPS-0x3>
+800000cc:	00222423          	sw	sp,8(tp) # 8 <A_WARPS+0x1>
+800000d0:	00322623          	sw	gp,12(tp) # c <A_WARPS+0x5>
+800000d4:	00422823          	sw	tp,16(tp) # 10 <A_WARPS+0x9>
+800000d8:	00522a23          	sw	t0,20(tp) # 14 <A_WARPS+0xd>
+800000dc:	00622c23          	sw	t1,24(tp) # 18 <A_WARPS+0x11>
+800000e0:	00722e23          	sw	t2,28(tp) # 1c <A_WARPS+0x15>
+800000e4:	02822023          	sw	s0,32(tp) # 20 <A_WARPS+0x19>
+800000e8:	02922223          	sw	s1,36(tp) # 24 <A_WARPS+0x1d>
+800000ec:	02a22423          	sw	a0,40(tp) # 28 <A_WARPS+0x21>
+800000f0:	02b22623          	sw	a1,44(tp) # 2c <A_WARPS+0x25>
+800000f4:	02c22823          	sw	a2,48(tp) # 30 <A_WARPS+0x29>
+800000f8:	02d22a23          	sw	a3,52(tp) # 34 <SIZE+0x2>
+800000fc:	02e22c23          	sw	a4,56(tp) # 38 <SIZE+0x6>
+80000100:	02f22e23          	sw	a5,60(tp) # 3c <SIZE+0xa>
+80000104:	05022023          	sw	a6,64(tp) # 40 <SIZE+0xe>
+80000108:	05122223          	sw	a7,68(tp) # 44 <SIZE+0x12>
+8000010c:	05222423          	sw	s2,72(tp) # 48 <SIZE+0x16>
+80000110:	05322623          	sw	s3,76(tp) # 4c <SIZE+0x1a>
+80000114:	05422823          	sw	s4,80(tp) # 50 <SIZE+0x1e>
+80000118:	05522a23          	sw	s5,84(tp) # 54 <SIZE+0x22>
+8000011c:	05622c23          	sw	s6,88(tp) # 58 <SIZE+0x26>
+80000120:	05722e23          	sw	s7,92(tp) # 5c <SIZE+0x2a>
+80000124:	07822023          	sw	s8,96(tp) # 60 <SIZE+0x2e>
+80000128:	07922223          	sw	s9,100(tp) # 64 <SIZE+0x32>
+8000012c:	07a22423          	sw	s10,104(tp) # 68 <SIZE+0x36>
+80000130:	07b22623          	sw	s11,108(tp) # 6c <SIZE+0x3a>
+80000134:	07c22823          	sw	t3,112(tp) # 70 <SIZE+0x3e>
+80000138:	07d22a23          	sw	t4,116(tp) # 74 <SIZE+0x42>
+8000013c:	07e22c23          	sw	t5,120(tp) # 78 <SIZE+0x46>
+80000140:	07f22e23          	sw	t6,124(tp) # 7c <SIZE+0x4a>
+80000144:	00100213          	li	tp,1
+80000148:	00008067          	ret
 
-80000160 <vx_load_context>:
-80000160:	01000217          	auipc	tp,0x1000
-80000164:	1b020213          	addi	tp,tp,432 # 81000310 <context>
-80000168:	00022003          	lw	zero,0(tp) # 0 <A_WARPS-0x7>
-8000016c:	00422083          	lw	ra,4(tp) # 4 <A_WARPS-0x3>
-80000170:	00822103          	lw	sp,8(tp) # 8 <A_WARPS+0x1>
-80000174:	00c22183          	lw	gp,12(tp) # c <A_WARPS+0x5>
-80000178:	01022203          	lw	tp,16(tp) # 10 <A_WARPS+0x9>
-8000017c:	01422283          	lw	t0,20(tp) # 14 <A_WARPS+0xd>
-80000180:	01822303          	lw	t1,24(tp) # 18 <A_WARPS+0x11>
-80000184:	01c22383          	lw	t2,28(tp) # 1c <A_WARPS+0x15>
-80000188:	02022403          	lw	s0,32(tp) # 20 <A_WARPS+0x19>
-8000018c:	02422483          	lw	s1,36(tp) # 24 <A_WARPS+0x1d>
-80000190:	02822503          	lw	a0,40(tp) # 28 <A_WARPS+0x21>
-80000194:	02c22583          	lw	a1,44(tp) # 2c <A_WARPS+0x25>
-80000198:	03022603          	lw	a2,48(tp) # 30 <A_WARPS+0x29>
-8000019c:	03422683          	lw	a3,52(tp) # 34 <SIZE+0x2>
-800001a0:	03822703          	lw	a4,56(tp) # 38 <SIZE+0x6>
-800001a4:	03c22783          	lw	a5,60(tp) # 3c <SIZE+0xa>
-800001a8:	04022803          	lw	a6,64(tp) # 40 <SIZE+0xe>
-800001ac:	04422883          	lw	a7,68(tp) # 44 <SIZE+0x12>
-800001b0:	04822903          	lw	s2,72(tp) # 48 <SIZE+0x16>
-800001b4:	04c22983          	lw	s3,76(tp) # 4c <SIZE+0x1a>
-800001b8:	05022a03          	lw	s4,80(tp) # 50 <SIZE+0x1e>
-800001bc:	05422a83          	lw	s5,84(tp) # 54 <SIZE+0x22>
-800001c0:	05822b03          	lw	s6,88(tp) # 58 <SIZE+0x26>
-800001c4:	05c22b83          	lw	s7,92(tp) # 5c <SIZE+0x2a>
-800001c8:	06022c03          	lw	s8,96(tp) # 60 <SIZE+0x2e>
-800001cc:	06422c83          	lw	s9,100(tp) # 64 <SIZE+0x32>
-800001d0:	06822d03          	lw	s10,104(tp) # 68 <SIZE+0x36>
-800001d4:	06c22d83          	lw	s11,108(tp) # 6c <SIZE+0x3a>
-800001d8:	07022e03          	lw	t3,112(tp) # 70 <SIZE+0x3e>
-800001dc:	07422e83          	lw	t4,116(tp) # 74 <SIZE+0x42>
-800001e0:	07822f03          	lw	t5,120(tp) # 78 <SIZE+0x46>
-800001e4:	07c22f83          	lw	t6,124(tp) # 7c <SIZE+0x4a>
-800001e8:	00000213          	li	tp,0
-800001ec:	00008067          	ret
+8000014c <vx_load_context>:
+8000014c:	01000217          	auipc	tp,0x1000
+80000150:	1c820213          	addi	tp,tp,456 # 81000314 <context>
+80000154:	00022003          	lw	zero,0(tp) # 0 <A_WARPS-0x7>
+80000158:	00422083          	lw	ra,4(tp) # 4 <A_WARPS-0x3>
+8000015c:	00822103          	lw	sp,8(tp) # 8 <A_WARPS+0x1>
+80000160:	00c22183          	lw	gp,12(tp) # c <A_WARPS+0x5>
+80000164:	01022203          	lw	tp,16(tp) # 10 <A_WARPS+0x9>
+80000168:	01422283          	lw	t0,20(tp) # 14 <A_WARPS+0xd>
+8000016c:	01822303          	lw	t1,24(tp) # 18 <A_WARPS+0x11>
+80000170:	01c22383          	lw	t2,28(tp) # 1c <A_WARPS+0x15>
+80000174:	02022403          	lw	s0,32(tp) # 20 <A_WARPS+0x19>
+80000178:	02422483          	lw	s1,36(tp) # 24 <A_WARPS+0x1d>
+8000017c:	02822503          	lw	a0,40(tp) # 28 <A_WARPS+0x21>
+80000180:	02c22583          	lw	a1,44(tp) # 2c <A_WARPS+0x25>
+80000184:	03022603          	lw	a2,48(tp) # 30 <A_WARPS+0x29>
+80000188:	03422683          	lw	a3,52(tp) # 34 <SIZE+0x2>
+8000018c:	03822703          	lw	a4,56(tp) # 38 <SIZE+0x6>
+80000190:	03c22783          	lw	a5,60(tp) # 3c <SIZE+0xa>
+80000194:	04022803          	lw	a6,64(tp) # 40 <SIZE+0xe>
+80000198:	04422883          	lw	a7,68(tp) # 44 <SIZE+0x12>
+8000019c:	04822903          	lw	s2,72(tp) # 48 <SIZE+0x16>
+800001a0:	04c22983          	lw	s3,76(tp) # 4c <SIZE+0x1a>
+800001a4:	05022a03          	lw	s4,80(tp) # 50 <SIZE+0x1e>
+800001a8:	05422a83          	lw	s5,84(tp) # 54 <SIZE+0x22>
+800001ac:	05822b03          	lw	s6,88(tp) # 58 <SIZE+0x26>
+800001b0:	05c22b83          	lw	s7,92(tp) # 5c <SIZE+0x2a>
+800001b4:	06022c03          	lw	s8,96(tp) # 60 <SIZE+0x2e>
+800001b8:	06422c83          	lw	s9,100(tp) # 64 <SIZE+0x32>
+800001bc:	06822d03          	lw	s10,104(tp) # 68 <SIZE+0x36>
+800001c0:	06c22d83          	lw	s11,108(tp) # 6c <SIZE+0x3a>
+800001c4:	07022e03          	lw	t3,112(tp) # 70 <SIZE+0x3e>
+800001c8:	07422e83          	lw	t4,116(tp) # 74 <SIZE+0x42>
+800001cc:	07822f03          	lw	t5,120(tp) # 78 <SIZE+0x46>
+800001d0:	07c22f83          	lw	t6,124(tp) # 7c <SIZE+0x4a>
+800001d4:	00000213          	li	tp,0
+800001d8:	00008067          	ret
 
-800001f0 <vx_available_warps>:
-800001f0:	02002573          	csrr	a0,0x20
-800001f4:	00008067          	ret
+800001dc <vx_available_warps>:
+800001dc:	02002573          	csrr	a0,0x20
+800001e0:	00008067          	ret
 
-800001f8 <vx_available_threads>:
-800001f8:	02102573          	csrr	a0,0x21
-800001fc:	00008067          	ret
+800001e4 <vx_available_threads>:
+800001e4:	02102573          	csrr	a0,0x21
+800001e8:	00008067          	ret
 
-80000200 <vx_before_main>:
-80000200:	fe010113          	addi	sp,sp,-32
-80000204:	00112e23          	sw	ra,28(sp)
-80000208:	00812c23          	sw	s0,24(sp)
-8000020c:	02010413          	addi	s0,sp,32
-80000210:	fe042623          	sw	zero,-20(s0)
-80000214:	0340006f          	j	80000248 <vx_before_main+0x48>
-80000218:	fec42703          	lw	a4,-20(s0)
-8000021c:	000017b7          	lui	a5,0x1
-80000220:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
-80000224:	02f70733          	mul	a4,a4,a5
-80000228:	810007b7          	lui	a5,0x81000
-8000022c:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
-80000230:	00f707b3          	add	a5,a4,a5
-80000234:	00078513          	mv	a0,a5
-80000238:	440000ef          	jal	ra,80000678 <queue_initialize>
-8000023c:	fec42783          	lw	a5,-20(s0)
-80000240:	00178793          	addi	a5,a5,1
-80000244:	fef42623          	sw	a5,-20(s0)
-80000248:	fec42703          	lw	a4,-20(s0)
-8000024c:	01f00793          	li	a5,31
-80000250:	fce7d4e3          	bge	a5,a4,80000218 <vx_before_main+0x18>
-80000254:	00000013          	nop
-80000258:	01c12083          	lw	ra,28(sp)
-8000025c:	01812403          	lw	s0,24(sp)
-80000260:	02010113          	addi	sp,sp,32
-80000264:	00008067          	ret
+800001ec <vx_before_main>:
+800001ec:	fe010113          	addi	sp,sp,-32
+800001f0:	00112e23          	sw	ra,28(sp)
+800001f4:	00812c23          	sw	s0,24(sp)
+800001f8:	02010413          	addi	s0,sp,32
+800001fc:	fe042623          	sw	zero,-20(s0)
+80000200:	0340006f          	j	80000234 <vx_before_main+0x48>
+80000204:	fec42703          	lw	a4,-20(s0)
+80000208:	000017b7          	lui	a5,0x1
+8000020c:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
+80000210:	02f70733          	mul	a4,a4,a5
+80000214:	810007b7          	lui	a5,0x81000
+80000218:	41478793          	addi	a5,a5,1044 # 81000414 <barrier_bool+0xfffd714c>
+8000021c:	00f707b3          	add	a5,a4,a5
+80000220:	00078513          	mv	a0,a5
+80000224:	440000ef          	jal	ra,80000664 <queue_initialize>
+80000228:	fec42783          	lw	a5,-20(s0)
+8000022c:	00178793          	addi	a5,a5,1
+80000230:	fef42623          	sw	a5,-20(s0)
+80000234:	fec42703          	lw	a4,-20(s0)
+80000238:	01f00793          	li	a5,31
+8000023c:	fce7d4e3          	bge	a5,a4,80000204 <vx_before_main+0x18>
+80000240:	00000013          	nop
+80000244:	01c12083          	lw	ra,28(sp)
+80000248:	01812403          	lw	s0,24(sp)
+8000024c:	02010113          	addi	sp,sp,32
+80000250:	00008067          	ret
 
-80000268 <vx_reschedule_warps>:
-80000268:	fd010113          	addi	sp,sp,-48
-8000026c:	02112623          	sw	ra,44(sp)
-80000270:	02812423          	sw	s0,40(sp)
-80000274:	03a12223          	sw	s10,36(sp)
-80000278:	03010413          	addi	s0,sp,48
-8000027c:	00000013          	nop
-80000280:	000d0713          	mv	a4,s10
-80000284:	000017b7          	lui	a5,0x1
-80000288:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
-8000028c:	02f70733          	mul	a4,a4,a5
-80000290:	810007b7          	lui	a5,0x81000
-80000294:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
-80000298:	00f707b3          	add	a5,a4,a5
-8000029c:	00078513          	mv	a0,a5
-800002a0:	504000ef          	jal	ra,800007a4 <queue_isEmpty>
-800002a4:	00050793          	mv	a5,a0
-800002a8:	02078a63          	beqz	a5,800002dc <vx_reschedule_warps+0x74>
-800002ac:	000d0713          	mv	a4,s10
-800002b0:	810007b7          	lui	a5,0x81000
-800002b4:	00271713          	slli	a4,a4,0x2
-800002b8:	26878793          	addi	a5,a5,616 # 81000268 <barrier_bool+0xfffd6fa4>
-800002bc:	00f707b3          	add	a5,a4,a5
-800002c0:	00100713          	li	a4,1
-800002c4:	00e7a023          	sw	a4,0(a5)
-800002c8:	000d0793          	mv	a5,s10
-800002cc:	00079663          	bnez	a5,800002d8 <vx_reschedule_warps+0x70>
-800002d0:	e91ff0ef          	jal	ra,80000160 <vx_load_context>
-800002d4:	05c0006f          	j	80000330 <vx_reschedule_warps+0xc8>
-800002d8:	00000073          	ecall
-800002dc:	000d0713          	mv	a4,s10
-800002e0:	000017b7          	lui	a5,0x1
-800002e4:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
-800002e8:	02f70733          	mul	a4,a4,a5
-800002ec:	810007b7          	lui	a5,0x81000
-800002f0:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
-800002f4:	00f707b3          	add	a5,a4,a5
-800002f8:	fd840713          	addi	a4,s0,-40
-800002fc:	00070593          	mv	a1,a4
-80000300:	00078513          	mv	a0,a5
-80000304:	400000ef          	jal	ra,80000704 <queue_dequeue>
-80000308:	fe042783          	lw	a5,-32(s0)
-8000030c:	00078113          	mv	sp,a5
-80000310:	fdc42783          	lw	a5,-36(s0)
-80000314:	fd842583          	lw	a1,-40(s0)
-80000318:	fe442603          	lw	a2,-28(s0)
-8000031c:	fe842683          	lw	a3,-24(s0)
-80000320:	fec42703          	lw	a4,-20(s0)
-80000324:	00078513          	mv	a0,a5
-80000328:	cfdff0ef          	jal	ra,80000024 <vx_createThreads>
-8000032c:	00000073          	ecall
-80000330:	02c12083          	lw	ra,44(sp)
-80000334:	02812403          	lw	s0,40(sp)
-80000338:	02412d03          	lw	s10,36(sp)
-8000033c:	03010113          	addi	sp,sp,48
-80000340:	00008067          	ret
+80000254 <vx_reschedule_warps>:
+80000254:	fd010113          	addi	sp,sp,-48
+80000258:	02112623          	sw	ra,44(sp)
+8000025c:	02812423          	sw	s0,40(sp)
+80000260:	03a12223          	sw	s10,36(sp)
+80000264:	03010413          	addi	s0,sp,48
+80000268:	00000013          	nop
+8000026c:	000d0713          	mv	a4,s10
+80000270:	000017b7          	lui	a5,0x1
+80000274:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
+80000278:	02f70733          	mul	a4,a4,a5
+8000027c:	810007b7          	lui	a5,0x81000
+80000280:	41478793          	addi	a5,a5,1044 # 81000414 <barrier_bool+0xfffd714c>
+80000284:	00f707b3          	add	a5,a4,a5
+80000288:	00078513          	mv	a0,a5
+8000028c:	504000ef          	jal	ra,80000790 <queue_isEmpty>
+80000290:	00050793          	mv	a5,a0
+80000294:	02078a63          	beqz	a5,800002c8 <vx_reschedule_warps+0x74>
+80000298:	000d0713          	mv	a4,s10
+8000029c:	810007b7          	lui	a5,0x81000
+800002a0:	00271713          	slli	a4,a4,0x2
+800002a4:	26c78793          	addi	a5,a5,620 # 8100026c <barrier_bool+0xfffd6fa4>
+800002a8:	00f707b3          	add	a5,a4,a5
+800002ac:	00100713          	li	a4,1
+800002b0:	00e7a023          	sw	a4,0(a5)
+800002b4:	000d0793          	mv	a5,s10
+800002b8:	00079663          	bnez	a5,800002c4 <vx_reschedule_warps+0x70>
+800002bc:	e91ff0ef          	jal	ra,8000014c <vx_load_context>
+800002c0:	05c0006f          	j	8000031c <vx_reschedule_warps+0xc8>
+800002c4:	00000073          	ecall
+800002c8:	000d0713          	mv	a4,s10
+800002cc:	000017b7          	lui	a5,0x1
+800002d0:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
+800002d4:	02f70733          	mul	a4,a4,a5
+800002d8:	810007b7          	lui	a5,0x81000
+800002dc:	41478793          	addi	a5,a5,1044 # 81000414 <barrier_bool+0xfffd714c>
+800002e0:	00f707b3          	add	a5,a4,a5
+800002e4:	fd840713          	addi	a4,s0,-40
+800002e8:	00070593          	mv	a1,a4
+800002ec:	00078513          	mv	a0,a5
+800002f0:	400000ef          	jal	ra,800006f0 <queue_dequeue>
+800002f4:	fe042783          	lw	a5,-32(s0)
+800002f8:	00078113          	mv	sp,a5
+800002fc:	fdc42783          	lw	a5,-36(s0)
+80000300:	fd842583          	lw	a1,-40(s0)
+80000304:	fe442603          	lw	a2,-28(s0)
+80000308:	fe842683          	lw	a3,-24(s0)
+8000030c:	fec42703          	lw	a4,-20(s0)
+80000310:	00078513          	mv	a0,a5
+80000314:	cfdff0ef          	jal	ra,80000010 <vx_createThreads>
+80000318:	00000073          	ecall
+8000031c:	02c12083          	lw	ra,44(sp)
+80000320:	02812403          	lw	s0,40(sp)
+80000324:	02412d03          	lw	s10,36(sp)
+80000328:	03010113          	addi	sp,sp,48
+8000032c:	00008067          	ret
 
-80000344 <vx_schedule_warps>:
-80000344:	fb010113          	addi	sp,sp,-80
-80000348:	04112623          	sw	ra,76(sp)
-8000034c:	04812423          	sw	s0,72(sp)
-80000350:	05010413          	addi	s0,sp,80
-80000354:	e9dff0ef          	jal	ra,800001f0 <vx_available_warps>
-80000358:	fea42423          	sw	a0,-24(s0)
-8000035c:	00010993          	mv	s3,sp
-80000360:	00100793          	li	a5,1
-80000364:	fef42623          	sw	a5,-20(s0)
-80000368:	08c0006f          	j	800003f4 <vx_schedule_warps+0xb0>
-8000036c:	fec42703          	lw	a4,-20(s0)
-80000370:	000017b7          	lui	a5,0x1
-80000374:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
-80000378:	02f70733          	mul	a4,a4,a5
-8000037c:	810007b7          	lui	a5,0x81000
-80000380:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
-80000384:	00f707b3          	add	a5,a4,a5
-80000388:	00078513          	mv	a0,a5
-8000038c:	418000ef          	jal	ra,800007a4 <queue_isEmpty>
-80000390:	00050793          	mv	a5,a0
-80000394:	04079a63          	bnez	a5,800003e8 <vx_schedule_warps+0xa4>
-80000398:	fec42703          	lw	a4,-20(s0)
-8000039c:	000017b7          	lui	a5,0x1
-800003a0:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
-800003a4:	02f70733          	mul	a4,a4,a5
-800003a8:	810007b7          	lui	a5,0x81000
-800003ac:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
-800003b0:	00f707b3          	add	a5,a4,a5
-800003b4:	fd040713          	addi	a4,s0,-48
-800003b8:	00070593          	mv	a1,a4
-800003bc:	00078513          	mv	a0,a5
-800003c0:	344000ef          	jal	ra,80000704 <queue_dequeue>
-800003c4:	fd842783          	lw	a5,-40(s0)
-800003c8:	00078113          	mv	sp,a5
-800003cc:	fd442783          	lw	a5,-44(s0)
-800003d0:	fd042583          	lw	a1,-48(s0)
-800003d4:	fdc42603          	lw	a2,-36(s0)
-800003d8:	fe042683          	lw	a3,-32(s0)
-800003dc:	fe442703          	lw	a4,-28(s0)
-800003e0:	00078513          	mv	a0,a5
-800003e4:	cddff0ef          	jal	ra,800000c0 <vx_wspawn>
-800003e8:	fec42783          	lw	a5,-20(s0)
-800003ec:	00178793          	addi	a5,a5,1
-800003f0:	fef42623          	sw	a5,-20(s0)
-800003f4:	fec42783          	lw	a5,-20(s0)
-800003f8:	fe842703          	lw	a4,-24(s0)
-800003fc:	f6e7e8e3          	bltu	a5,a4,8000036c <vx_schedule_warps+0x28>
-80000400:	00098113          	mv	sp,s3
-80000404:	ccdff0ef          	jal	ra,800000d0 <vx_save_context>
-80000408:	00020793          	mv	a5,tp
-8000040c:	04078863          	beqz	a5,8000045c <vx_schedule_warps+0x118>
-80000410:	810007b7          	lui	a5,0x81000
-80000414:	41078513          	addi	a0,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
-80000418:	38c000ef          	jal	ra,800007a4 <queue_isEmpty>
-8000041c:	00050793          	mv	a5,a0
-80000420:	02079e63          	bnez	a5,8000045c <vx_schedule_warps+0x118>
-80000424:	fb840793          	addi	a5,s0,-72
-80000428:	00078593          	mv	a1,a5
-8000042c:	810007b7          	lui	a5,0x81000
-80000430:	41078513          	addi	a0,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
-80000434:	2d0000ef          	jal	ra,80000704 <queue_dequeue>
-80000438:	fc042783          	lw	a5,-64(s0)
-8000043c:	00078113          	mv	sp,a5
-80000440:	fbc42783          	lw	a5,-68(s0)
-80000444:	fb842583          	lw	a1,-72(s0)
-80000448:	fc442603          	lw	a2,-60(s0)
-8000044c:	fc842683          	lw	a3,-56(s0)
-80000450:	fcc42703          	lw	a4,-52(s0)
-80000454:	00078513          	mv	a0,a5
-80000458:	bcdff0ef          	jal	ra,80000024 <vx_createThreads>
-8000045c:	00000013          	nop
-80000460:	04c12083          	lw	ra,76(sp)
-80000464:	04812403          	lw	s0,72(sp)
-80000468:	05010113          	addi	sp,sp,80
-8000046c:	00008067          	ret
+80000330 <vx_schedule_warps>:
+80000330:	fb010113          	addi	sp,sp,-80
+80000334:	04112623          	sw	ra,76(sp)
+80000338:	04812423          	sw	s0,72(sp)
+8000033c:	05010413          	addi	s0,sp,80
+80000340:	e9dff0ef          	jal	ra,800001dc <vx_available_warps>
+80000344:	fea42423          	sw	a0,-24(s0)
+80000348:	00010993          	mv	s3,sp
+8000034c:	00100793          	li	a5,1
+80000350:	fef42623          	sw	a5,-20(s0)
+80000354:	08c0006f          	j	800003e0 <vx_schedule_warps+0xb0>
+80000358:	fec42703          	lw	a4,-20(s0)
+8000035c:	000017b7          	lui	a5,0x1
+80000360:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
+80000364:	02f70733          	mul	a4,a4,a5
+80000368:	810007b7          	lui	a5,0x81000
+8000036c:	41478793          	addi	a5,a5,1044 # 81000414 <barrier_bool+0xfffd714c>
+80000370:	00f707b3          	add	a5,a4,a5
+80000374:	00078513          	mv	a0,a5
+80000378:	418000ef          	jal	ra,80000790 <queue_isEmpty>
+8000037c:	00050793          	mv	a5,a0
+80000380:	04079a63          	bnez	a5,800003d4 <vx_schedule_warps+0xa4>
+80000384:	fec42703          	lw	a4,-20(s0)
+80000388:	000017b7          	lui	a5,0x1
+8000038c:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
+80000390:	02f70733          	mul	a4,a4,a5
+80000394:	810007b7          	lui	a5,0x81000
+80000398:	41478793          	addi	a5,a5,1044 # 81000414 <barrier_bool+0xfffd714c>
+8000039c:	00f707b3          	add	a5,a4,a5
+800003a0:	fd040713          	addi	a4,s0,-48
+800003a4:	00070593          	mv	a1,a4
+800003a8:	00078513          	mv	a0,a5
+800003ac:	344000ef          	jal	ra,800006f0 <queue_dequeue>
+800003b0:	fd842783          	lw	a5,-40(s0)
+800003b4:	00078113          	mv	sp,a5
+800003b8:	fd442783          	lw	a5,-44(s0)
+800003bc:	fd042583          	lw	a1,-48(s0)
+800003c0:	fdc42603          	lw	a2,-36(s0)
+800003c4:	fe042683          	lw	a3,-32(s0)
+800003c8:	fe442703          	lw	a4,-28(s0)
+800003cc:	00078513          	mv	a0,a5
+800003d0:	cddff0ef          	jal	ra,800000ac <vx_wspawn>
+800003d4:	fec42783          	lw	a5,-20(s0)
+800003d8:	00178793          	addi	a5,a5,1
+800003dc:	fef42623          	sw	a5,-20(s0)
+800003e0:	fec42783          	lw	a5,-20(s0)
+800003e4:	fe842703          	lw	a4,-24(s0)
+800003e8:	f6e7e8e3          	bltu	a5,a4,80000358 <vx_schedule_warps+0x28>
+800003ec:	00098113          	mv	sp,s3
+800003f0:	ccdff0ef          	jal	ra,800000bc <vx_save_context>
+800003f4:	00020793          	mv	a5,tp
+800003f8:	04078863          	beqz	a5,80000448 <vx_schedule_warps+0x118>
+800003fc:	810007b7          	lui	a5,0x81000
+80000400:	41478513          	addi	a0,a5,1044 # 81000414 <barrier_bool+0xfffd714c>
+80000404:	38c000ef          	jal	ra,80000790 <queue_isEmpty>
+80000408:	00050793          	mv	a5,a0
+8000040c:	02079e63          	bnez	a5,80000448 <vx_schedule_warps+0x118>
+80000410:	fb840793          	addi	a5,s0,-72
+80000414:	00078593          	mv	a1,a5
+80000418:	810007b7          	lui	a5,0x81000
+8000041c:	41478513          	addi	a0,a5,1044 # 81000414 <barrier_bool+0xfffd714c>
+80000420:	2d0000ef          	jal	ra,800006f0 <queue_dequeue>
+80000424:	fc042783          	lw	a5,-64(s0)
+80000428:	00078113          	mv	sp,a5
+8000042c:	fbc42783          	lw	a5,-68(s0)
+80000430:	fb842583          	lw	a1,-72(s0)
+80000434:	fc442603          	lw	a2,-60(s0)
+80000438:	fc842683          	lw	a3,-56(s0)
+8000043c:	fcc42703          	lw	a4,-52(s0)
+80000440:	00078513          	mv	a0,a5
+80000444:	bcdff0ef          	jal	ra,80000010 <vx_createThreads>
+80000448:	00000013          	nop
+8000044c:	04c12083          	lw	ra,76(sp)
+80000450:	04812403          	lw	s0,72(sp)
+80000454:	05010113          	addi	sp,sp,80
+80000458:	00008067          	ret
 
-80000470 <vx_spawnWarps>:
-80000470:	fb010113          	addi	sp,sp,-80
-80000474:	04112623          	sw	ra,76(sp)
-80000478:	04812423          	sw	s0,72(sp)
-8000047c:	05010413          	addi	s0,sp,80
-80000480:	faa42e23          	sw	a0,-68(s0)
-80000484:	fab42c23          	sw	a1,-72(s0)
-80000488:	fac42a23          	sw	a2,-76(s0)
-8000048c:	fad42823          	sw	a3,-80(s0)
-80000490:	d71ff0ef          	jal	ra,80000200 <vx_before_main>
-80000494:	d5dff0ef          	jal	ra,800001f0 <vx_available_warps>
-80000498:	fea42223          	sw	a0,-28(s0)
-8000049c:	00010913          	mv	s2,sp
-800004a0:	fe042623          	sw	zero,-20(s0)
-800004a4:	fe042423          	sw	zero,-24(s0)
-800004a8:	0900006f          	j	80000538 <vx_spawnWarps+0xc8>
-800004ac:	ffff09b7          	lui	s3,0xffff0
-800004b0:	01310133          	add	sp,sp,s3
-800004b4:	fe842783          	lw	a5,-24(s0)
-800004b8:	fcf42623          	sw	a5,-52(s0)
-800004bc:	fb842783          	lw	a5,-72(s0)
-800004c0:	fcf42823          	sw	a5,-48(s0)
-800004c4:	00010793          	mv	a5,sp
-800004c8:	fcf42a23          	sw	a5,-44(s0)
-800004cc:	fb442783          	lw	a5,-76(s0)
-800004d0:	fcf42c23          	sw	a5,-40(s0)
-800004d4:	fb042783          	lw	a5,-80(s0)
-800004d8:	fcf42e23          	sw	a5,-36(s0)
-800004dc:	fec42783          	lw	a5,-20(s0)
-800004e0:	fef42023          	sw	a5,-32(s0)
-800004e4:	fec42703          	lw	a4,-20(s0)
-800004e8:	000017b7          	lui	a5,0x1
-800004ec:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
-800004f0:	02f70733          	mul	a4,a4,a5
-800004f4:	810007b7          	lui	a5,0x81000
-800004f8:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
-800004fc:	00f707b3          	add	a5,a4,a5
-80000500:	fcc40713          	addi	a4,s0,-52
-80000504:	00070593          	mv	a1,a4
-80000508:	00078513          	mv	a0,a5
-8000050c:	190000ef          	jal	ra,8000069c <queue_enqueue>
-80000510:	fec42783          	lw	a5,-20(s0)
-80000514:	00178793          	addi	a5,a5,1
-80000518:	fef42623          	sw	a5,-20(s0)
-8000051c:	fec42783          	lw	a5,-20(s0)
-80000520:	fe442703          	lw	a4,-28(s0)
-80000524:	00e7e463          	bltu	a5,a4,8000052c <vx_spawnWarps+0xbc>
-80000528:	fe042623          	sw	zero,-20(s0)
-8000052c:	fe842783          	lw	a5,-24(s0)
-80000530:	00178793          	addi	a5,a5,1
-80000534:	fef42423          	sw	a5,-24(s0)
-80000538:	fe842703          	lw	a4,-24(s0)
-8000053c:	fbc42783          	lw	a5,-68(s0)
-80000540:	f6f766e3          	bltu	a4,a5,800004ac <vx_spawnWarps+0x3c>
-80000544:	00090113          	mv	sp,s2
-80000548:	dfdff0ef          	jal	ra,80000344 <vx_schedule_warps>
-8000054c:	00000013          	nop
-80000550:	04c12083          	lw	ra,76(sp)
-80000554:	04812403          	lw	s0,72(sp)
-80000558:	05010113          	addi	sp,sp,80
-8000055c:	00008067          	ret
+8000045c <vx_spawnWarps>:
+8000045c:	fb010113          	addi	sp,sp,-80
+80000460:	04112623          	sw	ra,76(sp)
+80000464:	04812423          	sw	s0,72(sp)
+80000468:	05010413          	addi	s0,sp,80
+8000046c:	faa42e23          	sw	a0,-68(s0)
+80000470:	fab42c23          	sw	a1,-72(s0)
+80000474:	fac42a23          	sw	a2,-76(s0)
+80000478:	fad42823          	sw	a3,-80(s0)
+8000047c:	d71ff0ef          	jal	ra,800001ec <vx_before_main>
+80000480:	d5dff0ef          	jal	ra,800001dc <vx_available_warps>
+80000484:	fea42223          	sw	a0,-28(s0)
+80000488:	00010913          	mv	s2,sp
+8000048c:	fe042623          	sw	zero,-20(s0)
+80000490:	fe042423          	sw	zero,-24(s0)
+80000494:	0900006f          	j	80000524 <vx_spawnWarps+0xc8>
+80000498:	ffff09b7          	lui	s3,0xffff0
+8000049c:	01310133          	add	sp,sp,s3
+800004a0:	fe842783          	lw	a5,-24(s0)
+800004a4:	fcf42623          	sw	a5,-52(s0)
+800004a8:	fb842783          	lw	a5,-72(s0)
+800004ac:	fcf42823          	sw	a5,-48(s0)
+800004b0:	00010793          	mv	a5,sp
+800004b4:	fcf42a23          	sw	a5,-44(s0)
+800004b8:	fb442783          	lw	a5,-76(s0)
+800004bc:	fcf42c23          	sw	a5,-40(s0)
+800004c0:	fb042783          	lw	a5,-80(s0)
+800004c4:	fcf42e23          	sw	a5,-36(s0)
+800004c8:	fec42783          	lw	a5,-20(s0)
+800004cc:	fef42023          	sw	a5,-32(s0)
+800004d0:	fec42703          	lw	a4,-20(s0)
+800004d4:	000017b7          	lui	a5,0x1
+800004d8:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
+800004dc:	02f70733          	mul	a4,a4,a5
+800004e0:	810007b7          	lui	a5,0x81000
+800004e4:	41478793          	addi	a5,a5,1044 # 81000414 <barrier_bool+0xfffd714c>
+800004e8:	00f707b3          	add	a5,a4,a5
+800004ec:	fcc40713          	addi	a4,s0,-52
+800004f0:	00070593          	mv	a1,a4
+800004f4:	00078513          	mv	a0,a5
+800004f8:	190000ef          	jal	ra,80000688 <queue_enqueue>
+800004fc:	fec42783          	lw	a5,-20(s0)
+80000500:	00178793          	addi	a5,a5,1
+80000504:	fef42623          	sw	a5,-20(s0)
+80000508:	fec42783          	lw	a5,-20(s0)
+8000050c:	fe442703          	lw	a4,-28(s0)
+80000510:	00e7e463          	bltu	a5,a4,80000518 <vx_spawnWarps+0xbc>
+80000514:	fe042623          	sw	zero,-20(s0)
+80000518:	fe842783          	lw	a5,-24(s0)
+8000051c:	00178793          	addi	a5,a5,1
+80000520:	fef42423          	sw	a5,-24(s0)
+80000524:	fe842703          	lw	a4,-24(s0)
+80000528:	fbc42783          	lw	a5,-68(s0)
+8000052c:	f6f766e3          	bltu	a4,a5,80000498 <vx_spawnWarps+0x3c>
+80000530:	00090113          	mv	sp,s2
+80000534:	dfdff0ef          	jal	ra,80000330 <vx_schedule_warps>
+80000538:	00000013          	nop
+8000053c:	04c12083          	lw	ra,76(sp)
+80000540:	04812403          	lw	s0,72(sp)
+80000544:	05010113          	addi	sp,sp,80
+80000548:	00008067          	ret
 
-80000560 <vx_wait_for_warps>:
-80000560:	fd010113          	addi	sp,sp,-48
-80000564:	02112623          	sw	ra,44(sp)
-80000568:	02812423          	sw	s0,40(sp)
-8000056c:	03010413          	addi	s0,sp,48
-80000570:	fca42e23          	sw	a0,-36(s0)
-80000574:	fdc42583          	lw	a1,-36(s0)
-80000578:	810007b7          	lui	a5,0x81000
-8000057c:	04078513          	addi	a0,a5,64 # 81000040 <barrier_bool+0xfffd6d7c>
-80000580:	354000ef          	jal	ra,800008d4 <vx_printf>
-80000584:	c6dff0ef          	jal	ra,800001f0 <vx_available_warps>
-80000588:	fea42023          	sw	a0,-32(s0)
-8000058c:	fe042623          	sw	zero,-20(s0)
-80000590:	0680006f          	j	800005f8 <vx_wait_for_warps+0x98>
-80000594:	00100793          	li	a5,1
-80000598:	fef42623          	sw	a5,-20(s0)
-8000059c:	fe042423          	sw	zero,-24(s0)
-800005a0:	03c0006f          	j	800005dc <vx_wait_for_warps+0x7c>
-800005a4:	810007b7          	lui	a5,0x81000
-800005a8:	fe842703          	lw	a4,-24(s0)
-800005ac:	00271713          	slli	a4,a4,0x2
-800005b0:	26878793          	addi	a5,a5,616 # 81000268 <barrier_bool+0xfffd6fa4>
-800005b4:	00f707b3          	add	a5,a4,a5
-800005b8:	0007a703          	lw	a4,0(a5)
-800005bc:	00100793          	li	a5,1
-800005c0:	00f71863          	bne	a4,a5,800005d0 <vx_wait_for_warps+0x70>
-800005c4:	fec42783          	lw	a5,-20(s0)
-800005c8:	00178793          	addi	a5,a5,1
-800005cc:	fef42623          	sw	a5,-20(s0)
-800005d0:	fe842783          	lw	a5,-24(s0)
-800005d4:	00178793          	addi	a5,a5,1
-800005d8:	fef42423          	sw	a5,-24(s0)
-800005dc:	fe842703          	lw	a4,-24(s0)
-800005e0:	01f00793          	li	a5,31
-800005e4:	fce7d0e3          	bge	a5,a4,800005a4 <vx_wait_for_warps+0x44>
-800005e8:	fec42583          	lw	a1,-20(s0)
-800005ec:	810007b7          	lui	a5,0x81000
-800005f0:	04c78513          	addi	a0,a5,76 # 8100004c <barrier_bool+0xfffd6d88>
-800005f4:	2e0000ef          	jal	ra,800008d4 <vx_printf>
-800005f8:	fec42703          	lw	a4,-20(s0)
-800005fc:	fdc42783          	lw	a5,-36(s0)
-80000600:	f8f76ae3          	bltu	a4,a5,80000594 <vx_wait_for_warps+0x34>
-80000604:	fe042223          	sw	zero,-28(s0)
-80000608:	0280006f          	j	80000630 <vx_wait_for_warps+0xd0>
-8000060c:	810007b7          	lui	a5,0x81000
-80000610:	fe442703          	lw	a4,-28(s0)
-80000614:	00271713          	slli	a4,a4,0x2
-80000618:	26878793          	addi	a5,a5,616 # 81000268 <barrier_bool+0xfffd6fa4>
-8000061c:	00f707b3          	add	a5,a4,a5
-80000620:	0007a023          	sw	zero,0(a5)
-80000624:	fe442783          	lw	a5,-28(s0)
-80000628:	00178793          	addi	a5,a5,1
-8000062c:	fef42223          	sw	a5,-28(s0)
-80000630:	fe442783          	lw	a5,-28(s0)
-80000634:	fe042703          	lw	a4,-32(s0)
-80000638:	fce7eae3          	bltu	a5,a4,8000060c <vx_wait_for_warps+0xac>
-8000063c:	00000013          	nop
-80000640:	02c12083          	lw	ra,44(sp)
-80000644:	02812403          	lw	s0,40(sp)
-80000648:	03010113          	addi	sp,sp,48
-8000064c:	00008067          	ret
+8000054c <vx_wait_for_warps>:
+8000054c:	fd010113          	addi	sp,sp,-48
+80000550:	02112623          	sw	ra,44(sp)
+80000554:	02812423          	sw	s0,40(sp)
+80000558:	03010413          	addi	s0,sp,48
+8000055c:	fca42e23          	sw	a0,-36(s0)
+80000560:	fdc42583          	lw	a1,-36(s0)
+80000564:	810007b7          	lui	a5,0x81000
+80000568:	04078513          	addi	a0,a5,64 # 81000040 <barrier_bool+0xfffd6d78>
+8000056c:	2d8000ef          	jal	ra,80000844 <vx_printf>
+80000570:	c6dff0ef          	jal	ra,800001dc <vx_available_warps>
+80000574:	fea42023          	sw	a0,-32(s0)
+80000578:	fe042623          	sw	zero,-20(s0)
+8000057c:	0680006f          	j	800005e4 <vx_wait_for_warps+0x98>
+80000580:	00100793          	li	a5,1
+80000584:	fef42623          	sw	a5,-20(s0)
+80000588:	fe042423          	sw	zero,-24(s0)
+8000058c:	03c0006f          	j	800005c8 <vx_wait_for_warps+0x7c>
+80000590:	810007b7          	lui	a5,0x81000
+80000594:	fe842703          	lw	a4,-24(s0)
+80000598:	00271713          	slli	a4,a4,0x2
+8000059c:	26c78793          	addi	a5,a5,620 # 8100026c <barrier_bool+0xfffd6fa4>
+800005a0:	00f707b3          	add	a5,a4,a5
+800005a4:	0007a703          	lw	a4,0(a5)
+800005a8:	00100793          	li	a5,1
+800005ac:	00f71863          	bne	a4,a5,800005bc <vx_wait_for_warps+0x70>
+800005b0:	fec42783          	lw	a5,-20(s0)
+800005b4:	00178793          	addi	a5,a5,1
+800005b8:	fef42623          	sw	a5,-20(s0)
+800005bc:	fe842783          	lw	a5,-24(s0)
+800005c0:	00178793          	addi	a5,a5,1
+800005c4:	fef42423          	sw	a5,-24(s0)
+800005c8:	fe842703          	lw	a4,-24(s0)
+800005cc:	01f00793          	li	a5,31
+800005d0:	fce7d0e3          	bge	a5,a4,80000590 <vx_wait_for_warps+0x44>
+800005d4:	fec42583          	lw	a1,-20(s0)
+800005d8:	810007b7          	lui	a5,0x81000
+800005dc:	04c78513          	addi	a0,a5,76 # 8100004c <barrier_bool+0xfffd6d84>
+800005e0:	264000ef          	jal	ra,80000844 <vx_printf>
+800005e4:	fec42703          	lw	a4,-20(s0)
+800005e8:	fdc42783          	lw	a5,-36(s0)
+800005ec:	f8f76ae3          	bltu	a4,a5,80000580 <vx_wait_for_warps+0x34>
+800005f0:	fe042223          	sw	zero,-28(s0)
+800005f4:	0280006f          	j	8000061c <vx_wait_for_warps+0xd0>
+800005f8:	810007b7          	lui	a5,0x81000
+800005fc:	fe442703          	lw	a4,-28(s0)
+80000600:	00271713          	slli	a4,a4,0x2
+80000604:	26c78793          	addi	a5,a5,620 # 8100026c <barrier_bool+0xfffd6fa4>
+80000608:	00f707b3          	add	a5,a4,a5
+8000060c:	0007a023          	sw	zero,0(a5)
+80000610:	fe442783          	lw	a5,-28(s0)
+80000614:	00178793          	addi	a5,a5,1
+80000618:	fef42223          	sw	a5,-28(s0)
+8000061c:	fe442783          	lw	a5,-28(s0)
+80000620:	fe042703          	lw	a4,-32(s0)
+80000624:	fce7eae3          	bltu	a5,a4,800005f8 <vx_wait_for_warps+0xac>
+80000628:	00000013          	nop
+8000062c:	02c12083          	lw	ra,44(sp)
+80000630:	02812403          	lw	s0,40(sp)
+80000634:	03010113          	addi	sp,sp,48
+80000638:	00008067          	ret
 
-80000650 <vx_get_arg_struct>:
-80000650:	ff010113          	addi	sp,sp,-16
-80000654:	00812623          	sw	s0,12(sp)
-80000658:	01712423          	sw	s7,8(sp)
-8000065c:	01010413          	addi	s0,sp,16
-80000660:	000b8793          	mv	a5,s7
-80000664:	00078513          	mv	a0,a5
-80000668:	00c12403          	lw	s0,12(sp)
-8000066c:	00812b83          	lw	s7,8(sp)
-80000670:	01010113          	addi	sp,sp,16
-80000674:	00008067          	ret
+8000063c <vx_get_arg_struct>:
+8000063c:	ff010113          	addi	sp,sp,-16
+80000640:	00812623          	sw	s0,12(sp)
+80000644:	01712423          	sw	s7,8(sp)
+80000648:	01010413          	addi	s0,sp,16
+8000064c:	000b8793          	mv	a5,s7
+80000650:	00078513          	mv	a0,a5
+80000654:	00c12403          	lw	s0,12(sp)
+80000658:	00812b83          	lw	s7,8(sp)
+8000065c:	01010113          	addi	sp,sp,16
+80000660:	00008067          	ret
 
-80000678 <queue_initialize>:
-80000678:	00050293          	mv	t0,a0
-8000067c:	00000313          	li	t1,0
-80000680:	00700393          	li	t2,7
-80000684:	0062a023          	sw	t1,0(t0)
-80000688:	0062a223          	sw	t1,4(t0)
-8000068c:	0062a423          	sw	t1,8(t0)
-80000690:	0072a623          	sw	t2,12(t0)
-80000694:	0062a823          	sw	t1,16(t0)
-80000698:	00008067          	ret
+80000664 <queue_initialize>:
+80000664:	00050293          	mv	t0,a0
+80000668:	00000313          	li	t1,0
+8000066c:	00700393          	li	t2,7
+80000670:	0062a023          	sw	t1,0(t0)
+80000674:	0062a223          	sw	t1,4(t0)
+80000678:	0062a423          	sw	t1,8(t0)
+8000067c:	0072a623          	sw	t2,12(t0)
+80000680:	0062a823          	sw	t1,16(t0)
+80000684:	00008067          	ret
 
-8000069c <queue_enqueue>:
-8000069c:	00050293          	mv	t0,a0
-800006a0:	0082a303          	lw	t1,8(t0)
-800006a4:	00130313          	addi	t1,t1,1
-800006a8:	0062a423          	sw	t1,8(t0)
-800006ac:	01428313          	addi	t1,t0,20
-800006b0:	0042ae83          	lw	t4,4(t0)
-800006b4:	005e9393          	slli	t2,t4,0x5
-800006b8:	00730333          	add	t1,t1,t2
-800006bc:	0005ae03          	lw	t3,0(a1)
-800006c0:	01c32023          	sw	t3,0(t1)
-800006c4:	0045ae03          	lw	t3,4(a1)
-800006c8:	01c32223          	sw	t3,4(t1)
-800006cc:	0085ae03          	lw	t3,8(a1)
-800006d0:	01c32423          	sw	t3,8(t1)
-800006d4:	00c5ae03          	lw	t3,12(a1)
-800006d8:	01c32623          	sw	t3,12(t1)
-800006dc:	0105ae03          	lw	t3,16(a1)
-800006e0:	01c32823          	sw	t3,16(t1)
-800006e4:	0145ae03          	lw	t3,20(a1)
-800006e8:	01c32a23          	sw	t3,20(t1)
-800006ec:	001e8e93          	addi	t4,t4,1
-800006f0:	03200f13          	li	t5,50
-800006f4:	01ee9463          	bne	t4,t5,800006fc <ec>
-800006f8:	00000e93          	li	t4,0
+80000688 <queue_enqueue>:
+80000688:	00050293          	mv	t0,a0
+8000068c:	0082a303          	lw	t1,8(t0)
+80000690:	00130313          	addi	t1,t1,1
+80000694:	0062a423          	sw	t1,8(t0)
+80000698:	01428313          	addi	t1,t0,20
+8000069c:	0042ae83          	lw	t4,4(t0)
+800006a0:	005e9393          	slli	t2,t4,0x5
+800006a4:	00730333          	add	t1,t1,t2
+800006a8:	0005ae03          	lw	t3,0(a1)
+800006ac:	01c32023          	sw	t3,0(t1)
+800006b0:	0045ae03          	lw	t3,4(a1)
+800006b4:	01c32223          	sw	t3,4(t1)
+800006b8:	0085ae03          	lw	t3,8(a1)
+800006bc:	01c32423          	sw	t3,8(t1)
+800006c0:	00c5ae03          	lw	t3,12(a1)
+800006c4:	01c32623          	sw	t3,12(t1)
+800006c8:	0105ae03          	lw	t3,16(a1)
+800006cc:	01c32823          	sw	t3,16(t1)
+800006d0:	0145ae03          	lw	t3,20(a1)
+800006d4:	01c32a23          	sw	t3,20(t1)
+800006d8:	001e8e93          	addi	t4,t4,1
+800006dc:	03200f13          	li	t5,50
+800006e0:	01ee9463          	bne	t4,t5,800006e8 <ec>
+800006e4:	00000e93          	li	t4,0
 
-800006fc <ec>:
-800006fc:	01d2a223          	sw	t4,4(t0)
-80000700:	00008067          	ret
+800006e8 <ec>:
+800006e8:	01d2a223          	sw	t4,4(t0)
+800006ec:	00008067          	ret
 
-80000704 <queue_dequeue>:
-80000704:	00050293          	mv	t0,a0
-80000708:	0082a303          	lw	t1,8(t0)
+800006f0 <queue_dequeue>:
+800006f0:	00050293          	mv	t0,a0
+800006f4:	0082a303          	lw	t1,8(t0)
+800006f8:	00000013          	nop
+800006fc:	00000013          	nop
+80000700:	00000013          	nop
+80000704:	00000013          	nop
+80000708:	00000013          	nop
 8000070c:	00000013          	nop
-80000710:	00000013          	nop
-80000714:	00000013          	nop
-80000718:	00000013          	nop
-8000071c:	00000013          	nop
-80000720:	00000013          	nop
-80000724:	fff30313          	addi	t1,t1,-1
-80000728:	0062a423          	sw	t1,8(t0)
-8000072c:	01428313          	addi	t1,t0,20
-80000730:	0002ae83          	lw	t4,0(t0)
-80000734:	03200f93          	li	t6,50
-80000738:	000e8f13          	mv	t5,t4
-8000073c:	001f0f13          	addi	t5,t5,1
-80000740:	01ff1463          	bne	t5,t6,80000748 <dc>
-80000744:	00000f13          	li	t5,0
+80000710:	fff30313          	addi	t1,t1,-1
+80000714:	0062a423          	sw	t1,8(t0)
+80000718:	01428313          	addi	t1,t0,20
+8000071c:	0002ae83          	lw	t4,0(t0)
+80000720:	03200f93          	li	t6,50
+80000724:	000e8f13          	mv	t5,t4
+80000728:	001f0f13          	addi	t5,t5,1
+8000072c:	01ff1463          	bne	t5,t6,80000734 <dc>
+80000730:	00000f13          	li	t5,0
 
-80000748 <dc>:
-80000748:	01e2a023          	sw	t5,0(t0)
-8000074c:	005e9393          	slli	t2,t4,0x5
-80000750:	00730333          	add	t1,t1,t2
-80000754:	00032e03          	lw	t3,0(t1)
-80000758:	01c5a023          	sw	t3,0(a1)
-8000075c:	00432e03          	lw	t3,4(t1)
-80000760:	01c5a223          	sw	t3,4(a1)
-80000764:	00832e03          	lw	t3,8(t1)
-80000768:	01c5a423          	sw	t3,8(a1)
-8000076c:	00c32e03          	lw	t3,12(t1)
-80000770:	01c5a623          	sw	t3,12(a1)
-80000774:	01032e03          	lw	t3,16(t1)
-80000778:	01c5a823          	sw	t3,16(a1)
-8000077c:	01432e03          	lw	t3,20(t1)
-80000780:	01c5aa23          	sw	t3,20(a1)
-80000784:	00008067          	ret
+80000734 <dc>:
+80000734:	01e2a023          	sw	t5,0(t0)
+80000738:	005e9393          	slli	t2,t4,0x5
+8000073c:	00730333          	add	t1,t1,t2
+80000740:	00032e03          	lw	t3,0(t1)
+80000744:	01c5a023          	sw	t3,0(a1)
+80000748:	00432e03          	lw	t3,4(t1)
+8000074c:	01c5a223          	sw	t3,4(a1)
+80000750:	00832e03          	lw	t3,8(t1)
+80000754:	01c5a423          	sw	t3,8(a1)
+80000758:	00c32e03          	lw	t3,12(t1)
+8000075c:	01c5a623          	sw	t3,12(a1)
+80000760:	01032e03          	lw	t3,16(t1)
+80000764:	01c5a823          	sw	t3,16(a1)
+80000768:	01432e03          	lw	t3,20(t1)
+8000076c:	01c5aa23          	sw	t3,20(a1)
+80000770:	00008067          	ret
 
-80000788 <queue_isFull>:
-80000788:	00050293          	mv	t0,a0
-8000078c:	0082a303          	lw	t1,8(t0)
-80000790:	00000513          	li	a0,0
-80000794:	03200e13          	li	t3,50
-80000798:	006e1463          	bne	t3,t1,800007a0 <qf>
-8000079c:	00150513          	addi	a0,a0,1
+80000774 <queue_isFull>:
+80000774:	00050293          	mv	t0,a0
+80000778:	0082a303          	lw	t1,8(t0)
+8000077c:	00000513          	li	a0,0
+80000780:	03200e13          	li	t3,50
+80000784:	006e1463          	bne	t3,t1,8000078c <qf>
+80000788:	00150513          	addi	a0,a0,1
 
-800007a0 <qf>:
-800007a0:	00008067          	ret
+8000078c <qf>:
+8000078c:	00008067          	ret
 
-800007a4 <queue_isEmpty>:
-800007a4:	00050293          	mv	t0,a0
-800007a8:	0082a303          	lw	t1,8(t0)
-800007ac:	00000513          	li	a0,0
-800007b0:	00000e13          	li	t3,0
-800007b4:	006e1463          	bne	t3,t1,800007bc <qe>
-800007b8:	00150513          	addi	a0,a0,1
+80000790 <queue_isEmpty>:
+80000790:	00050293          	mv	t0,a0
+80000794:	0082a303          	lw	t1,8(t0)
+80000798:	00000513          	li	a0,0
+8000079c:	00000e13          	li	t3,0
+800007a0:	006e1463          	bne	t3,t1,800007a8 <qe>
+800007a4:	00150513          	addi	a0,a0,1
 
-800007bc <qe>:
+800007a8 <qe>:
+800007a8:	00008067          	ret
+
+800007ac <queue_availableWarps>:
+800007ac:	00050293          	mv	t0,a0
+800007b0:	00c2a303          	lw	t1,12(t0)
+800007b4:	0102a383          	lw	t2,16(t0)
+800007b8:	0063b533          	sltu	a0,t2,t1
 800007bc:	00008067          	ret
 
-800007c0 <queue_availableWarps>:
-800007c0:	00050293          	mv	t0,a0
-800007c4:	00c2a303          	lw	t1,12(t0)
-800007c8:	0102a383          	lw	t2,16(t0)
-800007cc:	0063b533          	sltu	a0,t2,t1
-800007d0:	00008067          	ret
+800007c0 <vx_print_str>:
+800007c0:	ff410113          	addi	sp,sp,-12
+800007c4:	00112023          	sw	ra,0(sp)
+800007c8:	00b12223          	sw	a1,4(sp)
 
-800007d4 <vx_print_str>:
-800007d4:	ff410113          	addi	sp,sp,-12
-800007d8:	00112023          	sw	ra,0(sp)
-800007dc:	00b12223          	sw	a1,4(sp)
+800007cc <bl>:
+800007cc:	00054583          	lbu	a1,0(a0)
+800007d0:	00058863          	beqz	a1,800007e0 <be>
+800007d4:	01c000ef          	jal	ra,800007f0 <vx_printc>
+800007d8:	00150513          	addi	a0,a0,1
+800007dc:	ff1ff06f          	j	800007cc <bl>
 
-800007e0 <bl>:
-800007e0:	00054583          	lbu	a1,0(a0)
-800007e4:	00058863          	beqz	a1,800007f4 <be>
-800007e8:	01c000ef          	jal	ra,80000804 <vx_printc>
-800007ec:	00150513          	addi	a0,a0,1
-800007f0:	ff1ff06f          	j	800007e0 <bl>
+800007e0 <be>:
+800007e0:	00012083          	lw	ra,0(sp)
+800007e4:	00412583          	lw	a1,4(sp)
+800007e8:	00c10113          	addi	sp,sp,12
+800007ec:	00008067          	ret
 
-800007f4 <be>:
-800007f4:	00012083          	lw	ra,0(sp)
-800007f8:	00412583          	lw	a1,4(sp)
-800007fc:	00c10113          	addi	sp,sp,12
-80000800:	00008067          	ret
+800007f0 <vx_printc>:
+800007f0:	000108b7          	lui	a7,0x10
+800007f4:	00b8a023          	sw	a1,0(a7) # 10000 <SIZE+0xffce>
+800007f8:	00008067          	ret
 
-80000804 <vx_printc>:
-80000804:	000108b7          	lui	a7,0x10
-80000808:	00b8a023          	sw	a1,0(a7) # 10000 <SIZE+0xffce>
-8000080c:	00008067          	ret
+800007fc <vx_print_hex>:
+800007fc:	fe010113          	addi	sp,sp,-32
+80000800:	00112e23          	sw	ra,28(sp)
+80000804:	00812c23          	sw	s0,24(sp)
+80000808:	02010413          	addi	s0,sp,32
+8000080c:	fea42623          	sw	a0,-20(s0)
+80000810:	810007b7          	lui	a5,0x81000
+80000814:	fec42703          	lw	a4,-20(s0)
+80000818:	00271713          	slli	a4,a4,0x2
+8000081c:	1a878793          	addi	a5,a5,424 # 810001a8 <barrier_bool+0xfffd6ee0>
+80000820:	00f707b3          	add	a5,a4,a5
+80000824:	0007a783          	lw	a5,0(a5)
+80000828:	00078513          	mv	a0,a5
+8000082c:	f95ff0ef          	jal	ra,800007c0 <vx_print_str>
+80000830:	00000013          	nop
+80000834:	01c12083          	lw	ra,28(sp)
+80000838:	01812403          	lw	s0,24(sp)
+8000083c:	02010113          	addi	sp,sp,32
+80000840:	00008067          	ret
 
-80000810 <vx_print_hex>:
-80000810:	fd010113          	addi	sp,sp,-48
-80000814:	02112623          	sw	ra,44(sp)
-80000818:	02812423          	sw	s0,40(sp)
-8000081c:	03010413          	addi	s0,sp,48
-80000820:	fca42e23          	sw	a0,-36(s0)
-80000824:	fdc42703          	lw	a4,-36(s0)
-80000828:	00f00793          	li	a5,15
-8000082c:	02e7e463          	bltu	a5,a4,80000854 <vx_print_hex+0x44>
-80000830:	810007b7          	lui	a5,0x81000
-80000834:	fdc42703          	lw	a4,-36(s0)
-80000838:	00271713          	slli	a4,a4,0x2
-8000083c:	1a878793          	addi	a5,a5,424 # 810001a8 <barrier_bool+0xfffd6ee4>
-80000840:	00f707b3          	add	a5,a4,a5
-80000844:	0007a783          	lw	a5,0(a5)
-80000848:	00078513          	mv	a0,a5
-8000084c:	f89ff0ef          	jal	ra,800007d4 <vx_print_str>
-80000850:	0740006f          	j	800008c4 <vx_print_hex+0xb4>
-80000854:	02000793          	li	a5,32
-80000858:	fef42623          	sw	a5,-20(s0)
-8000085c:	fe0405a3          	sb	zero,-21(s0)
-80000860:	fec42783          	lw	a5,-20(s0)
-80000864:	ffc78793          	addi	a5,a5,-4
-80000868:	fdc42703          	lw	a4,-36(s0)
-8000086c:	00f757b3          	srl	a5,a4,a5
-80000870:	00f7f793          	andi	a5,a5,15
-80000874:	fef42223          	sw	a5,-28(s0)
-80000878:	fe442783          	lw	a5,-28(s0)
-8000087c:	00078663          	beqz	a5,80000888 <vx_print_hex+0x78>
-80000880:	00100793          	li	a5,1
-80000884:	fef405a3          	sb	a5,-21(s0)
-80000888:	feb44783          	lbu	a5,-21(s0)
-8000088c:	02078263          	beqz	a5,800008b0 <vx_print_hex+0xa0>
-80000890:	810007b7          	lui	a5,0x81000
-80000894:	fe442703          	lw	a4,-28(s0)
-80000898:	00271713          	slli	a4,a4,0x2
-8000089c:	1a878793          	addi	a5,a5,424 # 810001a8 <barrier_bool+0xfffd6ee4>
-800008a0:	00f707b3          	add	a5,a4,a5
-800008a4:	0007a783          	lw	a5,0(a5)
-800008a8:	00078513          	mv	a0,a5
-800008ac:	f29ff0ef          	jal	ra,800007d4 <vx_print_str>
-800008b0:	fec42783          	lw	a5,-20(s0)
-800008b4:	ffc78793          	addi	a5,a5,-4
-800008b8:	fef42623          	sw	a5,-20(s0)
-800008bc:	fec42783          	lw	a5,-20(s0)
-800008c0:	faf040e3          	bgtz	a5,80000860 <vx_print_hex+0x50>
-800008c4:	02c12083          	lw	ra,44(sp)
-800008c8:	02812403          	lw	s0,40(sp)
-800008cc:	03010113          	addi	sp,sp,48
-800008d0:	00008067          	ret
+80000844 <vx_printf>:
+80000844:	fe010113          	addi	sp,sp,-32
+80000848:	00112e23          	sw	ra,28(sp)
+8000084c:	00812c23          	sw	s0,24(sp)
+80000850:	02010413          	addi	s0,sp,32
+80000854:	fea42623          	sw	a0,-20(s0)
+80000858:	feb42423          	sw	a1,-24(s0)
+8000085c:	fec42503          	lw	a0,-20(s0)
+80000860:	f61ff0ef          	jal	ra,800007c0 <vx_print_str>
+80000864:	fe842503          	lw	a0,-24(s0)
+80000868:	f95ff0ef          	jal	ra,800007fc <vx_print_hex>
+8000086c:	810007b7          	lui	a5,0x81000
+80000870:	09478513          	addi	a0,a5,148 # 81000094 <barrier_bool+0xfffd6dcc>
+80000874:	f4dff0ef          	jal	ra,800007c0 <vx_print_str>
+80000878:	00000013          	nop
+8000087c:	01c12083          	lw	ra,28(sp)
+80000880:	01812403          	lw	s0,24(sp)
+80000884:	02010113          	addi	sp,sp,32
+80000888:	00008067          	ret
 
-800008d4 <vx_printf>:
-800008d4:	fe010113          	addi	sp,sp,-32
-800008d8:	00112e23          	sw	ra,28(sp)
-800008dc:	00812c23          	sw	s0,24(sp)
-800008e0:	02010413          	addi	s0,sp,32
-800008e4:	fea42623          	sw	a0,-20(s0)
-800008e8:	feb42423          	sw	a1,-24(s0)
-800008ec:	fec42503          	lw	a0,-20(s0)
-800008f0:	ee5ff0ef          	jal	ra,800007d4 <vx_print_str>
-800008f4:	fe842503          	lw	a0,-24(s0)
-800008f8:	f19ff0ef          	jal	ra,80000810 <vx_print_hex>
-800008fc:	810007b7          	lui	a5,0x81000
-80000900:	09478513          	addi	a0,a5,148 # 81000094 <barrier_bool+0xfffd6dd0>
-80000904:	ed1ff0ef          	jal	ra,800007d4 <vx_print_str>
-80000908:	00000013          	nop
-8000090c:	01c12083          	lw	ra,28(sp)
-80000910:	01812403          	lw	s0,24(sp)
-80000914:	02010113          	addi	sp,sp,32
-80000918:	00008067          	ret
-
-8000091c <vx_sq_mat_mult>:
-8000091c:	fd010113          	addi	sp,sp,-48
-80000920:	02112623          	sw	ra,44(sp)
-80000924:	02812423          	sw	s0,40(sp)
-80000928:	03010413          	addi	s0,sp,48
-8000092c:	fca42e23          	sw	a0,-36(s0)
-80000930:	fcb42c23          	sw	a1,-40(s0)
-80000934:	fcc42a23          	sw	a2,-44(s0)
-80000938:	fcd42823          	sw	a3,-48(s0)
-8000093c:	810267b7          	lui	a5,0x81026
-80000940:	fdc42703          	lw	a4,-36(s0)
-80000944:	1ae7ac23          	sw	a4,440(a5) # 810261b8 <barrier_bool+0xffffcef4>
-80000948:	810267b7          	lui	a5,0x81026
-8000094c:	1b878793          	addi	a5,a5,440 # 810261b8 <barrier_bool+0xffffcef4>
-80000950:	fd842703          	lw	a4,-40(s0)
-80000954:	00e7a223          	sw	a4,4(a5)
+8000088c <vx_sq_mat_mult>:
+8000088c:	fd010113          	addi	sp,sp,-48
+80000890:	02112623          	sw	ra,44(sp)
+80000894:	02812423          	sw	s0,40(sp)
+80000898:	03010413          	addi	s0,sp,48
+8000089c:	fca42e23          	sw	a0,-36(s0)
+800008a0:	fcb42c23          	sw	a1,-40(s0)
+800008a4:	fcc42a23          	sw	a2,-44(s0)
+800008a8:	fcd42823          	sw	a3,-48(s0)
+800008ac:	810267b7          	lui	a5,0x81026
+800008b0:	fdc42703          	lw	a4,-36(s0)
+800008b4:	1ae7ae23          	sw	a4,444(a5) # 810261bc <barrier_bool+0xffffcef4>
+800008b8:	810267b7          	lui	a5,0x81026
+800008bc:	1bc78793          	addi	a5,a5,444 # 810261bc <barrier_bool+0xffffcef4>
+800008c0:	fd842703          	lw	a4,-40(s0)
+800008c4:	00e7a223          	sw	a4,4(a5)
+800008c8:	810267b7          	lui	a5,0x81026
+800008cc:	1bc78793          	addi	a5,a5,444 # 810261bc <barrier_bool+0xffffcef4>
+800008d0:	fd442703          	lw	a4,-44(s0)
+800008d4:	00e7a423          	sw	a4,8(a5)
+800008d8:	810267b7          	lui	a5,0x81026
+800008dc:	1bc78793          	addi	a5,a5,444 # 810261bc <barrier_bool+0xffffcef4>
+800008e0:	fd042703          	lw	a4,-48(s0)
+800008e4:	00e7a623          	sw	a4,12(a5)
+800008e8:	8fdff0ef          	jal	ra,800001e4 <vx_available_threads>
+800008ec:	fea42423          	sw	a0,-24(s0)
+800008f0:	fd042703          	lw	a4,-48(s0)
+800008f4:	fe842783          	lw	a5,-24(s0)
+800008f8:	02f757b3          	divu	a5,a4,a5
+800008fc:	fef42623          	sw	a5,-20(s0)
+80000900:	fd042703          	lw	a4,-48(s0)
+80000904:	fe842783          	lw	a5,-24(s0)
+80000908:	02f777b3          	remu	a5,a4,a5
+8000090c:	00078863          	beqz	a5,8000091c <vx_sq_mat_mult+0x90>
+80000910:	fec42783          	lw	a5,-20(s0)
+80000914:	00178793          	addi	a5,a5,1
+80000918:	fef42623          	sw	a5,-20(s0)
+8000091c:	810267b7          	lui	a5,0x81026
+80000920:	1bc78793          	addi	a5,a5,444 # 810261bc <barrier_bool+0xffffcef4>
+80000924:	fec42703          	lw	a4,-20(s0)
+80000928:	00e7a823          	sw	a4,16(a5)
+8000092c:	fd042703          	lw	a4,-48(s0)
+80000930:	fe842783          	lw	a5,-24(s0)
+80000934:	02f76263          	bltu	a4,a5,80000958 <vx_sq_mat_mult+0xcc>
+80000938:	810267b7          	lui	a5,0x81026
+8000093c:	1bc78693          	addi	a3,a5,444 # 810261bc <barrier_bool+0xffffcef4>
+80000940:	800017b7          	lui	a5,0x80001
+80000944:	9b078613          	addi	a2,a5,-1616 # 800009b0 <barrier_bool+0xfefd76e8>
+80000948:	fe842583          	lw	a1,-24(s0)
+8000094c:	fd042503          	lw	a0,-48(s0)
+80000950:	b0dff0ef          	jal	ra,8000045c <vx_spawnWarps>
+80000954:	0200006f          	j	80000974 <vx_sq_mat_mult+0xe8>
 80000958:	810267b7          	lui	a5,0x81026
-8000095c:	1b878793          	addi	a5,a5,440 # 810261b8 <barrier_bool+0xffffcef4>
-80000960:	fd442703          	lw	a4,-44(s0)
-80000964:	00e7a423          	sw	a4,8(a5)
-80000968:	810267b7          	lui	a5,0x81026
-8000096c:	1b878793          	addi	a5,a5,440 # 810261b8 <barrier_bool+0xffffcef4>
-80000970:	fd042703          	lw	a4,-48(s0)
-80000974:	00e7a623          	sw	a4,12(a5)
-80000978:	881ff0ef          	jal	ra,800001f8 <vx_available_threads>
-8000097c:	fea42423          	sw	a0,-24(s0)
-80000980:	fd042703          	lw	a4,-48(s0)
-80000984:	fe842783          	lw	a5,-24(s0)
-80000988:	02f757b3          	divu	a5,a4,a5
-8000098c:	fef42623          	sw	a5,-20(s0)
-80000990:	fd042703          	lw	a4,-48(s0)
-80000994:	fe842783          	lw	a5,-24(s0)
-80000998:	02f777b3          	remu	a5,a4,a5
-8000099c:	00078863          	beqz	a5,800009ac <vx_sq_mat_mult+0x90>
-800009a0:	fec42783          	lw	a5,-20(s0)
-800009a4:	00178793          	addi	a5,a5,1
-800009a8:	fef42623          	sw	a5,-20(s0)
-800009ac:	810267b7          	lui	a5,0x81026
-800009b0:	1b878793          	addi	a5,a5,440 # 810261b8 <barrier_bool+0xffffcef4>
-800009b4:	fec42703          	lw	a4,-20(s0)
-800009b8:	00e7a823          	sw	a4,16(a5)
-800009bc:	fd042703          	lw	a4,-48(s0)
-800009c0:	fe842783          	lw	a5,-24(s0)
-800009c4:	02f76263          	bltu	a4,a5,800009e8 <vx_sq_mat_mult+0xcc>
-800009c8:	810267b7          	lui	a5,0x81026
-800009cc:	1b878693          	addi	a3,a5,440 # 810261b8 <barrier_bool+0xffffcef4>
-800009d0:	800017b7          	lui	a5,0x80001
-800009d4:	a4078613          	addi	a2,a5,-1472 # 80000a40 <barrier_bool+0xfefd777c>
-800009d8:	fe842583          	lw	a1,-24(s0)
-800009dc:	fd042503          	lw	a0,-48(s0)
-800009e0:	a91ff0ef          	jal	ra,80000470 <vx_spawnWarps>
-800009e4:	0200006f          	j	80000a04 <vx_sq_mat_mult+0xe8>
-800009e8:	810267b7          	lui	a5,0x81026
-800009ec:	1b878693          	addi	a3,a5,440 # 810261b8 <barrier_bool+0xffffcef4>
-800009f0:	800017b7          	lui	a5,0x80001
-800009f4:	a4078613          	addi	a2,a5,-1472 # 80000a40 <barrier_bool+0xfefd777c>
-800009f8:	fd042583          	lw	a1,-48(s0)
-800009fc:	fd042503          	lw	a0,-48(s0)
-80000a00:	a71ff0ef          	jal	ra,80000470 <vx_spawnWarps>
-80000a04:	fecff0ef          	jal	ra,800001f0 <vx_available_warps>
-80000a08:	fea42223          	sw	a0,-28(s0)
-80000a0c:	fd042703          	lw	a4,-48(s0)
-80000a10:	fe442783          	lw	a5,-28(s0)
-80000a14:	00e7f863          	bgeu	a5,a4,80000a24 <vx_sq_mat_mult+0x108>
-80000a18:	fe442503          	lw	a0,-28(s0)
-80000a1c:	b45ff0ef          	jal	ra,80000560 <vx_wait_for_warps>
-80000a20:	00c0006f          	j	80000a2c <vx_sq_mat_mult+0x110>
-80000a24:	fd042503          	lw	a0,-48(s0)
-80000a28:	b39ff0ef          	jal	ra,80000560 <vx_wait_for_warps>
-80000a2c:	00000013          	nop
-80000a30:	02c12083          	lw	ra,44(sp)
-80000a34:	02812403          	lw	s0,40(sp)
-80000a38:	03010113          	addi	sp,sp,48
-80000a3c:	00008067          	ret
+8000095c:	1bc78693          	addi	a3,a5,444 # 810261bc <barrier_bool+0xffffcef4>
+80000960:	800017b7          	lui	a5,0x80001
+80000964:	9b078613          	addi	a2,a5,-1616 # 800009b0 <barrier_bool+0xfefd76e8>
+80000968:	fd042583          	lw	a1,-48(s0)
+8000096c:	fd042503          	lw	a0,-48(s0)
+80000970:	aedff0ef          	jal	ra,8000045c <vx_spawnWarps>
+80000974:	869ff0ef          	jal	ra,800001dc <vx_available_warps>
+80000978:	fea42223          	sw	a0,-28(s0)
+8000097c:	fd042703          	lw	a4,-48(s0)
+80000980:	fe442783          	lw	a5,-28(s0)
+80000984:	00e7f863          	bgeu	a5,a4,80000994 <vx_sq_mat_mult+0x108>
+80000988:	fe442503          	lw	a0,-28(s0)
+8000098c:	bc1ff0ef          	jal	ra,8000054c <vx_wait_for_warps>
+80000990:	00c0006f          	j	8000099c <vx_sq_mat_mult+0x110>
+80000994:	fd042503          	lw	a0,-48(s0)
+80000998:	bb5ff0ef          	jal	ra,8000054c <vx_wait_for_warps>
+8000099c:	00000013          	nop
+800009a0:	02c12083          	lw	ra,44(sp)
+800009a4:	02812403          	lw	s0,40(sp)
+800009a8:	03010113          	addi	sp,sp,48
+800009ac:	00008067          	ret
 
-80000a40 <_vx_mat_mult>:
-80000a40:	fa010113          	addi	sp,sp,-96
-80000a44:	04112e23          	sw	ra,92(sp)
-80000a48:	04812c23          	sw	s0,88(sp)
-80000a4c:	06010413          	addi	s0,sp,96
-80000a50:	faa42623          	sw	a0,-84(s0)
-80000a54:	fab42423          	sw	a1,-88(s0)
-80000a58:	bf9ff0ef          	jal	ra,80000650 <vx_get_arg_struct>
-80000a5c:	fca42c23          	sw	a0,-40(s0)
-80000a60:	fd842783          	lw	a5,-40(s0)
-80000a64:	0007a783          	lw	a5,0(a5)
-80000a68:	fcf42a23          	sw	a5,-44(s0)
-80000a6c:	fd842783          	lw	a5,-40(s0)
-80000a70:	0047a783          	lw	a5,4(a5)
-80000a74:	fcf42823          	sw	a5,-48(s0)
-80000a78:	fd842783          	lw	a5,-40(s0)
-80000a7c:	0087a783          	lw	a5,8(a5)
-80000a80:	fcf42623          	sw	a5,-52(s0)
-80000a84:	fd842783          	lw	a5,-40(s0)
-80000a88:	0107a783          	lw	a5,16(a5)
-80000a8c:	fef42623          	sw	a5,-20(s0)
-80000a90:	fec42703          	lw	a4,-20(s0)
-80000a94:	fac42783          	lw	a5,-84(s0)
-80000a98:	02f707b3          	mul	a5,a4,a5
-80000a9c:	fef42423          	sw	a5,-24(s0)
-80000aa0:	fec42783          	lw	a5,-20(s0)
-80000aa4:	00079a63          	bnez	a5,80000ab8 <_vx_mat_mult+0x78>
-80000aa8:	00100793          	li	a5,1
-80000aac:	fef42623          	sw	a5,-20(s0)
-80000ab0:	fac42783          	lw	a5,-84(s0)
-80000ab4:	fef42423          	sw	a5,-24(s0)
-80000ab8:	fd842783          	lw	a5,-40(s0)
-80000abc:	00c7a783          	lw	a5,12(a5)
-80000ac0:	fcf42423          	sw	a5,-56(s0)
-80000ac4:	fe042223          	sw	zero,-28(s0)
-80000ac8:	0d80006f          	j	80000ba0 <_vx_mat_mult+0x160>
-80000acc:	fe042023          	sw	zero,-32(s0)
-80000ad0:	fc042e23          	sw	zero,-36(s0)
-80000ad4:	0780006f          	j	80000b4c <_vx_mat_mult+0x10c>
-80000ad8:	fa842703          	lw	a4,-88(s0)
-80000adc:	fc842783          	lw	a5,-56(s0)
-80000ae0:	02f707b3          	mul	a5,a4,a5
-80000ae4:	fdc42703          	lw	a4,-36(s0)
-80000ae8:	00f707b3          	add	a5,a4,a5
-80000aec:	fcf42223          	sw	a5,-60(s0)
-80000af0:	fc842703          	lw	a4,-56(s0)
-80000af4:	fdc42783          	lw	a5,-36(s0)
-80000af8:	02f707b3          	mul	a5,a4,a5
-80000afc:	fe842703          	lw	a4,-24(s0)
-80000b00:	00f707b3          	add	a5,a4,a5
-80000b04:	fcf42023          	sw	a5,-64(s0)
-80000b08:	fc442783          	lw	a5,-60(s0)
-80000b0c:	00279793          	slli	a5,a5,0x2
-80000b10:	fd442703          	lw	a4,-44(s0)
-80000b14:	00f707b3          	add	a5,a4,a5
-80000b18:	0007a703          	lw	a4,0(a5)
-80000b1c:	fc042783          	lw	a5,-64(s0)
-80000b20:	00279793          	slli	a5,a5,0x2
-80000b24:	fd042683          	lw	a3,-48(s0)
-80000b28:	00f687b3          	add	a5,a3,a5
-80000b2c:	0007a783          	lw	a5,0(a5)
-80000b30:	02f707b3          	mul	a5,a4,a5
-80000b34:	fe042703          	lw	a4,-32(s0)
-80000b38:	00f707b3          	add	a5,a4,a5
-80000b3c:	fef42023          	sw	a5,-32(s0)
-80000b40:	fdc42783          	lw	a5,-36(s0)
-80000b44:	00178793          	addi	a5,a5,1
-80000b48:	fcf42e23          	sw	a5,-36(s0)
-80000b4c:	fdc42703          	lw	a4,-36(s0)
-80000b50:	fc842783          	lw	a5,-56(s0)
-80000b54:	f8f762e3          	bltu	a4,a5,80000ad8 <_vx_mat_mult+0x98>
-80000b58:	fa842703          	lw	a4,-88(s0)
-80000b5c:	fc842783          	lw	a5,-56(s0)
-80000b60:	02f70733          	mul	a4,a4,a5
-80000b64:	fe842783          	lw	a5,-24(s0)
-80000b68:	00f707b3          	add	a5,a4,a5
-80000b6c:	faf42e23          	sw	a5,-68(s0)
-80000b70:	fbc42783          	lw	a5,-68(s0)
-80000b74:	00279793          	slli	a5,a5,0x2
-80000b78:	fcc42703          	lw	a4,-52(s0)
-80000b7c:	00f707b3          	add	a5,a4,a5
-80000b80:	fe042703          	lw	a4,-32(s0)
-80000b84:	00e7a023          	sw	a4,0(a5)
-80000b88:	fe842783          	lw	a5,-24(s0)
-80000b8c:	00178793          	addi	a5,a5,1
-80000b90:	fef42423          	sw	a5,-24(s0)
-80000b94:	fe442783          	lw	a5,-28(s0)
-80000b98:	00178793          	addi	a5,a5,1
-80000b9c:	fef42223          	sw	a5,-28(s0)
-80000ba0:	fe442783          	lw	a5,-28(s0)
-80000ba4:	fec42703          	lw	a4,-20(s0)
-80000ba8:	f2e7e2e3          	bltu	a5,a4,80000acc <_vx_mat_mult+0x8c>
-80000bac:	00000013          	nop
-80000bb0:	05c12083          	lw	ra,92(sp)
-80000bb4:	05812403          	lw	s0,88(sp)
-80000bb8:	06010113          	addi	sp,sp,96
-80000bbc:	00008067          	ret
+800009b0 <_vx_mat_mult>:
+800009b0:	fa010113          	addi	sp,sp,-96
+800009b4:	04112e23          	sw	ra,92(sp)
+800009b8:	04812c23          	sw	s0,88(sp)
+800009bc:	06010413          	addi	s0,sp,96
+800009c0:	faa42623          	sw	a0,-84(s0)
+800009c4:	fab42423          	sw	a1,-88(s0)
+800009c8:	c75ff0ef          	jal	ra,8000063c <vx_get_arg_struct>
+800009cc:	fca42c23          	sw	a0,-40(s0)
+800009d0:	fd842783          	lw	a5,-40(s0)
+800009d4:	0007a783          	lw	a5,0(a5)
+800009d8:	fcf42a23          	sw	a5,-44(s0)
+800009dc:	fd842783          	lw	a5,-40(s0)
+800009e0:	0047a783          	lw	a5,4(a5)
+800009e4:	fcf42823          	sw	a5,-48(s0)
+800009e8:	fd842783          	lw	a5,-40(s0)
+800009ec:	0087a783          	lw	a5,8(a5)
+800009f0:	fcf42623          	sw	a5,-52(s0)
+800009f4:	fd842783          	lw	a5,-40(s0)
+800009f8:	0107a783          	lw	a5,16(a5)
+800009fc:	fef42623          	sw	a5,-20(s0)
+80000a00:	fec42703          	lw	a4,-20(s0)
+80000a04:	fac42783          	lw	a5,-84(s0)
+80000a08:	02f707b3          	mul	a5,a4,a5
+80000a0c:	fef42423          	sw	a5,-24(s0)
+80000a10:	fec42783          	lw	a5,-20(s0)
+80000a14:	00079a63          	bnez	a5,80000a28 <_vx_mat_mult+0x78>
+80000a18:	00100793          	li	a5,1
+80000a1c:	fef42623          	sw	a5,-20(s0)
+80000a20:	fac42783          	lw	a5,-84(s0)
+80000a24:	fef42423          	sw	a5,-24(s0)
+80000a28:	fd842783          	lw	a5,-40(s0)
+80000a2c:	00c7a783          	lw	a5,12(a5)
+80000a30:	fcf42423          	sw	a5,-56(s0)
+80000a34:	fe042223          	sw	zero,-28(s0)
+80000a38:	0d80006f          	j	80000b10 <_vx_mat_mult+0x160>
+80000a3c:	fe042023          	sw	zero,-32(s0)
+80000a40:	fc042e23          	sw	zero,-36(s0)
+80000a44:	0780006f          	j	80000abc <_vx_mat_mult+0x10c>
+80000a48:	fa842703          	lw	a4,-88(s0)
+80000a4c:	fc842783          	lw	a5,-56(s0)
+80000a50:	02f707b3          	mul	a5,a4,a5
+80000a54:	fdc42703          	lw	a4,-36(s0)
+80000a58:	00f707b3          	add	a5,a4,a5
+80000a5c:	fcf42223          	sw	a5,-60(s0)
+80000a60:	fc842703          	lw	a4,-56(s0)
+80000a64:	fdc42783          	lw	a5,-36(s0)
+80000a68:	02f707b3          	mul	a5,a4,a5
+80000a6c:	fe842703          	lw	a4,-24(s0)
+80000a70:	00f707b3          	add	a5,a4,a5
+80000a74:	fcf42023          	sw	a5,-64(s0)
+80000a78:	fc442783          	lw	a5,-60(s0)
+80000a7c:	00279793          	slli	a5,a5,0x2
+80000a80:	fd442703          	lw	a4,-44(s0)
+80000a84:	00f707b3          	add	a5,a4,a5
+80000a88:	0007a703          	lw	a4,0(a5)
+80000a8c:	fc042783          	lw	a5,-64(s0)
+80000a90:	00279793          	slli	a5,a5,0x2
+80000a94:	fd042683          	lw	a3,-48(s0)
+80000a98:	00f687b3          	add	a5,a3,a5
+80000a9c:	0007a783          	lw	a5,0(a5)
+80000aa0:	02f707b3          	mul	a5,a4,a5
+80000aa4:	fe042703          	lw	a4,-32(s0)
+80000aa8:	00f707b3          	add	a5,a4,a5
+80000aac:	fef42023          	sw	a5,-32(s0)
+80000ab0:	fdc42783          	lw	a5,-36(s0)
+80000ab4:	00178793          	addi	a5,a5,1
+80000ab8:	fcf42e23          	sw	a5,-36(s0)
+80000abc:	fdc42703          	lw	a4,-36(s0)
+80000ac0:	fc842783          	lw	a5,-56(s0)
+80000ac4:	f8f762e3          	bltu	a4,a5,80000a48 <_vx_mat_mult+0x98>
+80000ac8:	fa842703          	lw	a4,-88(s0)
+80000acc:	fc842783          	lw	a5,-56(s0)
+80000ad0:	02f70733          	mul	a4,a4,a5
+80000ad4:	fe842783          	lw	a5,-24(s0)
+80000ad8:	00f707b3          	add	a5,a4,a5
+80000adc:	faf42e23          	sw	a5,-68(s0)
+80000ae0:	fbc42783          	lw	a5,-68(s0)
+80000ae4:	00279793          	slli	a5,a5,0x2
+80000ae8:	fcc42703          	lw	a4,-52(s0)
+80000aec:	00f707b3          	add	a5,a4,a5
+80000af0:	fe042703          	lw	a4,-32(s0)
+80000af4:	00e7a023          	sw	a4,0(a5)
+80000af8:	fe842783          	lw	a5,-24(s0)
+80000afc:	00178793          	addi	a5,a5,1
+80000b00:	fef42423          	sw	a5,-24(s0)
+80000b04:	fe442783          	lw	a5,-28(s0)
+80000b08:	00178793          	addi	a5,a5,1
+80000b0c:	fef42223          	sw	a5,-28(s0)
+80000b10:	fe442783          	lw	a5,-28(s0)
+80000b14:	fec42703          	lw	a4,-20(s0)
+80000b18:	f2e7e2e3          	bltu	a5,a4,80000a3c <_vx_mat_mult+0x8c>
+80000b1c:	00000013          	nop
+80000b20:	05c12083          	lw	ra,92(sp)
+80000b24:	05812403          	lw	s0,88(sp)
+80000b28:	06010113          	addi	sp,sp,96
+80000b2c:	00008067          	ret
 
-80000bc0 <vx_mat_add>:
-80000bc0:	fc010113          	addi	sp,sp,-64
-80000bc4:	02112e23          	sw	ra,60(sp)
-80000bc8:	02812c23          	sw	s0,56(sp)
-80000bcc:	04010413          	addi	s0,sp,64
-80000bd0:	fca42e23          	sw	a0,-36(s0)
-80000bd4:	fcb42c23          	sw	a1,-40(s0)
-80000bd8:	fcc42a23          	sw	a2,-44(s0)
-80000bdc:	fcd42823          	sw	a3,-48(s0)
-80000be0:	fce42623          	sw	a4,-52(s0)
-80000be4:	810267b7          	lui	a5,0x81026
-80000be8:	fdc42703          	lw	a4,-36(s0)
-80000bec:	1ce7a623          	sw	a4,460(a5) # 810261cc <barrier_bool+0xffffcf08>
+80000b30 <vx_mat_add>:
+80000b30:	fc010113          	addi	sp,sp,-64
+80000b34:	02112e23          	sw	ra,60(sp)
+80000b38:	02812c23          	sw	s0,56(sp)
+80000b3c:	04010413          	addi	s0,sp,64
+80000b40:	fca42e23          	sw	a0,-36(s0)
+80000b44:	fcb42c23          	sw	a1,-40(s0)
+80000b48:	fcc42a23          	sw	a2,-44(s0)
+80000b4c:	fcd42823          	sw	a3,-48(s0)
+80000b50:	fce42623          	sw	a4,-52(s0)
+80000b54:	810267b7          	lui	a5,0x81026
+80000b58:	fdc42703          	lw	a4,-36(s0)
+80000b5c:	1ce7a823          	sw	a4,464(a5) # 810261d0 <barrier_bool+0xffffcf08>
+80000b60:	810267b7          	lui	a5,0x81026
+80000b64:	1d078793          	addi	a5,a5,464 # 810261d0 <barrier_bool+0xffffcf08>
+80000b68:	fd842703          	lw	a4,-40(s0)
+80000b6c:	00e7a223          	sw	a4,4(a5)
+80000b70:	810267b7          	lui	a5,0x81026
+80000b74:	1d078793          	addi	a5,a5,464 # 810261d0 <barrier_bool+0xffffcf08>
+80000b78:	fd442703          	lw	a4,-44(s0)
+80000b7c:	00e7a423          	sw	a4,8(a5)
+80000b80:	810267b7          	lui	a5,0x81026
+80000b84:	1d078793          	addi	a5,a5,464 # 810261d0 <barrier_bool+0xffffcf08>
+80000b88:	fcc42703          	lw	a4,-52(s0)
+80000b8c:	00e7a623          	sw	a4,12(a5)
+80000b90:	810267b7          	lui	a5,0x81026
+80000b94:	1d078793          	addi	a5,a5,464 # 810261d0 <barrier_bool+0xffffcf08>
+80000b98:	fd042703          	lw	a4,-48(s0)
+80000b9c:	00e7a823          	sw	a4,16(a5)
+80000ba0:	e44ff0ef          	jal	ra,800001e4 <vx_available_threads>
+80000ba4:	fea42423          	sw	a0,-24(s0)
+80000ba8:	fcc42703          	lw	a4,-52(s0)
+80000bac:	fe842783          	lw	a5,-24(s0)
+80000bb0:	02f757b3          	divu	a5,a4,a5
+80000bb4:	fef42623          	sw	a5,-20(s0)
+80000bb8:	fcc42703          	lw	a4,-52(s0)
+80000bbc:	fe842783          	lw	a5,-24(s0)
+80000bc0:	02f777b3          	remu	a5,a4,a5
+80000bc4:	00078863          	beqz	a5,80000bd4 <vx_mat_add+0xa4>
+80000bc8:	fec42783          	lw	a5,-20(s0)
+80000bcc:	00178793          	addi	a5,a5,1
+80000bd0:	fef42623          	sw	a5,-20(s0)
+80000bd4:	810267b7          	lui	a5,0x81026
+80000bd8:	1d078793          	addi	a5,a5,464 # 810261d0 <barrier_bool+0xffffcf08>
+80000bdc:	fec42703          	lw	a4,-20(s0)
+80000be0:	00e7aa23          	sw	a4,20(a5)
+80000be4:	fcc42703          	lw	a4,-52(s0)
+80000be8:	fe842783          	lw	a5,-24(s0)
+80000bec:	02f76263          	bltu	a4,a5,80000c10 <vx_mat_add+0xe0>
 80000bf0:	810267b7          	lui	a5,0x81026
-80000bf4:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000bf8:	fd842703          	lw	a4,-40(s0)
-80000bfc:	00e7a223          	sw	a4,4(a5)
-80000c00:	810267b7          	lui	a5,0x81026
-80000c04:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000c08:	fd442703          	lw	a4,-44(s0)
-80000c0c:	00e7a423          	sw	a4,8(a5)
+80000bf4:	1d078693          	addi	a3,a5,464 # 810261d0 <barrier_bool+0xffffcf08>
+80000bf8:	800017b7          	lui	a5,0x80001
+80000bfc:	c6878613          	addi	a2,a5,-920 # 80000c68 <barrier_bool+0xfefd79a0>
+80000c00:	fe842583          	lw	a1,-24(s0)
+80000c04:	fd042503          	lw	a0,-48(s0)
+80000c08:	855ff0ef          	jal	ra,8000045c <vx_spawnWarps>
+80000c0c:	0200006f          	j	80000c2c <vx_mat_add+0xfc>
 80000c10:	810267b7          	lui	a5,0x81026
-80000c14:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000c18:	fcc42703          	lw	a4,-52(s0)
-80000c1c:	00e7a623          	sw	a4,12(a5)
-80000c20:	810267b7          	lui	a5,0x81026
-80000c24:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000c28:	fd042703          	lw	a4,-48(s0)
-80000c2c:	00e7a823          	sw	a4,16(a5)
-80000c30:	dc8ff0ef          	jal	ra,800001f8 <vx_available_threads>
-80000c34:	fea42423          	sw	a0,-24(s0)
-80000c38:	fcc42703          	lw	a4,-52(s0)
-80000c3c:	fe842783          	lw	a5,-24(s0)
-80000c40:	02f757b3          	divu	a5,a4,a5
-80000c44:	fef42623          	sw	a5,-20(s0)
-80000c48:	fcc42703          	lw	a4,-52(s0)
-80000c4c:	fe842783          	lw	a5,-24(s0)
-80000c50:	02f777b3          	remu	a5,a4,a5
-80000c54:	00078863          	beqz	a5,80000c64 <vx_mat_add+0xa4>
-80000c58:	fec42783          	lw	a5,-20(s0)
-80000c5c:	00178793          	addi	a5,a5,1
-80000c60:	fef42623          	sw	a5,-20(s0)
-80000c64:	810267b7          	lui	a5,0x81026
-80000c68:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000c6c:	fec42703          	lw	a4,-20(s0)
-80000c70:	00e7aa23          	sw	a4,20(a5)
-80000c74:	fcc42703          	lw	a4,-52(s0)
-80000c78:	fe842783          	lw	a5,-24(s0)
-80000c7c:	02f76263          	bltu	a4,a5,80000ca0 <vx_mat_add+0xe0>
-80000c80:	810267b7          	lui	a5,0x81026
-80000c84:	1cc78693          	addi	a3,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000c88:	800017b7          	lui	a5,0x80001
-80000c8c:	cf878613          	addi	a2,a5,-776 # 80000cf8 <barrier_bool+0xfefd7a34>
-80000c90:	fe842583          	lw	a1,-24(s0)
-80000c94:	fd042503          	lw	a0,-48(s0)
-80000c98:	fd8ff0ef          	jal	ra,80000470 <vx_spawnWarps>
-80000c9c:	0200006f          	j	80000cbc <vx_mat_add+0xfc>
-80000ca0:	810267b7          	lui	a5,0x81026
-80000ca4:	1cc78693          	addi	a3,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000ca8:	800017b7          	lui	a5,0x80001
-80000cac:	cf878613          	addi	a2,a5,-776 # 80000cf8 <barrier_bool+0xfefd7a34>
-80000cb0:	fcc42583          	lw	a1,-52(s0)
-80000cb4:	fd042503          	lw	a0,-48(s0)
-80000cb8:	fb8ff0ef          	jal	ra,80000470 <vx_spawnWarps>
-80000cbc:	d34ff0ef          	jal	ra,800001f0 <vx_available_warps>
-80000cc0:	fea42223          	sw	a0,-28(s0)
-80000cc4:	fd042703          	lw	a4,-48(s0)
-80000cc8:	fe442783          	lw	a5,-28(s0)
-80000ccc:	00e7f863          	bgeu	a5,a4,80000cdc <vx_mat_add+0x11c>
-80000cd0:	fe442503          	lw	a0,-28(s0)
-80000cd4:	88dff0ef          	jal	ra,80000560 <vx_wait_for_warps>
-80000cd8:	00c0006f          	j	80000ce4 <vx_mat_add+0x124>
-80000cdc:	fd042503          	lw	a0,-48(s0)
-80000ce0:	881ff0ef          	jal	ra,80000560 <vx_wait_for_warps>
-80000ce4:	00000013          	nop
-80000ce8:	03c12083          	lw	ra,60(sp)
-80000cec:	03812403          	lw	s0,56(sp)
-80000cf0:	04010113          	addi	sp,sp,64
-80000cf4:	00008067          	ret
+80000c14:	1d078693          	addi	a3,a5,464 # 810261d0 <barrier_bool+0xffffcf08>
+80000c18:	800017b7          	lui	a5,0x80001
+80000c1c:	c6878613          	addi	a2,a5,-920 # 80000c68 <barrier_bool+0xfefd79a0>
+80000c20:	fcc42583          	lw	a1,-52(s0)
+80000c24:	fd042503          	lw	a0,-48(s0)
+80000c28:	835ff0ef          	jal	ra,8000045c <vx_spawnWarps>
+80000c2c:	db0ff0ef          	jal	ra,800001dc <vx_available_warps>
+80000c30:	fea42223          	sw	a0,-28(s0)
+80000c34:	fd042703          	lw	a4,-48(s0)
+80000c38:	fe442783          	lw	a5,-28(s0)
+80000c3c:	00e7f863          	bgeu	a5,a4,80000c4c <vx_mat_add+0x11c>
+80000c40:	fe442503          	lw	a0,-28(s0)
+80000c44:	909ff0ef          	jal	ra,8000054c <vx_wait_for_warps>
+80000c48:	00c0006f          	j	80000c54 <vx_mat_add+0x124>
+80000c4c:	fd042503          	lw	a0,-48(s0)
+80000c50:	8fdff0ef          	jal	ra,8000054c <vx_wait_for_warps>
+80000c54:	00000013          	nop
+80000c58:	03c12083          	lw	ra,60(sp)
+80000c5c:	03812403          	lw	s0,56(sp)
+80000c60:	04010113          	addi	sp,sp,64
+80000c64:	00008067          	ret
 
-80000cf8 <_vx_mat_add>:
-80000cf8:	fb010113          	addi	sp,sp,-80
-80000cfc:	04112623          	sw	ra,76(sp)
-80000d00:	04812423          	sw	s0,72(sp)
-80000d04:	05010413          	addi	s0,sp,80
-80000d08:	faa42e23          	sw	a0,-68(s0)
-80000d0c:	fab42c23          	sw	a1,-72(s0)
-80000d10:	941ff0ef          	jal	ra,80000650 <vx_get_arg_struct>
-80000d14:	fea42023          	sw	a0,-32(s0)
-80000d18:	fe042783          	lw	a5,-32(s0)
-80000d1c:	0007a783          	lw	a5,0(a5)
-80000d20:	fcf42e23          	sw	a5,-36(s0)
-80000d24:	fe042783          	lw	a5,-32(s0)
-80000d28:	0047a783          	lw	a5,4(a5)
-80000d2c:	fcf42c23          	sw	a5,-40(s0)
-80000d30:	fe042783          	lw	a5,-32(s0)
-80000d34:	0087a783          	lw	a5,8(a5)
-80000d38:	fcf42a23          	sw	a5,-44(s0)
-80000d3c:	fe042783          	lw	a5,-32(s0)
-80000d40:	0147a783          	lw	a5,20(a5)
-80000d44:	fef42623          	sw	a5,-20(s0)
-80000d48:	fec42703          	lw	a4,-20(s0)
-80000d4c:	fbc42783          	lw	a5,-68(s0)
-80000d50:	02f707b3          	mul	a5,a4,a5
-80000d54:	fef42423          	sw	a5,-24(s0)
-80000d58:	fec42783          	lw	a5,-20(s0)
-80000d5c:	00079a63          	bnez	a5,80000d70 <_vx_mat_add+0x78>
-80000d60:	00100793          	li	a5,1
-80000d64:	fef42623          	sw	a5,-20(s0)
-80000d68:	fbc42783          	lw	a5,-68(s0)
-80000d6c:	fef42423          	sw	a5,-24(s0)
-80000d70:	fe042783          	lw	a5,-32(s0)
-80000d74:	00c7a783          	lw	a5,12(a5)
-80000d78:	fcf42823          	sw	a5,-48(s0)
-80000d7c:	fe042223          	sw	zero,-28(s0)
-80000d80:	0c00006f          	j	80000e40 <_vx_mat_add+0x148>
-80000d84:	fb842703          	lw	a4,-72(s0)
-80000d88:	fd042783          	lw	a5,-48(s0)
-80000d8c:	02f70733          	mul	a4,a4,a5
-80000d90:	fe842783          	lw	a5,-24(s0)
-80000d94:	00f707b3          	add	a5,a4,a5
-80000d98:	fcf42623          	sw	a5,-52(s0)
-80000d9c:	fe842703          	lw	a4,-24(s0)
-80000da0:	fd042783          	lw	a5,-48(s0)
-80000da4:	00f737b3          	sltu	a5,a4,a5
-80000da8:	0ff7f793          	andi	a5,a5,255
-80000dac:	fcf42423          	sw	a5,-56(s0)
-80000db0:	fc842783          	lw	a5,-56(s0)
-80000db4:	0017b793          	seqz	a5,a5
-80000db8:	fcf403a3          	sb	a5,-57(s0)
-80000dbc:	fc744783          	lbu	a5,-57(s0)
-80000dc0:	00078f13          	mv	t5,a5
-80000dc4:	800017b7          	lui	a5,0x80001
-80000dc8:	e2c78f93          	addi	t6,a5,-468 # 80000e2c <barrier_bool+0xfefd7b68>
-80000dcc:	000f206b          	0xf206b
-80000dd0:	01ff707b          	0x1ff707b
-80000dd4:	fcc42783          	lw	a5,-52(s0)
-80000dd8:	00279793          	slli	a5,a5,0x2
-80000ddc:	fdc42703          	lw	a4,-36(s0)
-80000de0:	00f707b3          	add	a5,a4,a5
-80000de4:	0007a683          	lw	a3,0(a5)
-80000de8:	fcc42783          	lw	a5,-52(s0)
-80000dec:	00279793          	slli	a5,a5,0x2
-80000df0:	fd842703          	lw	a4,-40(s0)
-80000df4:	00f707b3          	add	a5,a4,a5
-80000df8:	0007a703          	lw	a4,0(a5)
-80000dfc:	fcc42783          	lw	a5,-52(s0)
-80000e00:	00279793          	slli	a5,a5,0x2
-80000e04:	fd442603          	lw	a2,-44(s0)
-80000e08:	00f607b3          	add	a5,a2,a5
-80000e0c:	00e68733          	add	a4,a3,a4
-80000e10:	00e7a023          	sw	a4,0(a5)
-80000e14:	fe842783          	lw	a5,-24(s0)
-80000e18:	00178793          	addi	a5,a5,1
-80000e1c:	fef42423          	sw	a5,-24(s0)
-80000e20:	800017b7          	lui	a5,0x80001
-80000e24:	e3078e13          	addi	t3,a5,-464 # 80000e30 <barrier_bool+0xfefd7b6c>
-80000e28:	000e0067          	jr	t3
-80000e2c:	00000013          	nop
-80000e30:	0000306b          	0x306b
-80000e34:	fe442783          	lw	a5,-28(s0)
-80000e38:	00178793          	addi	a5,a5,1
-80000e3c:	fef42223          	sw	a5,-28(s0)
-80000e40:	fe442783          	lw	a5,-28(s0)
-80000e44:	fec42703          	lw	a4,-20(s0)
-80000e48:	f2e7eee3          	bltu	a5,a4,80000d84 <_vx_mat_add+0x8c>
-80000e4c:	00000013          	nop
-80000e50:	04c12083          	lw	ra,76(sp)
-80000e54:	04812403          	lw	s0,72(sp)
-80000e58:	05010113          	addi	sp,sp,80
-80000e5c:	00008067          	ret
+80000c68 <_vx_mat_add>:
+80000c68:	fb010113          	addi	sp,sp,-80
+80000c6c:	04112623          	sw	ra,76(sp)
+80000c70:	04812423          	sw	s0,72(sp)
+80000c74:	05010413          	addi	s0,sp,80
+80000c78:	faa42e23          	sw	a0,-68(s0)
+80000c7c:	fab42c23          	sw	a1,-72(s0)
+80000c80:	9bdff0ef          	jal	ra,8000063c <vx_get_arg_struct>
+80000c84:	fea42023          	sw	a0,-32(s0)
+80000c88:	fe042783          	lw	a5,-32(s0)
+80000c8c:	0007a783          	lw	a5,0(a5)
+80000c90:	fcf42e23          	sw	a5,-36(s0)
+80000c94:	fe042783          	lw	a5,-32(s0)
+80000c98:	0047a783          	lw	a5,4(a5)
+80000c9c:	fcf42c23          	sw	a5,-40(s0)
+80000ca0:	fe042783          	lw	a5,-32(s0)
+80000ca4:	0087a783          	lw	a5,8(a5)
+80000ca8:	fcf42a23          	sw	a5,-44(s0)
+80000cac:	fe042783          	lw	a5,-32(s0)
+80000cb0:	0147a783          	lw	a5,20(a5)
+80000cb4:	fef42623          	sw	a5,-20(s0)
+80000cb8:	fec42703          	lw	a4,-20(s0)
+80000cbc:	fbc42783          	lw	a5,-68(s0)
+80000cc0:	02f707b3          	mul	a5,a4,a5
+80000cc4:	fef42423          	sw	a5,-24(s0)
+80000cc8:	fec42783          	lw	a5,-20(s0)
+80000ccc:	00079a63          	bnez	a5,80000ce0 <_vx_mat_add+0x78>
+80000cd0:	00100793          	li	a5,1
+80000cd4:	fef42623          	sw	a5,-20(s0)
+80000cd8:	fbc42783          	lw	a5,-68(s0)
+80000cdc:	fef42423          	sw	a5,-24(s0)
+80000ce0:	fe042783          	lw	a5,-32(s0)
+80000ce4:	00c7a783          	lw	a5,12(a5)
+80000ce8:	fcf42823          	sw	a5,-48(s0)
+80000cec:	fe042223          	sw	zero,-28(s0)
+80000cf0:	0c00006f          	j	80000db0 <_vx_mat_add+0x148>
+80000cf4:	fb842703          	lw	a4,-72(s0)
+80000cf8:	fd042783          	lw	a5,-48(s0)
+80000cfc:	02f70733          	mul	a4,a4,a5
+80000d00:	fe842783          	lw	a5,-24(s0)
+80000d04:	00f707b3          	add	a5,a4,a5
+80000d08:	fcf42623          	sw	a5,-52(s0)
+80000d0c:	fe842703          	lw	a4,-24(s0)
+80000d10:	fd042783          	lw	a5,-48(s0)
+80000d14:	00f737b3          	sltu	a5,a4,a5
+80000d18:	0ff7f793          	andi	a5,a5,255
+80000d1c:	fcf42423          	sw	a5,-56(s0)
+80000d20:	fc842783          	lw	a5,-56(s0)
+80000d24:	0017b793          	seqz	a5,a5
+80000d28:	fcf403a3          	sb	a5,-57(s0)
+80000d2c:	fc744783          	lbu	a5,-57(s0)
+80000d30:	00078f13          	mv	t5,a5
+80000d34:	800017b7          	lui	a5,0x80001
+80000d38:	d9c78f93          	addi	t6,a5,-612 # 80000d9c <barrier_bool+0xfefd7ad4>
+80000d3c:	000f206b          	0xf206b
+80000d40:	01ff707b          	0x1ff707b
+80000d44:	fcc42783          	lw	a5,-52(s0)
+80000d48:	00279793          	slli	a5,a5,0x2
+80000d4c:	fdc42703          	lw	a4,-36(s0)
+80000d50:	00f707b3          	add	a5,a4,a5
+80000d54:	0007a683          	lw	a3,0(a5)
+80000d58:	fcc42783          	lw	a5,-52(s0)
+80000d5c:	00279793          	slli	a5,a5,0x2
+80000d60:	fd842703          	lw	a4,-40(s0)
+80000d64:	00f707b3          	add	a5,a4,a5
+80000d68:	0007a703          	lw	a4,0(a5)
+80000d6c:	fcc42783          	lw	a5,-52(s0)
+80000d70:	00279793          	slli	a5,a5,0x2
+80000d74:	fd442603          	lw	a2,-44(s0)
+80000d78:	00f607b3          	add	a5,a2,a5
+80000d7c:	00e68733          	add	a4,a3,a4
+80000d80:	00e7a023          	sw	a4,0(a5)
+80000d84:	fe842783          	lw	a5,-24(s0)
+80000d88:	00178793          	addi	a5,a5,1
+80000d8c:	fef42423          	sw	a5,-24(s0)
+80000d90:	800017b7          	lui	a5,0x80001
+80000d94:	da078e13          	addi	t3,a5,-608 # 80000da0 <barrier_bool+0xfefd7ad8>
+80000d98:	000e0067          	jr	t3
+80000d9c:	00000013          	nop
+80000da0:	0000306b          	0x306b
+80000da4:	fe442783          	lw	a5,-28(s0)
+80000da8:	00178793          	addi	a5,a5,1
+80000dac:	fef42223          	sw	a5,-28(s0)
+80000db0:	fe442783          	lw	a5,-28(s0)
+80000db4:	fec42703          	lw	a4,-20(s0)
+80000db8:	f2e7eee3          	bltu	a5,a4,80000cf4 <_vx_mat_add+0x8c>
+80000dbc:	00000013          	nop
+80000dc0:	04c12083          	lw	ra,76(sp)
+80000dc4:	04812403          	lw	s0,72(sp)
+80000dc8:	05010113          	addi	sp,sp,80
+80000dcc:	00008067          	ret
 
-80000e60 <vx_mat_sub>:
-80000e60:	fc010113          	addi	sp,sp,-64
-80000e64:	02112e23          	sw	ra,60(sp)
-80000e68:	02812c23          	sw	s0,56(sp)
-80000e6c:	04010413          	addi	s0,sp,64
-80000e70:	fca42e23          	sw	a0,-36(s0)
-80000e74:	fcb42c23          	sw	a1,-40(s0)
-80000e78:	fcc42a23          	sw	a2,-44(s0)
-80000e7c:	fcd42823          	sw	a3,-48(s0)
-80000e80:	fce42623          	sw	a4,-52(s0)
-80000e84:	810267b7          	lui	a5,0x81026
-80000e88:	fdc42703          	lw	a4,-36(s0)
-80000e8c:	1ce7a623          	sw	a4,460(a5) # 810261cc <barrier_bool+0xffffcf08>
+80000dd0 <vx_mat_sub>:
+80000dd0:	fc010113          	addi	sp,sp,-64
+80000dd4:	02112e23          	sw	ra,60(sp)
+80000dd8:	02812c23          	sw	s0,56(sp)
+80000ddc:	04010413          	addi	s0,sp,64
+80000de0:	fca42e23          	sw	a0,-36(s0)
+80000de4:	fcb42c23          	sw	a1,-40(s0)
+80000de8:	fcc42a23          	sw	a2,-44(s0)
+80000dec:	fcd42823          	sw	a3,-48(s0)
+80000df0:	fce42623          	sw	a4,-52(s0)
+80000df4:	810267b7          	lui	a5,0x81026
+80000df8:	fdc42703          	lw	a4,-36(s0)
+80000dfc:	1ce7a823          	sw	a4,464(a5) # 810261d0 <barrier_bool+0xffffcf08>
+80000e00:	810267b7          	lui	a5,0x81026
+80000e04:	1d078793          	addi	a5,a5,464 # 810261d0 <barrier_bool+0xffffcf08>
+80000e08:	fd842703          	lw	a4,-40(s0)
+80000e0c:	00e7a223          	sw	a4,4(a5)
+80000e10:	810267b7          	lui	a5,0x81026
+80000e14:	1d078793          	addi	a5,a5,464 # 810261d0 <barrier_bool+0xffffcf08>
+80000e18:	fd442703          	lw	a4,-44(s0)
+80000e1c:	00e7a423          	sw	a4,8(a5)
+80000e20:	810267b7          	lui	a5,0x81026
+80000e24:	1d078793          	addi	a5,a5,464 # 810261d0 <barrier_bool+0xffffcf08>
+80000e28:	fcc42703          	lw	a4,-52(s0)
+80000e2c:	00e7a623          	sw	a4,12(a5)
+80000e30:	810267b7          	lui	a5,0x81026
+80000e34:	1d078793          	addi	a5,a5,464 # 810261d0 <barrier_bool+0xffffcf08>
+80000e38:	fd042703          	lw	a4,-48(s0)
+80000e3c:	00e7a823          	sw	a4,16(a5)
+80000e40:	ba4ff0ef          	jal	ra,800001e4 <vx_available_threads>
+80000e44:	fea42423          	sw	a0,-24(s0)
+80000e48:	fcc42703          	lw	a4,-52(s0)
+80000e4c:	fe842783          	lw	a5,-24(s0)
+80000e50:	02f757b3          	divu	a5,a4,a5
+80000e54:	fef42623          	sw	a5,-20(s0)
+80000e58:	fcc42703          	lw	a4,-52(s0)
+80000e5c:	fe842783          	lw	a5,-24(s0)
+80000e60:	02f777b3          	remu	a5,a4,a5
+80000e64:	00078863          	beqz	a5,80000e74 <vx_mat_sub+0xa4>
+80000e68:	fec42783          	lw	a5,-20(s0)
+80000e6c:	00178793          	addi	a5,a5,1
+80000e70:	fef42623          	sw	a5,-20(s0)
+80000e74:	810267b7          	lui	a5,0x81026
+80000e78:	1d078793          	addi	a5,a5,464 # 810261d0 <barrier_bool+0xffffcf08>
+80000e7c:	fec42703          	lw	a4,-20(s0)
+80000e80:	00e7aa23          	sw	a4,20(a5)
+80000e84:	fcc42703          	lw	a4,-52(s0)
+80000e88:	fe842783          	lw	a5,-24(s0)
+80000e8c:	02f76263          	bltu	a4,a5,80000eb0 <vx_mat_sub+0xe0>
 80000e90:	810267b7          	lui	a5,0x81026
-80000e94:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000e98:	fd842703          	lw	a4,-40(s0)
-80000e9c:	00e7a223          	sw	a4,4(a5)
-80000ea0:	810267b7          	lui	a5,0x81026
-80000ea4:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000ea8:	fd442703          	lw	a4,-44(s0)
-80000eac:	00e7a423          	sw	a4,8(a5)
+80000e94:	1d078693          	addi	a3,a5,464 # 810261d0 <barrier_bool+0xffffcf08>
+80000e98:	800017b7          	lui	a5,0x80001
+80000e9c:	f0878613          	addi	a2,a5,-248 # 80000f08 <barrier_bool+0xfefd7c40>
+80000ea0:	fe842583          	lw	a1,-24(s0)
+80000ea4:	fd042503          	lw	a0,-48(s0)
+80000ea8:	db4ff0ef          	jal	ra,8000045c <vx_spawnWarps>
+80000eac:	0200006f          	j	80000ecc <vx_mat_sub+0xfc>
 80000eb0:	810267b7          	lui	a5,0x81026
-80000eb4:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000eb8:	fcc42703          	lw	a4,-52(s0)
-80000ebc:	00e7a623          	sw	a4,12(a5)
-80000ec0:	810267b7          	lui	a5,0x81026
-80000ec4:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000ec8:	fd042703          	lw	a4,-48(s0)
-80000ecc:	00e7a823          	sw	a4,16(a5)
-80000ed0:	b28ff0ef          	jal	ra,800001f8 <vx_available_threads>
-80000ed4:	fea42423          	sw	a0,-24(s0)
-80000ed8:	fcc42703          	lw	a4,-52(s0)
-80000edc:	fe842783          	lw	a5,-24(s0)
-80000ee0:	02f757b3          	divu	a5,a4,a5
-80000ee4:	fef42623          	sw	a5,-20(s0)
-80000ee8:	fcc42703          	lw	a4,-52(s0)
-80000eec:	fe842783          	lw	a5,-24(s0)
-80000ef0:	02f777b3          	remu	a5,a4,a5
-80000ef4:	00078863          	beqz	a5,80000f04 <vx_mat_sub+0xa4>
-80000ef8:	fec42783          	lw	a5,-20(s0)
-80000efc:	00178793          	addi	a5,a5,1
-80000f00:	fef42623          	sw	a5,-20(s0)
-80000f04:	810267b7          	lui	a5,0x81026
-80000f08:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000f0c:	fec42703          	lw	a4,-20(s0)
-80000f10:	00e7aa23          	sw	a4,20(a5)
-80000f14:	fcc42703          	lw	a4,-52(s0)
-80000f18:	fe842783          	lw	a5,-24(s0)
-80000f1c:	02f76263          	bltu	a4,a5,80000f40 <vx_mat_sub+0xe0>
-80000f20:	810267b7          	lui	a5,0x81026
-80000f24:	1cc78693          	addi	a3,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000f28:	800017b7          	lui	a5,0x80001
-80000f2c:	f9878613          	addi	a2,a5,-104 # 80000f98 <barrier_bool+0xfefd7cd4>
-80000f30:	fe842583          	lw	a1,-24(s0)
-80000f34:	fd042503          	lw	a0,-48(s0)
-80000f38:	d38ff0ef          	jal	ra,80000470 <vx_spawnWarps>
-80000f3c:	0200006f          	j	80000f5c <vx_mat_sub+0xfc>
-80000f40:	810267b7          	lui	a5,0x81026
-80000f44:	1cc78693          	addi	a3,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000f48:	800017b7          	lui	a5,0x80001
-80000f4c:	f9878613          	addi	a2,a5,-104 # 80000f98 <barrier_bool+0xfefd7cd4>
-80000f50:	fcc42583          	lw	a1,-52(s0)
-80000f54:	fd042503          	lw	a0,-48(s0)
-80000f58:	d18ff0ef          	jal	ra,80000470 <vx_spawnWarps>
-80000f5c:	a94ff0ef          	jal	ra,800001f0 <vx_available_warps>
-80000f60:	fea42223          	sw	a0,-28(s0)
-80000f64:	fd042703          	lw	a4,-48(s0)
-80000f68:	fe442783          	lw	a5,-28(s0)
-80000f6c:	00e7f863          	bgeu	a5,a4,80000f7c <vx_mat_sub+0x11c>
-80000f70:	fe442503          	lw	a0,-28(s0)
-80000f74:	decff0ef          	jal	ra,80000560 <vx_wait_for_warps>
-80000f78:	00c0006f          	j	80000f84 <vx_mat_sub+0x124>
-80000f7c:	fd042503          	lw	a0,-48(s0)
-80000f80:	de0ff0ef          	jal	ra,80000560 <vx_wait_for_warps>
-80000f84:	00000013          	nop
-80000f88:	03c12083          	lw	ra,60(sp)
-80000f8c:	03812403          	lw	s0,56(sp)
-80000f90:	04010113          	addi	sp,sp,64
-80000f94:	00008067          	ret
+80000eb4:	1d078693          	addi	a3,a5,464 # 810261d0 <barrier_bool+0xffffcf08>
+80000eb8:	800017b7          	lui	a5,0x80001
+80000ebc:	f0878613          	addi	a2,a5,-248 # 80000f08 <barrier_bool+0xfefd7c40>
+80000ec0:	fcc42583          	lw	a1,-52(s0)
+80000ec4:	fd042503          	lw	a0,-48(s0)
+80000ec8:	d94ff0ef          	jal	ra,8000045c <vx_spawnWarps>
+80000ecc:	b10ff0ef          	jal	ra,800001dc <vx_available_warps>
+80000ed0:	fea42223          	sw	a0,-28(s0)
+80000ed4:	fd042703          	lw	a4,-48(s0)
+80000ed8:	fe442783          	lw	a5,-28(s0)
+80000edc:	00e7f863          	bgeu	a5,a4,80000eec <vx_mat_sub+0x11c>
+80000ee0:	fe442503          	lw	a0,-28(s0)
+80000ee4:	e68ff0ef          	jal	ra,8000054c <vx_wait_for_warps>
+80000ee8:	00c0006f          	j	80000ef4 <vx_mat_sub+0x124>
+80000eec:	fd042503          	lw	a0,-48(s0)
+80000ef0:	e5cff0ef          	jal	ra,8000054c <vx_wait_for_warps>
+80000ef4:	00000013          	nop
+80000ef8:	03c12083          	lw	ra,60(sp)
+80000efc:	03812403          	lw	s0,56(sp)
+80000f00:	04010113          	addi	sp,sp,64
+80000f04:	00008067          	ret
 
-80000f98 <_vx_mat_sub>:
-80000f98:	fb010113          	addi	sp,sp,-80
-80000f9c:	04112623          	sw	ra,76(sp)
-80000fa0:	04812423          	sw	s0,72(sp)
-80000fa4:	05010413          	addi	s0,sp,80
-80000fa8:	faa42e23          	sw	a0,-68(s0)
-80000fac:	fab42c23          	sw	a1,-72(s0)
-80000fb0:	ea0ff0ef          	jal	ra,80000650 <vx_get_arg_struct>
-80000fb4:	fea42023          	sw	a0,-32(s0)
-80000fb8:	fe042783          	lw	a5,-32(s0)
-80000fbc:	0007a783          	lw	a5,0(a5)
-80000fc0:	fcf42e23          	sw	a5,-36(s0)
-80000fc4:	fe042783          	lw	a5,-32(s0)
-80000fc8:	0047a783          	lw	a5,4(a5)
-80000fcc:	fcf42c23          	sw	a5,-40(s0)
-80000fd0:	fe042783          	lw	a5,-32(s0)
-80000fd4:	0087a783          	lw	a5,8(a5)
-80000fd8:	fcf42a23          	sw	a5,-44(s0)
-80000fdc:	fe042783          	lw	a5,-32(s0)
-80000fe0:	0147a783          	lw	a5,20(a5)
-80000fe4:	fef42623          	sw	a5,-20(s0)
-80000fe8:	fec42703          	lw	a4,-20(s0)
-80000fec:	fbc42783          	lw	a5,-68(s0)
-80000ff0:	02f707b3          	mul	a5,a4,a5
-80000ff4:	fef42423          	sw	a5,-24(s0)
-80000ff8:	fec42783          	lw	a5,-20(s0)
-80000ffc:	00079a63          	bnez	a5,80001010 <_vx_mat_sub+0x78>
-80001000:	00100793          	li	a5,1
-80001004:	fef42623          	sw	a5,-20(s0)
-80001008:	fbc42783          	lw	a5,-68(s0)
-8000100c:	fef42423          	sw	a5,-24(s0)
-80001010:	fe042783          	lw	a5,-32(s0)
-80001014:	00c7a783          	lw	a5,12(a5)
-80001018:	fcf42823          	sw	a5,-48(s0)
-8000101c:	fe042223          	sw	zero,-28(s0)
-80001020:	0c00006f          	j	800010e0 <_vx_mat_sub+0x148>
-80001024:	fb842703          	lw	a4,-72(s0)
-80001028:	fd042783          	lw	a5,-48(s0)
-8000102c:	02f70733          	mul	a4,a4,a5
-80001030:	fe842783          	lw	a5,-24(s0)
-80001034:	00f707b3          	add	a5,a4,a5
-80001038:	fcf42623          	sw	a5,-52(s0)
-8000103c:	fe842703          	lw	a4,-24(s0)
-80001040:	fd042783          	lw	a5,-48(s0)
-80001044:	00f737b3          	sltu	a5,a4,a5
-80001048:	0ff7f793          	andi	a5,a5,255
-8000104c:	fcf42423          	sw	a5,-56(s0)
-80001050:	fc842783          	lw	a5,-56(s0)
-80001054:	0017b793          	seqz	a5,a5
-80001058:	fcf403a3          	sb	a5,-57(s0)
-8000105c:	fc744783          	lbu	a5,-57(s0)
-80001060:	00078f13          	mv	t5,a5
-80001064:	800017b7          	lui	a5,0x80001
-80001068:	0cc78f93          	addi	t6,a5,204 # 800010cc <barrier_bool+0xfefd7e08>
-8000106c:	000f206b          	0xf206b
-80001070:	01ff707b          	0x1ff707b
-80001074:	fcc42783          	lw	a5,-52(s0)
-80001078:	00279793          	slli	a5,a5,0x2
-8000107c:	fdc42703          	lw	a4,-36(s0)
-80001080:	00f707b3          	add	a5,a4,a5
-80001084:	0007a683          	lw	a3,0(a5)
-80001088:	fcc42783          	lw	a5,-52(s0)
-8000108c:	00279793          	slli	a5,a5,0x2
-80001090:	fd842703          	lw	a4,-40(s0)
-80001094:	00f707b3          	add	a5,a4,a5
-80001098:	0007a703          	lw	a4,0(a5)
-8000109c:	fcc42783          	lw	a5,-52(s0)
-800010a0:	00279793          	slli	a5,a5,0x2
-800010a4:	fd442603          	lw	a2,-44(s0)
-800010a8:	00f607b3          	add	a5,a2,a5
-800010ac:	40e68733          	sub	a4,a3,a4
-800010b0:	00e7a023          	sw	a4,0(a5)
-800010b4:	fe842783          	lw	a5,-24(s0)
-800010b8:	00178793          	addi	a5,a5,1
-800010bc:	fef42423          	sw	a5,-24(s0)
-800010c0:	800017b7          	lui	a5,0x80001
-800010c4:	0d078e13          	addi	t3,a5,208 # 800010d0 <barrier_bool+0xfefd7e0c>
-800010c8:	000e0067          	jr	t3
-800010cc:	00000013          	nop
-800010d0:	0000306b          	0x306b
-800010d4:	fe442783          	lw	a5,-28(s0)
-800010d8:	00178793          	addi	a5,a5,1
-800010dc:	fef42223          	sw	a5,-28(s0)
-800010e0:	fe442783          	lw	a5,-28(s0)
-800010e4:	fec42703          	lw	a4,-20(s0)
-800010e8:	f2e7eee3          	bltu	a5,a4,80001024 <_vx_mat_sub+0x8c>
-800010ec:	00000013          	nop
-800010f0:	04c12083          	lw	ra,76(sp)
-800010f4:	04812403          	lw	s0,72(sp)
-800010f8:	05010113          	addi	sp,sp,80
-800010fc:	00008067          	ret
+80000f08 <_vx_mat_sub>:
+80000f08:	fb010113          	addi	sp,sp,-80
+80000f0c:	04112623          	sw	ra,76(sp)
+80000f10:	04812423          	sw	s0,72(sp)
+80000f14:	05010413          	addi	s0,sp,80
+80000f18:	faa42e23          	sw	a0,-68(s0)
+80000f1c:	fab42c23          	sw	a1,-72(s0)
+80000f20:	f1cff0ef          	jal	ra,8000063c <vx_get_arg_struct>
+80000f24:	fea42023          	sw	a0,-32(s0)
+80000f28:	fe042783          	lw	a5,-32(s0)
+80000f2c:	0007a783          	lw	a5,0(a5)
+80000f30:	fcf42e23          	sw	a5,-36(s0)
+80000f34:	fe042783          	lw	a5,-32(s0)
+80000f38:	0047a783          	lw	a5,4(a5)
+80000f3c:	fcf42c23          	sw	a5,-40(s0)
+80000f40:	fe042783          	lw	a5,-32(s0)
+80000f44:	0087a783          	lw	a5,8(a5)
+80000f48:	fcf42a23          	sw	a5,-44(s0)
+80000f4c:	fe042783          	lw	a5,-32(s0)
+80000f50:	0147a783          	lw	a5,20(a5)
+80000f54:	fef42623          	sw	a5,-20(s0)
+80000f58:	fec42703          	lw	a4,-20(s0)
+80000f5c:	fbc42783          	lw	a5,-68(s0)
+80000f60:	02f707b3          	mul	a5,a4,a5
+80000f64:	fef42423          	sw	a5,-24(s0)
+80000f68:	fec42783          	lw	a5,-20(s0)
+80000f6c:	00079a63          	bnez	a5,80000f80 <_vx_mat_sub+0x78>
+80000f70:	00100793          	li	a5,1
+80000f74:	fef42623          	sw	a5,-20(s0)
+80000f78:	fbc42783          	lw	a5,-68(s0)
+80000f7c:	fef42423          	sw	a5,-24(s0)
+80000f80:	fe042783          	lw	a5,-32(s0)
+80000f84:	00c7a783          	lw	a5,12(a5)
+80000f88:	fcf42823          	sw	a5,-48(s0)
+80000f8c:	fe042223          	sw	zero,-28(s0)
+80000f90:	0c00006f          	j	80001050 <_vx_mat_sub+0x148>
+80000f94:	fb842703          	lw	a4,-72(s0)
+80000f98:	fd042783          	lw	a5,-48(s0)
+80000f9c:	02f70733          	mul	a4,a4,a5
+80000fa0:	fe842783          	lw	a5,-24(s0)
+80000fa4:	00f707b3          	add	a5,a4,a5
+80000fa8:	fcf42623          	sw	a5,-52(s0)
+80000fac:	fe842703          	lw	a4,-24(s0)
+80000fb0:	fd042783          	lw	a5,-48(s0)
+80000fb4:	00f737b3          	sltu	a5,a4,a5
+80000fb8:	0ff7f793          	andi	a5,a5,255
+80000fbc:	fcf42423          	sw	a5,-56(s0)
+80000fc0:	fc842783          	lw	a5,-56(s0)
+80000fc4:	0017b793          	seqz	a5,a5
+80000fc8:	fcf403a3          	sb	a5,-57(s0)
+80000fcc:	fc744783          	lbu	a5,-57(s0)
+80000fd0:	00078f13          	mv	t5,a5
+80000fd4:	800017b7          	lui	a5,0x80001
+80000fd8:	03c78f93          	addi	t6,a5,60 # 8000103c <barrier_bool+0xfefd7d74>
+80000fdc:	000f206b          	0xf206b
+80000fe0:	01ff707b          	0x1ff707b
+80000fe4:	fcc42783          	lw	a5,-52(s0)
+80000fe8:	00279793          	slli	a5,a5,0x2
+80000fec:	fdc42703          	lw	a4,-36(s0)
+80000ff0:	00f707b3          	add	a5,a4,a5
+80000ff4:	0007a683          	lw	a3,0(a5)
+80000ff8:	fcc42783          	lw	a5,-52(s0)
+80000ffc:	00279793          	slli	a5,a5,0x2
+80001000:	fd842703          	lw	a4,-40(s0)
+80001004:	00f707b3          	add	a5,a4,a5
+80001008:	0007a703          	lw	a4,0(a5)
+8000100c:	fcc42783          	lw	a5,-52(s0)
+80001010:	00279793          	slli	a5,a5,0x2
+80001014:	fd442603          	lw	a2,-44(s0)
+80001018:	00f607b3          	add	a5,a2,a5
+8000101c:	40e68733          	sub	a4,a3,a4
+80001020:	00e7a023          	sw	a4,0(a5)
+80001024:	fe842783          	lw	a5,-24(s0)
+80001028:	00178793          	addi	a5,a5,1
+8000102c:	fef42423          	sw	a5,-24(s0)
+80001030:	800017b7          	lui	a5,0x80001
+80001034:	04078e13          	addi	t3,a5,64 # 80001040 <barrier_bool+0xfefd7d78>
+80001038:	000e0067          	jr	t3
+8000103c:	00000013          	nop
+80001040:	0000306b          	0x306b
+80001044:	fe442783          	lw	a5,-28(s0)
+80001048:	00178793          	addi	a5,a5,1
+8000104c:	fef42223          	sw	a5,-28(s0)
+80001050:	fe442783          	lw	a5,-28(s0)
+80001054:	fec42703          	lw	a4,-20(s0)
+80001058:	f2e7eee3          	bltu	a5,a4,80000f94 <_vx_mat_sub+0x8c>
+8000105c:	00000013          	nop
+80001060:	04c12083          	lw	ra,76(sp)
+80001064:	04812403          	lw	s0,72(sp)
+80001068:	05010113          	addi	sp,sp,80
+8000106c:	00008067          	ret
 
-80001100 <vx_e_mat_add>:
-80001100:	fc010113          	addi	sp,sp,-64
-80001104:	02112e23          	sw	ra,60(sp)
-80001108:	02812c23          	sw	s0,56(sp)
-8000110c:	04010413          	addi	s0,sp,64
-80001110:	fca42e23          	sw	a0,-36(s0)
-80001114:	fcb42c23          	sw	a1,-40(s0)
-80001118:	fcc42a23          	sw	a2,-44(s0)
-8000111c:	fcd42823          	sw	a3,-48(s0)
-80001120:	fce42623          	sw	a4,-52(s0)
-80001124:	810267b7          	lui	a5,0x81026
-80001128:	fdc42703          	lw	a4,-36(s0)
-8000112c:	1ee7a223          	sw	a4,484(a5) # 810261e4 <barrier_bool+0xffffcf20>
+80001070 <vx_e_mat_add>:
+80001070:	fc010113          	addi	sp,sp,-64
+80001074:	02112e23          	sw	ra,60(sp)
+80001078:	02812c23          	sw	s0,56(sp)
+8000107c:	04010413          	addi	s0,sp,64
+80001080:	fca42e23          	sw	a0,-36(s0)
+80001084:	fcb42c23          	sw	a1,-40(s0)
+80001088:	fcc42a23          	sw	a2,-44(s0)
+8000108c:	fcd42823          	sw	a3,-48(s0)
+80001090:	fce42623          	sw	a4,-52(s0)
+80001094:	810267b7          	lui	a5,0x81026
+80001098:	fdc42703          	lw	a4,-36(s0)
+8000109c:	1ee7a423          	sw	a4,488(a5) # 810261e8 <barrier_bool+0xffffcf20>
+800010a0:	810267b7          	lui	a5,0x81026
+800010a4:	1e878793          	addi	a5,a5,488 # 810261e8 <barrier_bool+0xffffcf20>
+800010a8:	fd842703          	lw	a4,-40(s0)
+800010ac:	00e7a223          	sw	a4,4(a5)
+800010b0:	810267b7          	lui	a5,0x81026
+800010b4:	1e878793          	addi	a5,a5,488 # 810261e8 <barrier_bool+0xffffcf20>
+800010b8:	fd442703          	lw	a4,-44(s0)
+800010bc:	00e7a423          	sw	a4,8(a5)
+800010c0:	810267b7          	lui	a5,0x81026
+800010c4:	1e878793          	addi	a5,a5,488 # 810261e8 <barrier_bool+0xffffcf20>
+800010c8:	fcc42703          	lw	a4,-52(s0)
+800010cc:	00e7a623          	sw	a4,12(a5)
+800010d0:	810267b7          	lui	a5,0x81026
+800010d4:	1e878793          	addi	a5,a5,488 # 810261e8 <barrier_bool+0xffffcf20>
+800010d8:	fd042703          	lw	a4,-48(s0)
+800010dc:	00e7a823          	sw	a4,16(a5)
+800010e0:	904ff0ef          	jal	ra,800001e4 <vx_available_threads>
+800010e4:	fea42423          	sw	a0,-24(s0)
+800010e8:	fcc42703          	lw	a4,-52(s0)
+800010ec:	fe842783          	lw	a5,-24(s0)
+800010f0:	02f757b3          	divu	a5,a4,a5
+800010f4:	fef42623          	sw	a5,-20(s0)
+800010f8:	fcc42703          	lw	a4,-52(s0)
+800010fc:	fe842783          	lw	a5,-24(s0)
+80001100:	02f777b3          	remu	a5,a4,a5
+80001104:	00078863          	beqz	a5,80001114 <vx_e_mat_add+0xa4>
+80001108:	fec42783          	lw	a5,-20(s0)
+8000110c:	00178793          	addi	a5,a5,1
+80001110:	fef42623          	sw	a5,-20(s0)
+80001114:	810267b7          	lui	a5,0x81026
+80001118:	1e878793          	addi	a5,a5,488 # 810261e8 <barrier_bool+0xffffcf20>
+8000111c:	fec42703          	lw	a4,-20(s0)
+80001120:	00e7aa23          	sw	a4,20(a5)
+80001124:	fcc42703          	lw	a4,-52(s0)
+80001128:	fe842783          	lw	a5,-24(s0)
+8000112c:	02f76263          	bltu	a4,a5,80001150 <vx_e_mat_add+0xe0>
 80001130:	810267b7          	lui	a5,0x81026
-80001134:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-80001138:	fd842703          	lw	a4,-40(s0)
-8000113c:	00e7a223          	sw	a4,4(a5)
-80001140:	810267b7          	lui	a5,0x81026
-80001144:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-80001148:	fd442703          	lw	a4,-44(s0)
-8000114c:	00e7a423          	sw	a4,8(a5)
+80001134:	1e878693          	addi	a3,a5,488 # 810261e8 <barrier_bool+0xffffcf20>
+80001138:	800017b7          	lui	a5,0x80001
+8000113c:	1a878613          	addi	a2,a5,424 # 800011a8 <barrier_bool+0xfefd7ee0>
+80001140:	fe842583          	lw	a1,-24(s0)
+80001144:	fd042503          	lw	a0,-48(s0)
+80001148:	b14ff0ef          	jal	ra,8000045c <vx_spawnWarps>
+8000114c:	0200006f          	j	8000116c <vx_e_mat_add+0xfc>
 80001150:	810267b7          	lui	a5,0x81026
-80001154:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-80001158:	fcc42703          	lw	a4,-52(s0)
-8000115c:	00e7a623          	sw	a4,12(a5)
-80001160:	810267b7          	lui	a5,0x81026
-80001164:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-80001168:	fd042703          	lw	a4,-48(s0)
-8000116c:	00e7a823          	sw	a4,16(a5)
-80001170:	888ff0ef          	jal	ra,800001f8 <vx_available_threads>
-80001174:	fea42423          	sw	a0,-24(s0)
-80001178:	fcc42703          	lw	a4,-52(s0)
-8000117c:	fe842783          	lw	a5,-24(s0)
-80001180:	02f757b3          	divu	a5,a4,a5
-80001184:	fef42623          	sw	a5,-20(s0)
-80001188:	fcc42703          	lw	a4,-52(s0)
-8000118c:	fe842783          	lw	a5,-24(s0)
-80001190:	02f777b3          	remu	a5,a4,a5
-80001194:	00078863          	beqz	a5,800011a4 <vx_e_mat_add+0xa4>
-80001198:	fec42783          	lw	a5,-20(s0)
-8000119c:	00178793          	addi	a5,a5,1
-800011a0:	fef42623          	sw	a5,-20(s0)
-800011a4:	810267b7          	lui	a5,0x81026
-800011a8:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-800011ac:	fec42703          	lw	a4,-20(s0)
-800011b0:	00e7aa23          	sw	a4,20(a5)
-800011b4:	fcc42703          	lw	a4,-52(s0)
-800011b8:	fe842783          	lw	a5,-24(s0)
-800011bc:	02f76263          	bltu	a4,a5,800011e0 <vx_e_mat_add+0xe0>
-800011c0:	810267b7          	lui	a5,0x81026
-800011c4:	1e478693          	addi	a3,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-800011c8:	800017b7          	lui	a5,0x80001
-800011cc:	23878613          	addi	a2,a5,568 # 80001238 <barrier_bool+0xfefd7f74>
-800011d0:	fe842583          	lw	a1,-24(s0)
-800011d4:	fd042503          	lw	a0,-48(s0)
-800011d8:	a98ff0ef          	jal	ra,80000470 <vx_spawnWarps>
-800011dc:	0200006f          	j	800011fc <vx_e_mat_add+0xfc>
-800011e0:	810267b7          	lui	a5,0x81026
-800011e4:	1e478693          	addi	a3,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-800011e8:	800017b7          	lui	a5,0x80001
-800011ec:	23878613          	addi	a2,a5,568 # 80001238 <barrier_bool+0xfefd7f74>
-800011f0:	fcc42583          	lw	a1,-52(s0)
-800011f4:	fd042503          	lw	a0,-48(s0)
-800011f8:	a78ff0ef          	jal	ra,80000470 <vx_spawnWarps>
-800011fc:	ff5fe0ef          	jal	ra,800001f0 <vx_available_warps>
-80001200:	fea42223          	sw	a0,-28(s0)
-80001204:	fd042703          	lw	a4,-48(s0)
-80001208:	fe442783          	lw	a5,-28(s0)
-8000120c:	00e7f863          	bgeu	a5,a4,8000121c <vx_e_mat_add+0x11c>
-80001210:	fe442503          	lw	a0,-28(s0)
-80001214:	b4cff0ef          	jal	ra,80000560 <vx_wait_for_warps>
-80001218:	00c0006f          	j	80001224 <vx_e_mat_add+0x124>
-8000121c:	fd042503          	lw	a0,-48(s0)
-80001220:	b40ff0ef          	jal	ra,80000560 <vx_wait_for_warps>
-80001224:	00000013          	nop
-80001228:	03c12083          	lw	ra,60(sp)
-8000122c:	03812403          	lw	s0,56(sp)
-80001230:	04010113          	addi	sp,sp,64
-80001234:	00008067          	ret
+80001154:	1e878693          	addi	a3,a5,488 # 810261e8 <barrier_bool+0xffffcf20>
+80001158:	800017b7          	lui	a5,0x80001
+8000115c:	1a878613          	addi	a2,a5,424 # 800011a8 <barrier_bool+0xfefd7ee0>
+80001160:	fcc42583          	lw	a1,-52(s0)
+80001164:	fd042503          	lw	a0,-48(s0)
+80001168:	af4ff0ef          	jal	ra,8000045c <vx_spawnWarps>
+8000116c:	870ff0ef          	jal	ra,800001dc <vx_available_warps>
+80001170:	fea42223          	sw	a0,-28(s0)
+80001174:	fd042703          	lw	a4,-48(s0)
+80001178:	fe442783          	lw	a5,-28(s0)
+8000117c:	00e7f863          	bgeu	a5,a4,8000118c <vx_e_mat_add+0x11c>
+80001180:	fe442503          	lw	a0,-28(s0)
+80001184:	bc8ff0ef          	jal	ra,8000054c <vx_wait_for_warps>
+80001188:	00c0006f          	j	80001194 <vx_e_mat_add+0x124>
+8000118c:	fd042503          	lw	a0,-48(s0)
+80001190:	bbcff0ef          	jal	ra,8000054c <vx_wait_for_warps>
+80001194:	00000013          	nop
+80001198:	03c12083          	lw	ra,60(sp)
+8000119c:	03812403          	lw	s0,56(sp)
+800011a0:	04010113          	addi	sp,sp,64
+800011a4:	00008067          	ret
 
-80001238 <_vx_e_mat_add>:
-80001238:	fb010113          	addi	sp,sp,-80
-8000123c:	04112623          	sw	ra,76(sp)
-80001240:	04812423          	sw	s0,72(sp)
-80001244:	05010413          	addi	s0,sp,80
-80001248:	faa42e23          	sw	a0,-68(s0)
-8000124c:	fab42c23          	sw	a1,-72(s0)
-80001250:	c00ff0ef          	jal	ra,80000650 <vx_get_arg_struct>
-80001254:	fea42023          	sw	a0,-32(s0)
-80001258:	fe042783          	lw	a5,-32(s0)
-8000125c:	0007a783          	lw	a5,0(a5)
-80001260:	fcf42e23          	sw	a5,-36(s0)
-80001264:	fe042783          	lw	a5,-32(s0)
-80001268:	0047a783          	lw	a5,4(a5)
-8000126c:	0007a783          	lw	a5,0(a5)
-80001270:	fcf42c23          	sw	a5,-40(s0)
-80001274:	fe042783          	lw	a5,-32(s0)
-80001278:	0087a783          	lw	a5,8(a5)
-8000127c:	fcf42a23          	sw	a5,-44(s0)
-80001280:	fe042783          	lw	a5,-32(s0)
-80001284:	0147a783          	lw	a5,20(a5)
-80001288:	fef42623          	sw	a5,-20(s0)
-8000128c:	fec42703          	lw	a4,-20(s0)
-80001290:	fbc42783          	lw	a5,-68(s0)
-80001294:	02f707b3          	mul	a5,a4,a5
-80001298:	fef42423          	sw	a5,-24(s0)
-8000129c:	fec42783          	lw	a5,-20(s0)
-800012a0:	00079a63          	bnez	a5,800012b4 <_vx_e_mat_add+0x7c>
-800012a4:	00100793          	li	a5,1
-800012a8:	fef42623          	sw	a5,-20(s0)
-800012ac:	fbc42783          	lw	a5,-68(s0)
-800012b0:	fef42423          	sw	a5,-24(s0)
-800012b4:	fe042783          	lw	a5,-32(s0)
-800012b8:	00c7a783          	lw	a5,12(a5)
-800012bc:	fcf42823          	sw	a5,-48(s0)
-800012c0:	fe042223          	sw	zero,-28(s0)
-800012c4:	0b00006f          	j	80001374 <_vx_e_mat_add+0x13c>
-800012c8:	fb842703          	lw	a4,-72(s0)
-800012cc:	fd042783          	lw	a5,-48(s0)
-800012d0:	02f70733          	mul	a4,a4,a5
-800012d4:	fe842783          	lw	a5,-24(s0)
-800012d8:	00f707b3          	add	a5,a4,a5
-800012dc:	fcf42623          	sw	a5,-52(s0)
-800012e0:	fe842703          	lw	a4,-24(s0)
-800012e4:	fd042783          	lw	a5,-48(s0)
-800012e8:	00f737b3          	sltu	a5,a4,a5
-800012ec:	0ff7f793          	andi	a5,a5,255
-800012f0:	fcf42423          	sw	a5,-56(s0)
-800012f4:	fc842783          	lw	a5,-56(s0)
-800012f8:	0017b793          	seqz	a5,a5
-800012fc:	fcf403a3          	sb	a5,-57(s0)
-80001300:	fc744783          	lbu	a5,-57(s0)
-80001304:	00078f13          	mv	t5,a5
-80001308:	800017b7          	lui	a5,0x80001
-8000130c:	36078f93          	addi	t6,a5,864 # 80001360 <barrier_bool+0xfefd809c>
-80001310:	000f206b          	0xf206b
-80001314:	01ff707b          	0x1ff707b
-80001318:	fcc42783          	lw	a5,-52(s0)
-8000131c:	00279793          	slli	a5,a5,0x2
-80001320:	fdc42703          	lw	a4,-36(s0)
-80001324:	00f707b3          	add	a5,a4,a5
-80001328:	0007a683          	lw	a3,0(a5)
-8000132c:	fcc42783          	lw	a5,-52(s0)
-80001330:	00279793          	slli	a5,a5,0x2
-80001334:	fd442703          	lw	a4,-44(s0)
-80001338:	00f707b3          	add	a5,a4,a5
+800011a8 <_vx_e_mat_add>:
+800011a8:	fb010113          	addi	sp,sp,-80
+800011ac:	04112623          	sw	ra,76(sp)
+800011b0:	04812423          	sw	s0,72(sp)
+800011b4:	05010413          	addi	s0,sp,80
+800011b8:	faa42e23          	sw	a0,-68(s0)
+800011bc:	fab42c23          	sw	a1,-72(s0)
+800011c0:	c7cff0ef          	jal	ra,8000063c <vx_get_arg_struct>
+800011c4:	fea42023          	sw	a0,-32(s0)
+800011c8:	fe042783          	lw	a5,-32(s0)
+800011cc:	0007a783          	lw	a5,0(a5)
+800011d0:	fcf42e23          	sw	a5,-36(s0)
+800011d4:	fe042783          	lw	a5,-32(s0)
+800011d8:	0047a783          	lw	a5,4(a5)
+800011dc:	0007a783          	lw	a5,0(a5)
+800011e0:	fcf42c23          	sw	a5,-40(s0)
+800011e4:	fe042783          	lw	a5,-32(s0)
+800011e8:	0087a783          	lw	a5,8(a5)
+800011ec:	fcf42a23          	sw	a5,-44(s0)
+800011f0:	fe042783          	lw	a5,-32(s0)
+800011f4:	0147a783          	lw	a5,20(a5)
+800011f8:	fef42623          	sw	a5,-20(s0)
+800011fc:	fec42703          	lw	a4,-20(s0)
+80001200:	fbc42783          	lw	a5,-68(s0)
+80001204:	02f707b3          	mul	a5,a4,a5
+80001208:	fef42423          	sw	a5,-24(s0)
+8000120c:	fec42783          	lw	a5,-20(s0)
+80001210:	00079a63          	bnez	a5,80001224 <_vx_e_mat_add+0x7c>
+80001214:	00100793          	li	a5,1
+80001218:	fef42623          	sw	a5,-20(s0)
+8000121c:	fbc42783          	lw	a5,-68(s0)
+80001220:	fef42423          	sw	a5,-24(s0)
+80001224:	fe042783          	lw	a5,-32(s0)
+80001228:	00c7a783          	lw	a5,12(a5)
+8000122c:	fcf42823          	sw	a5,-48(s0)
+80001230:	fe042223          	sw	zero,-28(s0)
+80001234:	0b00006f          	j	800012e4 <_vx_e_mat_add+0x13c>
+80001238:	fb842703          	lw	a4,-72(s0)
+8000123c:	fd042783          	lw	a5,-48(s0)
+80001240:	02f70733          	mul	a4,a4,a5
+80001244:	fe842783          	lw	a5,-24(s0)
+80001248:	00f707b3          	add	a5,a4,a5
+8000124c:	fcf42623          	sw	a5,-52(s0)
+80001250:	fe842703          	lw	a4,-24(s0)
+80001254:	fd042783          	lw	a5,-48(s0)
+80001258:	00f737b3          	sltu	a5,a4,a5
+8000125c:	0ff7f793          	andi	a5,a5,255
+80001260:	fcf42423          	sw	a5,-56(s0)
+80001264:	fc842783          	lw	a5,-56(s0)
+80001268:	0017b793          	seqz	a5,a5
+8000126c:	fcf403a3          	sb	a5,-57(s0)
+80001270:	fc744783          	lbu	a5,-57(s0)
+80001274:	00078f13          	mv	t5,a5
+80001278:	800017b7          	lui	a5,0x80001
+8000127c:	2d078f93          	addi	t6,a5,720 # 800012d0 <barrier_bool+0xfefd8008>
+80001280:	000f206b          	0xf206b
+80001284:	01ff707b          	0x1ff707b
+80001288:	fcc42783          	lw	a5,-52(s0)
+8000128c:	00279793          	slli	a5,a5,0x2
+80001290:	fdc42703          	lw	a4,-36(s0)
+80001294:	00f707b3          	add	a5,a4,a5
+80001298:	0007a683          	lw	a3,0(a5)
+8000129c:	fcc42783          	lw	a5,-52(s0)
+800012a0:	00279793          	slli	a5,a5,0x2
+800012a4:	fd442703          	lw	a4,-44(s0)
+800012a8:	00f707b3          	add	a5,a4,a5
+800012ac:	fd842703          	lw	a4,-40(s0)
+800012b0:	00e68733          	add	a4,a3,a4
+800012b4:	00e7a023          	sw	a4,0(a5)
+800012b8:	fe842783          	lw	a5,-24(s0)
+800012bc:	00178793          	addi	a5,a5,1
+800012c0:	fef42423          	sw	a5,-24(s0)
+800012c4:	800017b7          	lui	a5,0x80001
+800012c8:	2d478e13          	addi	t3,a5,724 # 800012d4 <barrier_bool+0xfefd800c>
+800012cc:	000e0067          	jr	t3
+800012d0:	00000013          	nop
+800012d4:	0000306b          	0x306b
+800012d8:	fe442783          	lw	a5,-28(s0)
+800012dc:	00178793          	addi	a5,a5,1
+800012e0:	fef42223          	sw	a5,-28(s0)
+800012e4:	fe442783          	lw	a5,-28(s0)
+800012e8:	fec42703          	lw	a4,-20(s0)
+800012ec:	f4e7e6e3          	bltu	a5,a4,80001238 <_vx_e_mat_add+0x90>
+800012f0:	00000013          	nop
+800012f4:	04c12083          	lw	ra,76(sp)
+800012f8:	04812403          	lw	s0,72(sp)
+800012fc:	05010113          	addi	sp,sp,80
+80001300:	00008067          	ret
+
+80001304 <vx_e_mat_mult>:
+80001304:	fc010113          	addi	sp,sp,-64
+80001308:	02112e23          	sw	ra,60(sp)
+8000130c:	02812c23          	sw	s0,56(sp)
+80001310:	04010413          	addi	s0,sp,64
+80001314:	fca42e23          	sw	a0,-36(s0)
+80001318:	fcb42c23          	sw	a1,-40(s0)
+8000131c:	fcc42a23          	sw	a2,-44(s0)
+80001320:	fcd42823          	sw	a3,-48(s0)
+80001324:	fce42623          	sw	a4,-52(s0)
+80001328:	810267b7          	lui	a5,0x81026
+8000132c:	fdc42703          	lw	a4,-36(s0)
+80001330:	1ee7a423          	sw	a4,488(a5) # 810261e8 <barrier_bool+0xffffcf20>
+80001334:	810267b7          	lui	a5,0x81026
+80001338:	1e878793          	addi	a5,a5,488 # 810261e8 <barrier_bool+0xffffcf20>
 8000133c:	fd842703          	lw	a4,-40(s0)
-80001340:	00e68733          	add	a4,a3,a4
-80001344:	00e7a023          	sw	a4,0(a5)
-80001348:	fe842783          	lw	a5,-24(s0)
-8000134c:	00178793          	addi	a5,a5,1
-80001350:	fef42423          	sw	a5,-24(s0)
-80001354:	800017b7          	lui	a5,0x80001
-80001358:	36478e13          	addi	t3,a5,868 # 80001364 <barrier_bool+0xfefd80a0>
-8000135c:	000e0067          	jr	t3
-80001360:	00000013          	nop
-80001364:	0000306b          	0x306b
-80001368:	fe442783          	lw	a5,-28(s0)
-8000136c:	00178793          	addi	a5,a5,1
-80001370:	fef42223          	sw	a5,-28(s0)
-80001374:	fe442783          	lw	a5,-28(s0)
-80001378:	fec42703          	lw	a4,-20(s0)
-8000137c:	f4e7e6e3          	bltu	a5,a4,800012c8 <_vx_e_mat_add+0x90>
-80001380:	00000013          	nop
-80001384:	04c12083          	lw	ra,76(sp)
-80001388:	04812403          	lw	s0,72(sp)
-8000138c:	05010113          	addi	sp,sp,80
-80001390:	00008067          	ret
-
-80001394 <vx_e_mat_mult>:
-80001394:	fc010113          	addi	sp,sp,-64
-80001398:	02112e23          	sw	ra,60(sp)
-8000139c:	02812c23          	sw	s0,56(sp)
-800013a0:	04010413          	addi	s0,sp,64
-800013a4:	fca42e23          	sw	a0,-36(s0)
-800013a8:	fcb42c23          	sw	a1,-40(s0)
-800013ac:	fcc42a23          	sw	a2,-44(s0)
-800013b0:	fcd42823          	sw	a3,-48(s0)
-800013b4:	fce42623          	sw	a4,-52(s0)
-800013b8:	810267b7          	lui	a5,0x81026
-800013bc:	fdc42703          	lw	a4,-36(s0)
-800013c0:	1ee7a223          	sw	a4,484(a5) # 810261e4 <barrier_bool+0xffffcf20>
+80001340:	00e7a223          	sw	a4,4(a5)
+80001344:	810267b7          	lui	a5,0x81026
+80001348:	1e878793          	addi	a5,a5,488 # 810261e8 <barrier_bool+0xffffcf20>
+8000134c:	fd442703          	lw	a4,-44(s0)
+80001350:	00e7a423          	sw	a4,8(a5)
+80001354:	810267b7          	lui	a5,0x81026
+80001358:	1e878793          	addi	a5,a5,488 # 810261e8 <barrier_bool+0xffffcf20>
+8000135c:	fcc42703          	lw	a4,-52(s0)
+80001360:	00e7a623          	sw	a4,12(a5)
+80001364:	810267b7          	lui	a5,0x81026
+80001368:	1e878793          	addi	a5,a5,488 # 810261e8 <barrier_bool+0xffffcf20>
+8000136c:	fd042703          	lw	a4,-48(s0)
+80001370:	00e7a823          	sw	a4,16(a5)
+80001374:	e71fe0ef          	jal	ra,800001e4 <vx_available_threads>
+80001378:	fea42423          	sw	a0,-24(s0)
+8000137c:	fcc42703          	lw	a4,-52(s0)
+80001380:	fe842783          	lw	a5,-24(s0)
+80001384:	02f757b3          	divu	a5,a4,a5
+80001388:	fef42623          	sw	a5,-20(s0)
+8000138c:	fcc42703          	lw	a4,-52(s0)
+80001390:	fe842783          	lw	a5,-24(s0)
+80001394:	02f777b3          	remu	a5,a4,a5
+80001398:	00078863          	beqz	a5,800013a8 <vx_e_mat_mult+0xa4>
+8000139c:	fec42783          	lw	a5,-20(s0)
+800013a0:	00178793          	addi	a5,a5,1
+800013a4:	fef42623          	sw	a5,-20(s0)
+800013a8:	810267b7          	lui	a5,0x81026
+800013ac:	1e878793          	addi	a5,a5,488 # 810261e8 <barrier_bool+0xffffcf20>
+800013b0:	fec42703          	lw	a4,-20(s0)
+800013b4:	00e7aa23          	sw	a4,20(a5)
+800013b8:	fcc42703          	lw	a4,-52(s0)
+800013bc:	fe842783          	lw	a5,-24(s0)
+800013c0:	02f76263          	bltu	a4,a5,800013e4 <vx_e_mat_mult+0xe0>
 800013c4:	810267b7          	lui	a5,0x81026
-800013c8:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-800013cc:	fd842703          	lw	a4,-40(s0)
-800013d0:	00e7a223          	sw	a4,4(a5)
-800013d4:	810267b7          	lui	a5,0x81026
-800013d8:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-800013dc:	fd442703          	lw	a4,-44(s0)
-800013e0:	00e7a423          	sw	a4,8(a5)
+800013c8:	1e878693          	addi	a3,a5,488 # 810261e8 <barrier_bool+0xffffcf20>
+800013cc:	800017b7          	lui	a5,0x80001
+800013d0:	43c78613          	addi	a2,a5,1084 # 8000143c <barrier_bool+0xfefd8174>
+800013d4:	fe842583          	lw	a1,-24(s0)
+800013d8:	fd042503          	lw	a0,-48(s0)
+800013dc:	880ff0ef          	jal	ra,8000045c <vx_spawnWarps>
+800013e0:	0200006f          	j	80001400 <vx_e_mat_mult+0xfc>
 800013e4:	810267b7          	lui	a5,0x81026
-800013e8:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-800013ec:	fcc42703          	lw	a4,-52(s0)
-800013f0:	00e7a623          	sw	a4,12(a5)
-800013f4:	810267b7          	lui	a5,0x81026
-800013f8:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-800013fc:	fd042703          	lw	a4,-48(s0)
-80001400:	00e7a823          	sw	a4,16(a5)
-80001404:	df5fe0ef          	jal	ra,800001f8 <vx_available_threads>
-80001408:	fea42423          	sw	a0,-24(s0)
-8000140c:	fcc42703          	lw	a4,-52(s0)
-80001410:	fe842783          	lw	a5,-24(s0)
-80001414:	02f757b3          	divu	a5,a4,a5
-80001418:	fef42623          	sw	a5,-20(s0)
-8000141c:	fcc42703          	lw	a4,-52(s0)
-80001420:	fe842783          	lw	a5,-24(s0)
-80001424:	02f777b3          	remu	a5,a4,a5
-80001428:	00078863          	beqz	a5,80001438 <vx_e_mat_mult+0xa4>
-8000142c:	fec42783          	lw	a5,-20(s0)
-80001430:	00178793          	addi	a5,a5,1
-80001434:	fef42623          	sw	a5,-20(s0)
-80001438:	810267b7          	lui	a5,0x81026
-8000143c:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-80001440:	fec42703          	lw	a4,-20(s0)
-80001444:	00e7aa23          	sw	a4,20(a5)
-80001448:	fcc42703          	lw	a4,-52(s0)
-8000144c:	fe842783          	lw	a5,-24(s0)
-80001450:	02f76263          	bltu	a4,a5,80001474 <vx_e_mat_mult+0xe0>
-80001454:	810267b7          	lui	a5,0x81026
-80001458:	1e478693          	addi	a3,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-8000145c:	800017b7          	lui	a5,0x80001
-80001460:	4cc78613          	addi	a2,a5,1228 # 800014cc <barrier_bool+0xfefd8208>
-80001464:	fe842583          	lw	a1,-24(s0)
-80001468:	fd042503          	lw	a0,-48(s0)
-8000146c:	804ff0ef          	jal	ra,80000470 <vx_spawnWarps>
-80001470:	0200006f          	j	80001490 <vx_e_mat_mult+0xfc>
-80001474:	810267b7          	lui	a5,0x81026
-80001478:	1e478693          	addi	a3,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-8000147c:	800017b7          	lui	a5,0x80001
-80001480:	4cc78613          	addi	a2,a5,1228 # 800014cc <barrier_bool+0xfefd8208>
-80001484:	fcc42583          	lw	a1,-52(s0)
-80001488:	fd042503          	lw	a0,-48(s0)
-8000148c:	fe5fe0ef          	jal	ra,80000470 <vx_spawnWarps>
-80001490:	d61fe0ef          	jal	ra,800001f0 <vx_available_warps>
-80001494:	fea42223          	sw	a0,-28(s0)
-80001498:	fd042703          	lw	a4,-48(s0)
-8000149c:	fe442783          	lw	a5,-28(s0)
-800014a0:	00e7f863          	bgeu	a5,a4,800014b0 <vx_e_mat_mult+0x11c>
-800014a4:	fe442503          	lw	a0,-28(s0)
-800014a8:	8b8ff0ef          	jal	ra,80000560 <vx_wait_for_warps>
-800014ac:	00c0006f          	j	800014b8 <vx_e_mat_mult+0x124>
-800014b0:	fd042503          	lw	a0,-48(s0)
-800014b4:	8acff0ef          	jal	ra,80000560 <vx_wait_for_warps>
-800014b8:	00000013          	nop
-800014bc:	03c12083          	lw	ra,60(sp)
-800014c0:	03812403          	lw	s0,56(sp)
-800014c4:	04010113          	addi	sp,sp,64
-800014c8:	00008067          	ret
+800013e8:	1e878693          	addi	a3,a5,488 # 810261e8 <barrier_bool+0xffffcf20>
+800013ec:	800017b7          	lui	a5,0x80001
+800013f0:	43c78613          	addi	a2,a5,1084 # 8000143c <barrier_bool+0xfefd8174>
+800013f4:	fcc42583          	lw	a1,-52(s0)
+800013f8:	fd042503          	lw	a0,-48(s0)
+800013fc:	860ff0ef          	jal	ra,8000045c <vx_spawnWarps>
+80001400:	dddfe0ef          	jal	ra,800001dc <vx_available_warps>
+80001404:	fea42223          	sw	a0,-28(s0)
+80001408:	fd042703          	lw	a4,-48(s0)
+8000140c:	fe442783          	lw	a5,-28(s0)
+80001410:	00e7f863          	bgeu	a5,a4,80001420 <vx_e_mat_mult+0x11c>
+80001414:	fe442503          	lw	a0,-28(s0)
+80001418:	934ff0ef          	jal	ra,8000054c <vx_wait_for_warps>
+8000141c:	00c0006f          	j	80001428 <vx_e_mat_mult+0x124>
+80001420:	fd042503          	lw	a0,-48(s0)
+80001424:	928ff0ef          	jal	ra,8000054c <vx_wait_for_warps>
+80001428:	00000013          	nop
+8000142c:	03c12083          	lw	ra,60(sp)
+80001430:	03812403          	lw	s0,56(sp)
+80001434:	04010113          	addi	sp,sp,64
+80001438:	00008067          	ret
 
-800014cc <_vx_e_mat_mult>:
-800014cc:	fb010113          	addi	sp,sp,-80
-800014d0:	04112623          	sw	ra,76(sp)
-800014d4:	04812423          	sw	s0,72(sp)
-800014d8:	05010413          	addi	s0,sp,80
-800014dc:	faa42e23          	sw	a0,-68(s0)
-800014e0:	fab42c23          	sw	a1,-72(s0)
-800014e4:	96cff0ef          	jal	ra,80000650 <vx_get_arg_struct>
-800014e8:	fea42023          	sw	a0,-32(s0)
-800014ec:	fe042783          	lw	a5,-32(s0)
-800014f0:	0007a783          	lw	a5,0(a5)
-800014f4:	fcf42e23          	sw	a5,-36(s0)
-800014f8:	fe042783          	lw	a5,-32(s0)
-800014fc:	0047a783          	lw	a5,4(a5)
-80001500:	0007a783          	lw	a5,0(a5)
-80001504:	fcf42c23          	sw	a5,-40(s0)
-80001508:	fe042783          	lw	a5,-32(s0)
-8000150c:	0087a783          	lw	a5,8(a5)
-80001510:	fcf42a23          	sw	a5,-44(s0)
-80001514:	fe042783          	lw	a5,-32(s0)
-80001518:	0147a783          	lw	a5,20(a5)
-8000151c:	fef42623          	sw	a5,-20(s0)
-80001520:	fec42703          	lw	a4,-20(s0)
-80001524:	fbc42783          	lw	a5,-68(s0)
-80001528:	02f707b3          	mul	a5,a4,a5
-8000152c:	fef42423          	sw	a5,-24(s0)
-80001530:	fec42783          	lw	a5,-20(s0)
-80001534:	00079a63          	bnez	a5,80001548 <_vx_e_mat_mult+0x7c>
-80001538:	00100793          	li	a5,1
-8000153c:	fef42623          	sw	a5,-20(s0)
-80001540:	fbc42783          	lw	a5,-68(s0)
-80001544:	fef42423          	sw	a5,-24(s0)
-80001548:	fe042783          	lw	a5,-32(s0)
-8000154c:	00c7a783          	lw	a5,12(a5)
-80001550:	fcf42823          	sw	a5,-48(s0)
-80001554:	fe042223          	sw	zero,-28(s0)
-80001558:	0b00006f          	j	80001608 <_vx_e_mat_mult+0x13c>
-8000155c:	fb842703          	lw	a4,-72(s0)
-80001560:	fd042783          	lw	a5,-48(s0)
-80001564:	02f70733          	mul	a4,a4,a5
-80001568:	fe842783          	lw	a5,-24(s0)
-8000156c:	00f707b3          	add	a5,a4,a5
-80001570:	fcf42623          	sw	a5,-52(s0)
-80001574:	fe842703          	lw	a4,-24(s0)
-80001578:	fd042783          	lw	a5,-48(s0)
-8000157c:	00f737b3          	sltu	a5,a4,a5
-80001580:	0ff7f793          	andi	a5,a5,255
-80001584:	fcf42423          	sw	a5,-56(s0)
-80001588:	fc842783          	lw	a5,-56(s0)
-8000158c:	0017b793          	seqz	a5,a5
-80001590:	fcf403a3          	sb	a5,-57(s0)
-80001594:	fc744783          	lbu	a5,-57(s0)
-80001598:	00078f13          	mv	t5,a5
-8000159c:	800017b7          	lui	a5,0x80001
-800015a0:	5f478f93          	addi	t6,a5,1524 # 800015f4 <barrier_bool+0xfefd8330>
-800015a4:	000f206b          	0xf206b
-800015a8:	01ff707b          	0x1ff707b
-800015ac:	fcc42783          	lw	a5,-52(s0)
-800015b0:	00279793          	slli	a5,a5,0x2
-800015b4:	fdc42703          	lw	a4,-36(s0)
-800015b8:	00f707b3          	add	a5,a4,a5
-800015bc:	0007a683          	lw	a3,0(a5)
-800015c0:	fcc42783          	lw	a5,-52(s0)
-800015c4:	00279793          	slli	a5,a5,0x2
-800015c8:	fd442703          	lw	a4,-44(s0)
-800015cc:	00f707b3          	add	a5,a4,a5
-800015d0:	fd842703          	lw	a4,-40(s0)
-800015d4:	02e68733          	mul	a4,a3,a4
-800015d8:	00e7a023          	sw	a4,0(a5)
-800015dc:	fe842783          	lw	a5,-24(s0)
-800015e0:	00178793          	addi	a5,a5,1
-800015e4:	fef42423          	sw	a5,-24(s0)
-800015e8:	800017b7          	lui	a5,0x80001
-800015ec:	5f878e13          	addi	t3,a5,1528 # 800015f8 <barrier_bool+0xfefd8334>
-800015f0:	000e0067          	jr	t3
-800015f4:	00000013          	nop
-800015f8:	0000306b          	0x306b
-800015fc:	fe442783          	lw	a5,-28(s0)
-80001600:	00178793          	addi	a5,a5,1
-80001604:	fef42223          	sw	a5,-28(s0)
-80001608:	fe442783          	lw	a5,-28(s0)
-8000160c:	fec42703          	lw	a4,-20(s0)
-80001610:	f4e7e6e3          	bltu	a5,a4,8000155c <_vx_e_mat_mult+0x90>
-80001614:	00000013          	nop
-80001618:	04c12083          	lw	ra,76(sp)
-8000161c:	04812403          	lw	s0,72(sp)
-80001620:	05010113          	addi	sp,sp,80
-80001624:	00008067          	ret
+8000143c <_vx_e_mat_mult>:
+8000143c:	fb010113          	addi	sp,sp,-80
+80001440:	04112623          	sw	ra,76(sp)
+80001444:	04812423          	sw	s0,72(sp)
+80001448:	05010413          	addi	s0,sp,80
+8000144c:	faa42e23          	sw	a0,-68(s0)
+80001450:	fab42c23          	sw	a1,-72(s0)
+80001454:	9e8ff0ef          	jal	ra,8000063c <vx_get_arg_struct>
+80001458:	fea42023          	sw	a0,-32(s0)
+8000145c:	fe042783          	lw	a5,-32(s0)
+80001460:	0007a783          	lw	a5,0(a5)
+80001464:	fcf42e23          	sw	a5,-36(s0)
+80001468:	fe042783          	lw	a5,-32(s0)
+8000146c:	0047a783          	lw	a5,4(a5)
+80001470:	0007a783          	lw	a5,0(a5)
+80001474:	fcf42c23          	sw	a5,-40(s0)
+80001478:	fe042783          	lw	a5,-32(s0)
+8000147c:	0087a783          	lw	a5,8(a5)
+80001480:	fcf42a23          	sw	a5,-44(s0)
+80001484:	fe042783          	lw	a5,-32(s0)
+80001488:	0147a783          	lw	a5,20(a5)
+8000148c:	fef42623          	sw	a5,-20(s0)
+80001490:	fec42703          	lw	a4,-20(s0)
+80001494:	fbc42783          	lw	a5,-68(s0)
+80001498:	02f707b3          	mul	a5,a4,a5
+8000149c:	fef42423          	sw	a5,-24(s0)
+800014a0:	fec42783          	lw	a5,-20(s0)
+800014a4:	00079a63          	bnez	a5,800014b8 <_vx_e_mat_mult+0x7c>
+800014a8:	00100793          	li	a5,1
+800014ac:	fef42623          	sw	a5,-20(s0)
+800014b0:	fbc42783          	lw	a5,-68(s0)
+800014b4:	fef42423          	sw	a5,-24(s0)
+800014b8:	fe042783          	lw	a5,-32(s0)
+800014bc:	00c7a783          	lw	a5,12(a5)
+800014c0:	fcf42823          	sw	a5,-48(s0)
+800014c4:	fe042223          	sw	zero,-28(s0)
+800014c8:	0b00006f          	j	80001578 <_vx_e_mat_mult+0x13c>
+800014cc:	fb842703          	lw	a4,-72(s0)
+800014d0:	fd042783          	lw	a5,-48(s0)
+800014d4:	02f70733          	mul	a4,a4,a5
+800014d8:	fe842783          	lw	a5,-24(s0)
+800014dc:	00f707b3          	add	a5,a4,a5
+800014e0:	fcf42623          	sw	a5,-52(s0)
+800014e4:	fe842703          	lw	a4,-24(s0)
+800014e8:	fd042783          	lw	a5,-48(s0)
+800014ec:	00f737b3          	sltu	a5,a4,a5
+800014f0:	0ff7f793          	andi	a5,a5,255
+800014f4:	fcf42423          	sw	a5,-56(s0)
+800014f8:	fc842783          	lw	a5,-56(s0)
+800014fc:	0017b793          	seqz	a5,a5
+80001500:	fcf403a3          	sb	a5,-57(s0)
+80001504:	fc744783          	lbu	a5,-57(s0)
+80001508:	00078f13          	mv	t5,a5
+8000150c:	800017b7          	lui	a5,0x80001
+80001510:	56478f93          	addi	t6,a5,1380 # 80001564 <barrier_bool+0xfefd829c>
+80001514:	000f206b          	0xf206b
+80001518:	01ff707b          	0x1ff707b
+8000151c:	fcc42783          	lw	a5,-52(s0)
+80001520:	00279793          	slli	a5,a5,0x2
+80001524:	fdc42703          	lw	a4,-36(s0)
+80001528:	00f707b3          	add	a5,a4,a5
+8000152c:	0007a683          	lw	a3,0(a5)
+80001530:	fcc42783          	lw	a5,-52(s0)
+80001534:	00279793          	slli	a5,a5,0x2
+80001538:	fd442703          	lw	a4,-44(s0)
+8000153c:	00f707b3          	add	a5,a4,a5
+80001540:	fd842703          	lw	a4,-40(s0)
+80001544:	02e68733          	mul	a4,a3,a4
+80001548:	00e7a023          	sw	a4,0(a5)
+8000154c:	fe842783          	lw	a5,-24(s0)
+80001550:	00178793          	addi	a5,a5,1
+80001554:	fef42423          	sw	a5,-24(s0)
+80001558:	800017b7          	lui	a5,0x80001
+8000155c:	56878e13          	addi	t3,a5,1384 # 80001568 <barrier_bool+0xfefd82a0>
+80001560:	000e0067          	jr	t3
+80001564:	00000013          	nop
+80001568:	0000306b          	0x306b
+8000156c:	fe442783          	lw	a5,-28(s0)
+80001570:	00178793          	addi	a5,a5,1
+80001574:	fef42223          	sw	a5,-28(s0)
+80001578:	fe442783          	lw	a5,-28(s0)
+8000157c:	fec42703          	lw	a4,-20(s0)
+80001580:	f4e7e6e3          	bltu	a5,a4,800014cc <_vx_e_mat_mult+0x90>
+80001584:	00000013          	nop
+80001588:	04c12083          	lw	ra,76(sp)
+8000158c:	04812403          	lw	s0,72(sp)
+80001590:	05010113          	addi	sp,sp,80
+80001594:	00008067          	ret
 
-80001628 <sleep>:
-80001628:	fd010113          	addi	sp,sp,-48
-8000162c:	02812623          	sw	s0,44(sp)
-80001630:	03010413          	addi	s0,sp,48
-80001634:	fca42e23          	sw	a0,-36(s0)
-80001638:	fe042623          	sw	zero,-20(s0)
-8000163c:	0100006f          	j	8000164c <sleep+0x24>
+80001598 <sleep>:
+80001598:	fd010113          	addi	sp,sp,-48
+8000159c:	02812623          	sw	s0,44(sp)
+800015a0:	03010413          	addi	s0,sp,48
+800015a4:	fca42e23          	sw	a0,-36(s0)
+800015a8:	fe042623          	sw	zero,-20(s0)
+800015ac:	0100006f          	j	800015bc <sleep+0x24>
+800015b0:	fec42783          	lw	a5,-20(s0)
+800015b4:	00178793          	addi	a5,a5,1
+800015b8:	fef42623          	sw	a5,-20(s0)
+800015bc:	fec42703          	lw	a4,-20(s0)
+800015c0:	fdc42783          	lw	a5,-36(s0)
+800015c4:	fef746e3          	blt	a4,a5,800015b0 <sleep+0x18>
+800015c8:	00000013          	nop
+800015cc:	02c12403          	lw	s0,44(sp)
+800015d0:	03010113          	addi	sp,sp,48
+800015d4:	00008067          	ret
+
+800015d8 <barrier>:
+800015d8:	fd010113          	addi	sp,sp,-48
+800015dc:	02112623          	sw	ra,44(sp)
+800015e0:	02812423          	sw	s0,40(sp)
+800015e4:	03010413          	addi	s0,sp,48
+800015e8:	fca42e23          	sw	a0,-36(s0)
+800015ec:	fcb42c23          	sw	a1,-40(s0)
+800015f0:	810267b7          	lui	a5,0x81026
+800015f4:	20078713          	addi	a4,a5,512 # 81026200 <barrier_bool+0xffffcf38>
+800015f8:	fdc42783          	lw	a5,-36(s0)
+800015fc:	00f707b3          	add	a5,a4,a5
+80001600:	00100713          	li	a4,1
+80001604:	00e78023          	sb	a4,0(a5)
+80001608:	fdc42783          	lw	a5,-36(s0)
+8000160c:	0c079063          	bnez	a5,800016cc <barrier+0xf4>
+80001610:	fe0401a3          	sb	zero,-29(s0)
+80001614:	fe042623          	sw	zero,-20(s0)
+80001618:	0a80006f          	j	800016c0 <barrier+0xe8>
+8000161c:	fe042623          	sw	zero,-20(s0)
+80001620:	fe042423          	sw	zero,-24(s0)
+80001624:	0340006f          	j	80001658 <barrier+0x80>
+80001628:	810267b7          	lui	a5,0x81026
+8000162c:	20078713          	addi	a4,a5,512 # 81026200 <barrier_bool+0xffffcf38>
+80001630:	fe842783          	lw	a5,-24(s0)
+80001634:	00f707b3          	add	a5,a4,a5
+80001638:	0007c783          	lbu	a5,0(a5)
+8000163c:	00078863          	beqz	a5,8000164c <barrier+0x74>
 80001640:	fec42783          	lw	a5,-20(s0)
 80001644:	00178793          	addi	a5,a5,1
 80001648:	fef42623          	sw	a5,-20(s0)
-8000164c:	fec42703          	lw	a4,-20(s0)
-80001650:	fdc42783          	lw	a5,-36(s0)
-80001654:	fef746e3          	blt	a4,a5,80001640 <sleep+0x18>
-80001658:	00000013          	nop
-8000165c:	02c12403          	lw	s0,44(sp)
-80001660:	03010113          	addi	sp,sp,48
-80001664:	00008067          	ret
-
-80001668 <barrier>:
-80001668:	fd010113          	addi	sp,sp,-48
-8000166c:	02112623          	sw	ra,44(sp)
-80001670:	02812423          	sw	s0,40(sp)
-80001674:	03010413          	addi	s0,sp,48
-80001678:	fca42e23          	sw	a0,-36(s0)
-8000167c:	fcb42c23          	sw	a1,-40(s0)
-80001680:	810267b7          	lui	a5,0x81026
-80001684:	1fc78713          	addi	a4,a5,508 # 810261fc <barrier_bool+0xffffcf38>
-80001688:	fdc42783          	lw	a5,-36(s0)
-8000168c:	00f707b3          	add	a5,a4,a5
+8000164c:	fe842783          	lw	a5,-24(s0)
+80001650:	00178793          	addi	a5,a5,1
+80001654:	fef42423          	sw	a5,-24(s0)
+80001658:	fe842703          	lw	a4,-24(s0)
+8000165c:	fd842783          	lw	a5,-40(s0)
+80001660:	fcf744e3          	blt	a4,a5,80001628 <barrier+0x50>
+80001664:	fec42703          	lw	a4,-20(s0)
+80001668:	fd842783          	lw	a5,-40(s0)
+8000166c:	04f71a63          	bne	a4,a5,800016c0 <barrier+0xe8>
+80001670:	fe042223          	sw	zero,-28(s0)
+80001674:	0400006f          	j	800016b4 <barrier+0xdc>
+80001678:	810267b7          	lui	a5,0x81026
+8000167c:	20078713          	addi	a4,a5,512 # 81026200 <barrier_bool+0xffffcf38>
+80001680:	fe442783          	lw	a5,-28(s0)
+80001684:	00f707b3          	add	a5,a4,a5
+80001688:	00078023          	sb	zero,0(a5)
+8000168c:	810297b7          	lui	a5,0x81029
 80001690:	00100713          	li	a4,1
-80001694:	00e78023          	sb	a4,0(a5)
-80001698:	fdc42783          	lw	a5,-36(s0)
-8000169c:	0c079063          	bnez	a5,8000175c <barrier+0xf4>
-800016a0:	fe0401a3          	sb	zero,-29(s0)
-800016a4:	fe042623          	sw	zero,-20(s0)
-800016a8:	0a80006f          	j	80001750 <barrier+0xe8>
-800016ac:	fe042623          	sw	zero,-20(s0)
-800016b0:	fe042423          	sw	zero,-24(s0)
-800016b4:	0340006f          	j	800016e8 <barrier+0x80>
-800016b8:	810267b7          	lui	a5,0x81026
-800016bc:	1fc78713          	addi	a4,a5,508 # 810261fc <barrier_bool+0xffffcf38>
-800016c0:	fe842783          	lw	a5,-24(s0)
-800016c4:	00f707b3          	add	a5,a4,a5
-800016c8:	0007c783          	lbu	a5,0(a5)
-800016cc:	00078863          	beqz	a5,800016dc <barrier+0x74>
-800016d0:	fec42783          	lw	a5,-20(s0)
-800016d4:	00178793          	addi	a5,a5,1
-800016d8:	fef42623          	sw	a5,-20(s0)
-800016dc:	fe842783          	lw	a5,-24(s0)
-800016e0:	00178793          	addi	a5,a5,1
-800016e4:	fef42423          	sw	a5,-24(s0)
-800016e8:	fe842703          	lw	a4,-24(s0)
-800016ec:	fd842783          	lw	a5,-40(s0)
-800016f0:	fcf744e3          	blt	a4,a5,800016b8 <barrier+0x50>
-800016f4:	fec42703          	lw	a4,-20(s0)
-800016f8:	fd842783          	lw	a5,-40(s0)
-800016fc:	04f71a63          	bne	a4,a5,80001750 <barrier+0xe8>
-80001700:	fe042223          	sw	zero,-28(s0)
-80001704:	0400006f          	j	80001744 <barrier+0xdc>
-80001708:	810267b7          	lui	a5,0x81026
-8000170c:	1fc78713          	addi	a4,a5,508 # 810261fc <barrier_bool+0xffffcf38>
-80001710:	fe442783          	lw	a5,-28(s0)
-80001714:	00f707b3          	add	a5,a4,a5
-80001718:	00078023          	sb	zero,0(a5)
-8000171c:	810297b7          	lui	a5,0x81029
-80001720:	00100713          	li	a4,1
-80001724:	2ce78223          	sb	a4,708(a5) # 810292c4 <barrier_bool+0x0>
-80001728:	04600513          	li	a0,70
-8000172c:	efdff0ef          	jal	ra,80001628 <sleep>
-80001730:	810297b7          	lui	a5,0x81029
-80001734:	2c078223          	sb	zero,708(a5) # 810292c4 <barrier_bool+0x0>
-80001738:	fe442783          	lw	a5,-28(s0)
-8000173c:	00178793          	addi	a5,a5,1
-80001740:	fef42223          	sw	a5,-28(s0)
-80001744:	fe442703          	lw	a4,-28(s0)
-80001748:	fd842783          	lw	a5,-40(s0)
-8000174c:	faf74ee3          	blt	a4,a5,80001708 <barrier+0xa0>
-80001750:	fe344783          	lbu	a5,-29(s0)
-80001754:	f4079ce3          	bnez	a5,800016ac <barrier+0x44>
-80001758:	0240006f          	j	8000177c <barrier+0x114>
-8000175c:	00000013          	nop
-80001760:	810297b7          	lui	a5,0x81029
-80001764:	2c47c783          	lbu	a5,708(a5) # 810292c4 <barrier_bool+0x0>
-80001768:	0017c793          	xori	a5,a5,1
-8000176c:	0ff7f793          	andi	a5,a5,255
-80001770:	fe0798e3          	bnez	a5,80001760 <barrier+0xf8>
-80001774:	06400513          	li	a0,100
-80001778:	eb1ff0ef          	jal	ra,80001628 <sleep>
-8000177c:	00000013          	nop
-80001780:	02c12083          	lw	ra,44(sp)
-80001784:	02812403          	lw	s0,40(sp)
-80001788:	03010113          	addi	sp,sp,48
-8000178c:	00008067          	ret
+80001694:	2ce78423          	sb	a4,712(a5) # 810292c8 <barrier_bool+0x0>
+80001698:	04600513          	li	a0,70
+8000169c:	efdff0ef          	jal	ra,80001598 <sleep>
+800016a0:	810297b7          	lui	a5,0x81029
+800016a4:	2c078423          	sb	zero,712(a5) # 810292c8 <barrier_bool+0x0>
+800016a8:	fe442783          	lw	a5,-28(s0)
+800016ac:	00178793          	addi	a5,a5,1
+800016b0:	fef42223          	sw	a5,-28(s0)
+800016b4:	fe442703          	lw	a4,-28(s0)
+800016b8:	fd842783          	lw	a5,-40(s0)
+800016bc:	faf74ee3          	blt	a4,a5,80001678 <barrier+0xa0>
+800016c0:	fe344783          	lbu	a5,-29(s0)
+800016c4:	f4079ce3          	bnez	a5,8000161c <barrier+0x44>
+800016c8:	0240006f          	j	800016ec <barrier+0x114>
+800016cc:	00000013          	nop
+800016d0:	810297b7          	lui	a5,0x81029
+800016d4:	2c87c783          	lbu	a5,712(a5) # 810292c8 <barrier_bool+0x0>
+800016d8:	0017c793          	xori	a5,a5,1
+800016dc:	0ff7f793          	andi	a5,a5,255
+800016e0:	fe0798e3          	bnez	a5,800016d0 <barrier+0xf8>
+800016e4:	06400513          	li	a0,100
+800016e8:	eb1ff0ef          	jal	ra,80001598 <sleep>
+800016ec:	00000013          	nop
+800016f0:	02c12083          	lw	ra,44(sp)
+800016f4:	02812403          	lw	s0,40(sp)
+800016f8:	03010113          	addi	sp,sp,48
+800016fc:	00008067          	ret
 
-80001790 <sc_time_stamp>:
-80001790:	ff010113          	addi	sp,sp,-16
-80001794:	00812623          	sw	s0,12(sp)
-80001798:	01010413          	addi	s0,sp,16
-8000179c:	00000793          	li	a5,0
-800017a0:	00000813          	li	a6,0
-800017a4:	00078513          	mv	a0,a5
-800017a8:	00080593          	mv	a1,a6
-800017ac:	00c12403          	lw	s0,12(sp)
-800017b0:	01010113          	addi	sp,sp,16
-800017b4:	00008067          	ret
+80001700 <sc_time_stamp>:
+80001700:	ff010113          	addi	sp,sp,-16
+80001704:	00812623          	sw	s0,12(sp)
+80001708:	01010413          	addi	s0,sp,16
+8000170c:	00000793          	li	a5,0
+80001710:	00000813          	li	a6,0
+80001714:	00078513          	mv	a0,a5
+80001718:	00080593          	mv	a1,a6
+8000171c:	00c12403          	lw	s0,12(sp)
+80001720:	01010113          	addi	sp,sp,16
+80001724:	00008067          	ret
 
-800017b8 <initialize_mats>:
-800017b8:	fe010113          	addi	sp,sp,-32
-800017bc:	00812e23          	sw	s0,28(sp)
-800017c0:	02010413          	addi	s0,sp,32
-800017c4:	fe042623          	sw	zero,-20(s0)
-800017c8:	0480006f          	j	80001810 <initialize_mats+0x58>
-800017cc:	810267b7          	lui	a5,0x81026
-800017d0:	fec42703          	lw	a4,-20(s0)
-800017d4:	00271713          	slli	a4,a4,0x2
-800017d8:	21c78793          	addi	a5,a5,540 # 8102621c <barrier_bool+0xffffcf58>
-800017dc:	00f707b3          	add	a5,a4,a5
-800017e0:	00300713          	li	a4,3
-800017e4:	00e7a023          	sw	a4,0(a5)
-800017e8:	810277b7          	lui	a5,0x81027
-800017ec:	fec42703          	lw	a4,-20(s0)
-800017f0:	00271713          	slli	a4,a4,0x2
-800017f4:	21c78793          	addi	a5,a5,540 # 8102721c <barrier_bool+0xffffdf58>
-800017f8:	00f707b3          	add	a5,a4,a5
-800017fc:	00200713          	li	a4,2
-80001800:	00e7a023          	sw	a4,0(a5)
-80001804:	fec42783          	lw	a5,-20(s0)
-80001808:	00178793          	addi	a5,a5,1
-8000180c:	fef42623          	sw	a5,-20(s0)
-80001810:	fec42703          	lw	a4,-20(s0)
-80001814:	0ff00793          	li	a5,255
-80001818:	fae7dae3          	bge	a5,a4,800017cc <initialize_mats+0x14>
-8000181c:	00000013          	nop
-80001820:	01c12403          	lw	s0,28(sp)
-80001824:	02010113          	addi	sp,sp,32
-80001828:	00008067          	ret
+80001728 <initialize_mats>:
+80001728:	fe010113          	addi	sp,sp,-32
+8000172c:	00812e23          	sw	s0,28(sp)
+80001730:	02010413          	addi	s0,sp,32
+80001734:	fe042623          	sw	zero,-20(s0)
+80001738:	0480006f          	j	80001780 <initialize_mats+0x58>
+8000173c:	810267b7          	lui	a5,0x81026
+80001740:	fec42703          	lw	a4,-20(s0)
+80001744:	00271713          	slli	a4,a4,0x2
+80001748:	22078793          	addi	a5,a5,544 # 81026220 <barrier_bool+0xffffcf58>
+8000174c:	00f707b3          	add	a5,a4,a5
+80001750:	00300713          	li	a4,3
+80001754:	00e7a023          	sw	a4,0(a5)
+80001758:	810277b7          	lui	a5,0x81027
+8000175c:	fec42703          	lw	a4,-20(s0)
+80001760:	00271713          	slli	a4,a4,0x2
+80001764:	22078793          	addi	a5,a5,544 # 81027220 <barrier_bool+0xffffdf58>
+80001768:	00f707b3          	add	a5,a4,a5
+8000176c:	00200713          	li	a4,2
+80001770:	00e7a023          	sw	a4,0(a5)
+80001774:	fec42783          	lw	a5,-20(s0)
+80001778:	00178793          	addi	a5,a5,1
+8000177c:	fef42623          	sw	a5,-20(s0)
+80001780:	fec42703          	lw	a4,-20(s0)
+80001784:	00300793          	li	a5,3
+80001788:	fae7dae3          	bge	a5,a4,8000173c <initialize_mats+0x14>
+8000178c:	00000013          	nop
+80001790:	01c12403          	lw	s0,28(sp)
+80001794:	02010113          	addi	sp,sp,32
+80001798:	00008067          	ret
 
-8000182c <print_matrix>:
-8000182c:	fd010113          	addi	sp,sp,-48
-80001830:	02112623          	sw	ra,44(sp)
-80001834:	02812423          	sw	s0,40(sp)
-80001838:	03010413          	addi	s0,sp,48
-8000183c:	fca42e23          	sw	a0,-36(s0)
-80001840:	810007b7          	lui	a5,0x81000
-80001844:	11878513          	addi	a0,a5,280 # 81000118 <barrier_bool+0xfffd6e54>
-80001848:	f8dfe0ef          	jal	ra,800007d4 <vx_print_str>
-8000184c:	fe042623          	sw	zero,-20(s0)
-80001850:	0580006f          	j	800018a8 <print_matrix+0x7c>
-80001854:	fec42783          	lw	a5,-20(s0)
-80001858:	00078e63          	beqz	a5,80001874 <print_matrix+0x48>
-8000185c:	fec42783          	lw	a5,-20(s0)
-80001860:	00f7f793          	andi	a5,a5,15
-80001864:	00079863          	bnez	a5,80001874 <print_matrix+0x48>
-80001868:	810007b7          	lui	a5,0x81000
-8000186c:	13c78513          	addi	a0,a5,316 # 8100013c <barrier_bool+0xfffd6e78>
-80001870:	f65fe0ef          	jal	ra,800007d4 <vx_print_str>
-80001874:	fec42783          	lw	a5,-20(s0)
-80001878:	00279793          	slli	a5,a5,0x2
-8000187c:	fdc42703          	lw	a4,-36(s0)
-80001880:	00f707b3          	add	a5,a4,a5
-80001884:	0007a783          	lw	a5,0(a5)
-80001888:	00078513          	mv	a0,a5
-8000188c:	f85fe0ef          	jal	ra,80000810 <vx_print_hex>
-80001890:	810007b7          	lui	a5,0x81000
-80001894:	14078513          	addi	a0,a5,320 # 81000140 <barrier_bool+0xfffd6e7c>
-80001898:	f3dfe0ef          	jal	ra,800007d4 <vx_print_str>
-8000189c:	fec42783          	lw	a5,-20(s0)
-800018a0:	00178793          	addi	a5,a5,1
-800018a4:	fef42623          	sw	a5,-20(s0)
-800018a8:	fec42703          	lw	a4,-20(s0)
-800018ac:	0ff00793          	li	a5,255
-800018b0:	fae7d2e3          	bge	a5,a4,80001854 <print_matrix+0x28>
-800018b4:	810007b7          	lui	a5,0x81000
-800018b8:	14478513          	addi	a0,a5,324 # 81000144 <barrier_bool+0xfffd6e80>
-800018bc:	f19fe0ef          	jal	ra,800007d4 <vx_print_str>
-800018c0:	00000013          	nop
-800018c4:	02c12083          	lw	ra,44(sp)
-800018c8:	02812403          	lw	s0,40(sp)
-800018cc:	03010113          	addi	sp,sp,48
-800018d0:	00008067          	ret
+8000179c <print_matrix>:
+8000179c:	fd010113          	addi	sp,sp,-48
+800017a0:	02112623          	sw	ra,44(sp)
+800017a4:	02812423          	sw	s0,40(sp)
+800017a8:	03010413          	addi	s0,sp,48
+800017ac:	fca42e23          	sw	a0,-36(s0)
+800017b0:	810007b7          	lui	a5,0x81000
+800017b4:	11878513          	addi	a0,a5,280 # 81000118 <barrier_bool+0xfffd6e50>
+800017b8:	808ff0ef          	jal	ra,800007c0 <vx_print_str>
+800017bc:	fe042623          	sw	zero,-20(s0)
+800017c0:	0580006f          	j	80001818 <print_matrix+0x7c>
+800017c4:	fec42783          	lw	a5,-20(s0)
+800017c8:	00078e63          	beqz	a5,800017e4 <print_matrix+0x48>
+800017cc:	fec42783          	lw	a5,-20(s0)
+800017d0:	0017f793          	andi	a5,a5,1
+800017d4:	00079863          	bnez	a5,800017e4 <print_matrix+0x48>
+800017d8:	810007b7          	lui	a5,0x81000
+800017dc:	13c78513          	addi	a0,a5,316 # 8100013c <barrier_bool+0xfffd6e74>
+800017e0:	fe1fe0ef          	jal	ra,800007c0 <vx_print_str>
+800017e4:	fec42783          	lw	a5,-20(s0)
+800017e8:	00279793          	slli	a5,a5,0x2
+800017ec:	fdc42703          	lw	a4,-36(s0)
+800017f0:	00f707b3          	add	a5,a4,a5
+800017f4:	0007a783          	lw	a5,0(a5)
+800017f8:	00078513          	mv	a0,a5
+800017fc:	800ff0ef          	jal	ra,800007fc <vx_print_hex>
+80001800:	810007b7          	lui	a5,0x81000
+80001804:	14078513          	addi	a0,a5,320 # 81000140 <barrier_bool+0xfffd6e78>
+80001808:	fb9fe0ef          	jal	ra,800007c0 <vx_print_str>
+8000180c:	fec42783          	lw	a5,-20(s0)
+80001810:	00178793          	addi	a5,a5,1
+80001814:	fef42623          	sw	a5,-20(s0)
+80001818:	fec42703          	lw	a4,-20(s0)
+8000181c:	00300793          	li	a5,3
+80001820:	fae7d2e3          	bge	a5,a4,800017c4 <print_matrix+0x28>
+80001824:	810007b7          	lui	a5,0x81000
+80001828:	14478513          	addi	a0,a5,324 # 81000144 <barrier_bool+0xfffd6e7c>
+8000182c:	f95fe0ef          	jal	ra,800007c0 <vx_print_str>
+80001830:	00000013          	nop
+80001834:	02c12083          	lw	ra,44(sp)
+80001838:	02812403          	lw	s0,40(sp)
+8000183c:	03010113          	addi	sp,sp,48
+80001840:	00008067          	ret
 
-800018d4 <main>:
-800018d4:	ff010113          	addi	sp,sp,-16
-800018d8:	00112623          	sw	ra,12(sp)
-800018dc:	00812423          	sw	s0,8(sp)
-800018e0:	01010413          	addi	s0,sp,16
-800018e4:	ed5ff0ef          	jal	ra,800017b8 <initialize_mats>
-800018e8:	810267b7          	lui	a5,0x81026
-800018ec:	21c78513          	addi	a0,a5,540 # 8102621c <barrier_bool+0xffffcf58>
-800018f0:	f3dff0ef          	jal	ra,8000182c <print_matrix>
-800018f4:	00000793          	li	a5,0
-800018f8:	00078513          	mv	a0,a5
-800018fc:	00c12083          	lw	ra,12(sp)
-80001900:	00812403          	lw	s0,8(sp)
-80001904:	01010113          	addi	sp,sp,16
-80001908:	00008067          	ret
+80001844 <main>:
+80001844:	ff010113          	addi	sp,sp,-16
+80001848:	00112623          	sw	ra,12(sp)
+8000184c:	00812423          	sw	s0,8(sp)
+80001850:	01010413          	addi	s0,sp,16
+80001854:	00b00513          	li	a0,11
+80001858:	fa5fe0ef          	jal	ra,800007fc <vx_print_hex>
+8000185c:	00000793          	li	a5,0
+80001860:	00078513          	mv	a0,a5
+80001864:	00c12083          	lw	ra,12(sp)
+80001868:	00812403          	lw	s0,8(sp)
+8000186c:	01010113          	addi	sp,sp,16
+80001870:	00008067          	ret
 
 Disassembly of section .rodata:
 
@@ -1732,7 +1694,7 @@ Disassembly of section .rodata:
 8100002a:	0000                	unimp
 8100002c:	0062                	c.slli	zero,0x18
 8100002e:	0000                	unimp
-81000030:	00000063          	beqz	zero,81000030 <main+0xffe75c>
+81000030:	00000063          	beqz	zero,81000030 <main+0xffe7ec>
 81000034:	0064                	addi	s1,sp,12
 81000036:	0000                	unimp
 81000038:	0065                	c.nop	25
@@ -1741,7 +1703,7 @@ Disassembly of section .rodata:
 8100003e:	0000                	unimp
 81000040:	74696177          	0x74696177
 81000044:	6620                	flw	fs0,72(a2)
-81000046:	203a726f          	jal	tp,810a7a48 <barrier_bool+0x7e784>
+81000046:	203a726f          	jal	tp,810a7a48 <barrier_bool+0x7e780>
 8100004a:	0000                	unimp
 8100004c:	6f46                	flw	ft10,80(sp)
 8100004e:	6e75                	lui	t3,0x1d
@@ -1769,7 +1731,7 @@ Disassembly of section .rodata:
 8100007e:	0000                	unimp
 81000080:	0062                	c.slli	zero,0x18
 81000082:	0000                	unimp
-81000084:	00000063          	beqz	zero,81000084 <main+0xffe7b0>
+81000084:	00000063          	beqz	zero,81000084 <main+0xffe840>
 81000088:	0064                	addi	s1,sp,12
 8100008a:	0000                	unimp
 8100008c:	0065                	c.nop	25
@@ -1800,7 +1762,7 @@ Disassembly of section .rodata:
 810000c2:	0000                	unimp
 810000c4:	0062                	c.slli	zero,0x18
 810000c6:	0000                	unimp
-810000c8:	00000063          	beqz	zero,810000c8 <main+0xffe7f4>
+810000c8:	00000063          	beqz	zero,810000c8 <main+0xffe884>
 810000cc:	0064                	addi	s1,sp,12
 810000ce:	0000                	unimp
 810000d0:	0065                	c.nop	25
@@ -1829,28 +1791,28 @@ Disassembly of section .rodata:
 81000102:	0000                	unimp
 81000104:	0062                	c.slli	zero,0x18
 81000106:	0000                	unimp
-81000108:	00000063          	beqz	zero,81000108 <main+0xffe834>
+81000108:	00000063          	beqz	zero,81000108 <main+0xffe8c4>
 8100010c:	0064                	addi	s1,sp,12
 8100010e:	0000                	unimp
 81000110:	0065                	c.nop	25
 81000112:	0000                	unimp
 81000114:	0066                	c.slli	zero,0x19
 81000116:	0000                	unimp
-81000118:	2d2d                	jal	81000752 <q+0x342>
-8100011a:	2d2d                	jal	81000754 <q+0x344>
-8100011c:	2d2d                	jal	81000756 <q+0x346>
-8100011e:	2d2d                	jal	81000758 <q+0x348>
-81000120:	2d2d                	jal	8100075a <q+0x34a>
-81000122:	2d2d                	jal	8100075c <q+0x34c>
-81000124:	2d2d                	jal	8100075e <q+0x34e>
-81000126:	2d2d                	jal	81000760 <q+0x350>
-81000128:	2d2d                	jal	81000762 <q+0x352>
-8100012a:	2d2d                	jal	81000764 <q+0x354>
-8100012c:	2d2d                	jal	81000766 <q+0x356>
-8100012e:	2d2d                	jal	81000768 <q+0x358>
-81000130:	2d2d                	jal	8100076a <q+0x35a>
-81000132:	2d2d                	jal	8100076c <q+0x35c>
-81000134:	2d2d                	jal	8100076e <q+0x35e>
+81000118:	2d2d                	jal	81000752 <q+0x33e>
+8100011a:	2d2d                	jal	81000754 <q+0x340>
+8100011c:	2d2d                	jal	81000756 <q+0x342>
+8100011e:	2d2d                	jal	81000758 <q+0x344>
+81000120:	2d2d                	jal	8100075a <q+0x346>
+81000122:	2d2d                	jal	8100075c <q+0x348>
+81000124:	2d2d                	jal	8100075e <q+0x34a>
+81000126:	2d2d                	jal	81000760 <q+0x34c>
+81000128:	2d2d                	jal	81000762 <q+0x34e>
+8100012a:	2d2d                	jal	81000764 <q+0x350>
+8100012c:	2d2d                	jal	81000766 <q+0x352>
+8100012e:	2d2d                	jal	81000768 <q+0x354>
+81000130:	2d2d                	jal	8100076a <q+0x356>
+81000132:	2d2d                	jal	8100076c <q+0x358>
+81000134:	2d2d                	jal	8100076e <q+0x35a>
 81000136:	0a2d                	addi	s4,s4,11
 81000138:	0000                	unimp
 8100013a:	0000                	unimp
@@ -1859,21 +1821,21 @@ Disassembly of section .rodata:
 81000140:	0020                	addi	s0,sp,8
 81000142:	0000                	unimp
 81000144:	2d0a                	fld	fs10,128(sp)
-81000146:	2d2d                	jal	81000780 <q+0x370>
-81000148:	2d2d                	jal	81000782 <q+0x372>
-8100014a:	2d2d                	jal	81000784 <q+0x374>
-8100014c:	2d2d                	jal	81000786 <q+0x376>
-8100014e:	2d2d                	jal	81000788 <q+0x378>
-81000150:	2d2d                	jal	8100078a <q+0x37a>
-81000152:	2d2d                	jal	8100078c <q+0x37c>
-81000154:	2d2d                	jal	8100078e <q+0x37e>
-81000156:	2d2d                	jal	81000790 <q+0x380>
-81000158:	2d2d                	jal	81000792 <q+0x382>
-8100015a:	2d2d                	jal	81000794 <q+0x384>
-8100015c:	2d2d                	jal	81000796 <q+0x386>
-8100015e:	2d2d                	jal	81000798 <q+0x388>
-81000160:	2d2d                	jal	8100079a <q+0x38a>
-81000162:	2d2d                	jal	8100079c <q+0x38c>
+81000146:	2d2d                	jal	81000780 <q+0x36c>
+81000148:	2d2d                	jal	81000782 <q+0x36e>
+8100014a:	2d2d                	jal	81000784 <q+0x370>
+8100014c:	2d2d                	jal	81000786 <q+0x372>
+8100014e:	2d2d                	jal	81000788 <q+0x374>
+81000150:	2d2d                	jal	8100078a <q+0x376>
+81000152:	2d2d                	jal	8100078c <q+0x378>
+81000154:	2d2d                	jal	8100078e <q+0x37a>
+81000156:	2d2d                	jal	81000790 <q+0x37c>
+81000158:	2d2d                	jal	81000792 <q+0x37e>
+8100015a:	2d2d                	jal	81000794 <q+0x380>
+8100015c:	2d2d                	jal	81000796 <q+0x382>
+8100015e:	2d2d                	jal	81000798 <q+0x384>
+81000160:	2d2d                	jal	8100079a <q+0x386>
+81000162:	2d2d                	jal	8100079c <q+0x388>
 81000164:	000a                	c.slli	zero,0x2
 
 Disassembly of section .data:
@@ -2014,59 +1976,65 @@ Disassembly of section .data:
 81000264:	0114                	addi	a3,sp,128
 81000266:	8100                	0x8100
 
+Disassembly of section .sdata:
+
+81000268 <temp>:
+81000268:	0006                	c.slli	zero,0x1
+	...
+
 Disassembly of section .bss:
 
-81000268 <done>:
+8100026c <done>:
 	...
 
-8100030c <main_sp>:
-8100030c:	0000                	unimp
+81000310 <main_sp>:
+81000310:	0000                	unimp
 	...
 
-81000310 <context>:
+81000314 <context>:
 	...
 
-81000410 <q>:
+81000414 <q>:
 	...
 
-81026110 <done>:
+81026114 <done>:
 	...
 
-810261b4 <main_sp>:
-810261b4:	0000                	unimp
+810261b8 <main_sp>:
+810261b8:	0000                	unimp
 	...
 
-810261b8 <mat_mult_args>:
+810261bc <mat_mult_args>:
 	...
 
-810261cc <mat_r_args>:
+810261d0 <mat_r_args>:
 	...
 
-810261e4 <mat_e_args>:
+810261e8 <mat_e_args>:
 	...
 
-810261fc <barriers>:
+81026200 <barriers>:
 	...
 
-8102621c <x>:
+81026220 <x>:
 	...
 
-8102721c <y>:
+81027220 <y>:
 	...
 
-8102821c <z>:
+81028220 <z>:
 	...
 
-8102921c <done>:
+81029220 <done>:
 	...
 
-810292c0 <main_sp>:
-810292c0:	0000                	unimp
+810292c4 <main_sp>:
+810292c4:	0000                	unimp
 	...
 
 Disassembly of section .sbss:
 
-810292c4 <barrier_bool>:
+810292c8 <barrier_bool>:
 	...
 
 Disassembly of section .comment:
diff --git a/kernel/vortex_test.elf b/kernel/vortex_test.elf
index 8a81bd4b8b2a45ba1c3ea12ec86dbf9c60d73324..822d2173290d05f2622d70c683d65d6c7bdc60de 100755
GIT binary patch
delta 2812
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z^E~G~|MQ%4Px<V~{UcqDRhLRgc?!uvBDrZXEh2$iEQ(piTW(4rYDzh=J=N4868&)D
z-JS$#@`*2Gu^3sp<%-yn!){xSi!JHQn|MvAVC$0V@$OD?3IR5hv=RLWNu7ANTA#!F
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zR`s6^g->^|;q+zCWL<5fVTzh-huE;&&dO5lVr^icCiR3+(H~5Ys+2P3tLCg%&3R;o
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diff --git a/kernel/vortex_test.hex b/kernel/vortex_test.hex
index 169d9717..5c6a4251 100644
--- a/kernel/vortex_test.hex
+++ b/kernel/vortex_test.hex
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+:04187000678000008D
 :02000004810079
 :10000000300000003100000032000000330000002A
 :10001000340000003500000036000000370000000A
@@ -440,5 +431,6 @@
 :10023800E8000081EC000081F0000081F4000081FA
 :10024800F8000081FC0000810001008104010081A8
 :10025800080100810C010081100100811401008156
+:04026800060000008C
 :040000058000000077
 :00000001FF
diff --git a/kernel/vx_main.c b/kernel/vx_main.c
index e35ae59a..aee51205 100644
--- a/kernel/vx_main.c
+++ b/kernel/vx_main.c
@@ -5,10 +5,12 @@ unsigned x[1024] = {0};
 unsigned y[1024] = {0};
 unsigned z[1024] = {0};
 
-#define MAT_DIM 16
+unsigned temp = 6;
 
-#define NUM_COLS 16
-#define NUM_ROWS 16
+#define MAT_DIM 2
+
+#define NUM_COLS 2
+#define NUM_ROWS 2
 
 double sc_time_stamp()
 {
@@ -39,16 +41,19 @@ void print_matrix(unsigned * z)
 int main()
 {
 
-	// vx_print_hex(11);
+	// unsigned f = temp;
 
-	initialize_mats();
+	vx_print_hex(11);
+	// vx_printc(0, 'a');
+
+	// initialize_mats();
 
 	// matrix multiplication
 	// vx_sq_mat_mult(x, y, z, MAT_DIM);
 	// vx_print_str("\n\nMatrix multiplication\n");
 	// print_matrix(z);
 
-	print_matrix(x);
+	// print_matrix(x);
 
 	// // matrix addition
 	// vx_mat_add(x, y, z, NUM_ROWS, NUM_COLS);
diff --git a/kernel/vx_os/vx_back/vx_back.s b/kernel/vx_os/vx_back/vx_back.s
index e5be3bb7..05c532ba 100644
--- a/kernel/vx_os/vx_back/vx_back.s
+++ b/kernel/vx_os/vx_back/vx_back.s
@@ -6,15 +6,33 @@
 .type _start, @function
 .global _start
 _start:
-      la a0, 0x020000
-      li a1, 7
-      sw a1, 4(a0)
-      nop
-      nop
-      nop
-      lw a2, 4(a0)
-      li a0, 0
-      .word 0x0005006b    # tmc a0
+      # la a0, 0x10000000
+      # li a1, 7
+      # sw a1, 0(a0)
+
+      # la a0, 0x10000048
+      # li a1, 3
+      # sw a1, 0(a0)
+
+      # la a0, 0x80000000
+      # li a1, 9
+      # sw a1, 0(a0) 
+
+      # la a0, 0x80000008
+      # li a1, 8
+      # sw a1, 0(a0) 
+
+      # la a0, 0x10000000
+      # lw a2, 0(a0)
+      # la a0, 0x10000048
+      # lw a3, 0(a0)
+      # # la a0, 0x00000000 # I=0,OF=0, B=0
+      # # li a1, 1
+      # # sw a1, 0(a0)
+      # # lw a2, 0(a0)
+      # li a0, 0
+      # .word 0x0005006b    # tmc a0
+########################################
 #     li a0, 4
 #     la a1, SPAWN
 #     .word 0x00b5106b # wspawn a0(numWarps), a1(PC SPAWN)
@@ -36,7 +54,7 @@ _start:
     ##########################
 #     li a0, 4
 #     .word 0x0005006b    # tmc a0
-#     csrr a1, 0x20       # read thread IDs
+#     
 #     # csrr a2, 0x21     # read warp   IDs
 #     slti a0, a1, 2
 #     .word 0x0005206b    # split a0
@@ -49,17 +67,11 @@ _start:
 #     .word 0x0000306b    #join
 #     ecall
     ############################
-    # li a0, 8          # Num Warps
-    # csrw 0x20, a0     # Setting the number of available warps 
-    # li a0, 4          # Num Threads
-    # csrw 0x21, a0     # Setting the number of available threads
-    # csrw mhartid,zero
-    # csrw misa,zero
-    # lui  sp, 0x7ffff
-    # # jal  vx_before_main
-    # jal  main
-    # li a0, 0
-    # .word 0x0005006b    # tmc a0
+    lui  sp, 0x7ffff
+    # jal  vx_before_main
+    jal  main
+    li a0, 0
+    .word 0x0005006b    # tmc a0
 
 # Hi:
 #     li a2, 7
diff --git a/kernel/vx_os/vx_io/vx_io.c b/kernel/vx_os/vx_io/vx_io.c
index e86047b2..32656c23 100644
--- a/kernel/vx_os/vx_io/vx_io.c
+++ b/kernel/vx_os/vx_io/vx_io.c
@@ -3,21 +3,22 @@
 
 void vx_print_hex(unsigned f)
 {
-	if (f < 16)
-	{
-		vx_print_str(hextoa[f]);
-		return;
-	}
-	int temp;
-	int sf = 32;
-	bool start = false;
-	do
-	{
-		temp = (f >> (sf - 4)) & 0xf;
-		if (temp != 0) start = true;
-		if (start) vx_print_str(hextoa[temp]);
-		sf -= 4;
-	} while(sf > 0);
+	vx_print_str(hextoa[f]);
+	// if (f < 16)
+	// {
+	// 	vx_print_str(hextoa[f]);
+	// 	return;
+	// }
+	// int temp;
+	// int sf = 32;
+	// bool start = false;
+	// do
+	// {
+	// 	temp = (f >> (sf - 4)) & 0xf;
+	// 	if (temp != 0) start = true;
+	// 	if (start) vx_print_str(hextoa[temp]);
+	// 	sf -= 4;
+	// } while(sf > 0);
 }
 
 
diff --git a/rtl/Makefile b/rtl/Makefile
index f7c6050a..4f511fdd 100644
--- a/rtl/Makefile
+++ b/rtl/Makefile
@@ -11,11 +11,11 @@ EXE=--exe ./simulate/test_bench.cpp
 
 COMP=--compiler gcc
 
-# WNO=-Wno-UNDRIVEN --Wno-PINMISSING -Wno-STMTDLY -Wno-WIDTH -Wno-UNSIGNED
-WNO=
+WNO=-Wno-UNDRIVEN --Wno-PINMISSING -Wno-STMTDLY -Wno-WIDTH -Wno-UNSIGNED -Wno-UNOPTFLAT
+# WNO=
 
-LIGHTW=
-# LIGHTW=-Wno-UNOPTFLAT
+# LIGHTW=
+LIGHTW=-Wno-UNOPTFLAT
 # LIB=-LDFLAGS '-L/usr/local/systemc/'
 LIB=
 
diff --git a/rtl/VX_back_end.v b/rtl/VX_back_end.v
index 8b6f2b59..d5e349d6 100644
--- a/rtl/VX_back_end.v
+++ b/rtl/VX_back_end.v
@@ -31,6 +31,7 @@ assign VX_writeback_inter.wb_warp_num  = VX_writeback_temp.wb_warp_num;
 
 
 VX_mw_wb_inter           VX_mw_wb();
+wire no_slot_mem;
 
 
 VX_mem_req_inter  VX_exe_mem_req();
@@ -78,7 +79,8 @@ VX_lsu load_store_unit(
 	.VX_mem_wb    (VX_mem_wb),
 	.VX_dcache_rsp(VX_dcache_rsp),
 	.VX_dcache_req(VX_dcache_req),
-	.out_delay    (out_mem_delay)
+	.out_delay    (out_mem_delay),
+	.no_slot_mem  (no_slot_mem)
 	);
 
 
@@ -106,7 +108,8 @@ VX_writeback VX_wb(
 	.VX_inst_exec_wb   (VX_inst_exec_wb),
 	.VX_csr_wb         (VX_csr_wb),
 
-	.VX_writeback_inter(VX_writeback_temp)
+	.VX_writeback_inter(VX_writeback_temp),
+	.no_slot_mem       (no_slot_mem)
 	);
 
 endmodule
\ No newline at end of file
diff --git a/rtl/VX_dmem_controller.v b/rtl/VX_dmem_controller.v
index 414e1c17..11840561 100644
--- a/rtl/VX_dmem_controller.v
+++ b/rtl/VX_dmem_controller.v
@@ -22,8 +22,8 @@ module VX_dmem_controller (
 
 
 	wire[`NT_M1:0][31:0] cache_driver_in_address   = VX_dcache_req.out_cache_driver_in_address;
-	wire[2:0]            cache_driver_in_mem_read  = VX_dcache_req.out_cache_driver_in_mem_read;
-	wire[2:0]            cache_driver_in_mem_write = VX_dcache_req.out_cache_driver_in_mem_write;
+	wire[2:0]            cache_driver_in_mem_read  = !(|cache_driver_in_valid) ? `NO_MEM_READ  : VX_dcache_req.out_cache_driver_in_mem_read;
+	wire[2:0]            cache_driver_in_mem_write = !(|cache_driver_in_valid) ? `NO_MEM_WRITE : VX_dcache_req.out_cache_driver_in_mem_write;
 	wire[`NT_M1:0][31:0] cache_driver_in_data      = VX_dcache_req.out_cache_driver_in_data;
 
 
@@ -34,6 +34,9 @@ module VX_dmem_controller (
 	wire                 cache_delay;
 
 
+	wire valid_read_cache = !cache_delay && cache_driver_in_valid[0];
+
+
 	VX_shared_memory #(.NB(7), .BITS_PER_BANK(3)) shared_memory (
 		.clk       (clk),
 		.in_valid  (sm_driver_in_valid),
diff --git a/rtl/VX_lsu.v b/rtl/VX_lsu.v
index 70955a4b..bc84c1cc 100644
--- a/rtl/VX_lsu.v
+++ b/rtl/VX_lsu.v
@@ -5,6 +5,7 @@
 module VX_lsu (
 		input wire               clk,
 		input wire               reset,
+		input wire               no_slot_mem,
 		VX_lsu_req_inter         VX_lsu_req,
 
 		// Write back to GPR
@@ -15,9 +16,9 @@ module VX_lsu (
 		output wire              out_delay
 	);
 
-	VX_inst_mem_wb_inter VX_mem_wb_temp();
+	// VX_inst_mem_wb_inter VX_mem_wb_temp();
 
-	assign out_delay = VX_dcache_rsp.delay;
+	assign out_delay = VX_dcache_rsp.delay || no_slot_mem;
 
 
 	// Generate Addresses
@@ -36,30 +37,30 @@ module VX_lsu (
 		assign VX_dcache_req.out_cache_driver_in_data[index]      = VX_lsu_req.store_data[index];
 		assign VX_dcache_req.out_cache_driver_in_valid[index]     = (VX_lsu_req.valid[index]);
 
-		assign VX_mem_wb_temp.loaded_data[index]                       = VX_dcache_rsp.in_cache_driver_out_data[index];
+		assign VX_mem_wb.loaded_data[index]                       = VX_dcache_rsp.in_cache_driver_out_data[index];
 	end
 
 		assign VX_dcache_req.out_cache_driver_in_mem_read  = VX_lsu_req.mem_read;
 		assign VX_dcache_req.out_cache_driver_in_mem_write = VX_lsu_req.mem_write;
 
 
-		assign VX_mem_wb_temp.rd          = VX_lsu_req.rd;
-		assign VX_mem_wb_temp.wb          = VX_lsu_req.wb;
-		assign VX_mem_wb_temp.wb_valid    = VX_lsu_req.valid;
-		assign VX_mem_wb_temp.wb_warp_num = VX_lsu_req.warp_num;
+		assign VX_mem_wb.rd          = VX_lsu_req.rd;
+		assign VX_mem_wb.wb          = VX_lsu_req.wb & {!VX_dcache_rsp.delay, !VX_dcache_rsp.delay};
+		assign VX_mem_wb.wb_valid    = VX_lsu_req.valid;
+		assign VX_mem_wb.wb_warp_num = VX_lsu_req.warp_num;
 
 
 
-	wire zero_temp = 0;
-	VX_generic_register #(.N(142)) register_wb_data 
-	(
-		.clk  (clk),
-		.reset(reset),
-		.stall(zero_temp),
-		.flush(out_delay),
-		.in   ({VX_mem_wb_temp.loaded_data, VX_mem_wb_temp.rd, VX_mem_wb_temp.wb, VX_mem_wb_temp.wb_valid, VX_mem_wb_temp.wb_warp_num}),
-		.out  ({VX_mem_wb.loaded_data     , VX_mem_wb.rd     , VX_mem_wb.wb     , VX_mem_wb.wb_valid     , VX_mem_wb.wb_warp_num     })
-	);
+	// wire zero_temp = 0;
+	// VX_generic_register #(.N(142)) register_wb_data 
+	// (
+	// 	.clk  (clk),
+	// 	.reset(reset),
+	// 	.stall(zero_temp),
+	// 	.flush(out_delay),
+	// 	.in   ({VX_mem_wb_temp.loaded_data, VX_mem_wb_temp.rd, VX_mem_wb_temp.wb, VX_mem_wb_temp.wb_valid, VX_mem_wb_temp.wb_warp_num}),
+	// 	.out  ({VX_mem_wb.loaded_data     , VX_mem_wb.rd     , VX_mem_wb.wb     , VX_mem_wb.wb_valid     , VX_mem_wb.wb_warp_num     })
+	// );
 
 
 endmodule // Memory
diff --git a/rtl/VX_priority_encoder_w_mask.v b/rtl/VX_priority_encoder_w_mask.v
index e5e2c7b9..0fc18dde 100644
--- a/rtl/VX_priority_encoder_w_mask.v
+++ b/rtl/VX_priority_encoder_w_mask.v
@@ -13,13 +13,16 @@ module VX_priority_encoder_w_mask
 	always @(valids) begin
 		index = 0;
 		found = 0;
-		mask  = 0;
+		// mask  = 0;
 		for (i = 0; i < N; i=i+1) begin
 			if (valids[i]) begin
 				index = i[$clog2(N)-1:0];
 				found = 1;
-				mask[i[$clog2(N)-1:0]] = 1 << i;
+				// mask[index] = (1 << i);
+				// $display("%h",(1 << i));
 			end
 		end
 	end
+
+	assign mask = found ? (1 << index) : 0;
 endmodule
\ No newline at end of file
diff --git a/rtl/VX_writeback.v b/rtl/VX_writeback.v
index f12d9c42..4a5945b9 100644
--- a/rtl/VX_writeback.v
+++ b/rtl/VX_writeback.v
@@ -11,10 +11,12 @@ module VX_writeback (
 		VX_csr_wb_inter          VX_csr_wb,
 
 		// Actual WB to GPR
-		VX_wb_inter              VX_writeback_inter
+		VX_wb_inter              VX_writeback_inter,
+		output wire              no_slot_mem
 	);
 
 
+		assign no_slot_mem = mem_wb && (exec_wb || csr_wb);
 
 		wire exec_wb = (VX_inst_exec_wb.wb != 0) && (|VX_inst_exec_wb.wb_valid);
 		wire mem_wb  = (VX_mem_wb.wb       != 0) && (|VX_mem_wb.wb_valid);
@@ -22,29 +24,29 @@ module VX_writeback (
 
 
 		assign VX_writeback_inter.write_data  = exec_wb ? VX_inst_exec_wb.alu_result :
-		                                        mem_wb  ? VX_mem_wb.loaded_data      :
 		                                        csr_wb  ? VX_csr_wb.csr_result       :
+		                                        mem_wb  ? VX_mem_wb.loaded_data      :
 		                                        0;
 
 
 		assign VX_writeback_inter.wb_valid    = exec_wb ? VX_inst_exec_wb.wb_valid :
-		                                        mem_wb  ? VX_mem_wb.wb_valid       :
 		                                        csr_wb  ? VX_csr_wb.valid          :
-		                                        0;                             
+		                                        mem_wb  ? VX_mem_wb.wb_valid       :
+		                                        0;    
 
 		assign VX_writeback_inter.rd          = exec_wb ? VX_inst_exec_wb.rd :
-		                                        mem_wb  ? VX_mem_wb.rd       :
 		                                        csr_wb  ? VX_csr_wb.rd       :
+		                                        mem_wb  ? VX_mem_wb.rd       :
 		                                        0;
 
 		assign VX_writeback_inter.wb          = exec_wb ? VX_inst_exec_wb.wb :
-		                                        mem_wb  ? VX_mem_wb.wb       :
 		                                        csr_wb  ? VX_csr_wb.wb       :
+		                                        mem_wb  ? VX_mem_wb.wb       :
 		                                        0;   
 
 		assign VX_writeback_inter.wb_warp_num = exec_wb ? VX_inst_exec_wb.wb_warp_num :
-		                                        mem_wb  ? VX_mem_wb.wb_warp_num       :
 		                                        csr_wb  ? VX_csr_wb.warp_num          :
+		                                        mem_wb  ? VX_mem_wb.wb_warp_num       :
 		                                        0;    		
 
 
diff --git a/rtl/Vortex.v b/rtl/Vortex.v
index 359cbbce..b619aabd 100644
--- a/rtl/Vortex.v
+++ b/rtl/Vortex.v
@@ -7,6 +7,9 @@ module Vortex(
 	input  wire           reset,
 	input  wire[31:0] icache_response_instruction,
 	output wire[31:0] icache_request_pc_address,
+	// IO
+	output wire        io_valid,
+	output wire[31:0]  io_data,
 	// Req
     output reg [31:0]  o_m_read_addr,
     output reg [31:0]  o_m_evict_addr,
@@ -20,11 +23,20 @@ module Vortex(
 	output wire        out_ebreak
 	);
 
-// Dcache Interface
+wire memory_delay;
+wire gpr_stage_delay;
+wire schedule_delay;
 
+
+// Dcache Interface
 VX_dcache_response_inter VX_dcache_rsp();
 VX_dcache_request_inter  VX_dcache_req();
 
+wire temp_io_valid      = (!memory_delay) && (|VX_dcache_req.out_cache_driver_in_valid) && (VX_dcache_req.out_cache_driver_in_mem_write != `NO_MEM_WRITE) && (VX_dcache_req.out_cache_driver_in_address[0] == 32'h00010000);
+wire[31:0] temp_io_data = VX_dcache_req.out_cache_driver_in_data[0];
+assign io_valid         = temp_io_valid;
+assign io_data          = temp_io_data;
+
 
 VX_dram_req_rsp_inter    VX_dram_req_rsp();
 
@@ -74,11 +86,6 @@ VX_jal_response_inter         VX_jal_rsp();         // Jump resolution to Fetch
 VX_warp_ctl_inter        VX_warp_ctl();
 
 
-wire memory_delay;
-wire gpr_stage_delay;
-wire schedule_delay;
-
-
 VX_front_end vx_front_end(
 	.clk                 (clk),
 	.reset               (reset),
diff --git a/rtl/cache/VX_Cache_Bank.v b/rtl/cache/VX_Cache_Bank.v
index 9668c4d7..a4405280 100644
--- a/rtl/cache/VX_Cache_Bank.v
+++ b/rtl/cache/VX_Cache_Bank.v
@@ -90,10 +90,10 @@ module VX_Cache_Bank
 
     assign data_evicted = data_use;
 
-    assign eviction_wb  = miss && (dirty_use != 1'b0);
+    assign eviction_wb  = (dirty_use != 1'b0) && valid_use;
     assign eviction_tag = tag_use;
     assign access = (state == CACHE_IDLE) && valid_in;
-    assign write_from_mem = (state == RECIV_MEM_RSP) && valid_in;
+    assign write_from_mem = (state == RECIV_MEM_RSP);
     assign readdata     = (access) ? data_use[block_offset] : 32'b0; // Fix with actual data
     assign hit          = (access && (tag_use == o_tag) && valid_use);
     //assign eviction_addr = {eviction_tag, actual_index, block_offset, 5'b0}; // Fix with actual data
@@ -104,9 +104,8 @@ module VX_Cache_Bank
     wire[`NUM_WORDS_PER_BLOCK-1:0][31:0] data_write;
     genvar g; 
     for (g = 0; g < `NUM_WORDS_PER_BLOCK; g = g + 1) begin
-        wire correct_block   = (block_offset == g);
-        assign we[g]         = (read_or_write  && ((access && correct_block) || (write_from_mem && !correct_block)) ) ? 1'b1 : 1'b0;
-        //assign we[g]         = (!(write_from_mem && correct_block) && ((write_from_mem || correct_block) && read_or_write == 1'b1)) ? 1 : 0; // added the "not"
+        wire normal_write = (read_or_write  && ((access && (block_offset == g))) && !miss);
+        assign we[g]      = (normal_write || (write_from_mem)) ? 1'b1 : 1'b0;
         assign data_write[g] = write_from_mem ? fetched_writedata[g] : writedata;
     end
 
diff --git a/rtl/cache/VX_cache_bank_valid.v b/rtl/cache/VX_cache_bank_valid.v
index e3dd144e..8af76972 100644
--- a/rtl/cache/VX_cache_bank_valid.v
+++ b/rtl/cache/VX_cache_bank_valid.v
@@ -7,17 +7,16 @@ module VX_cache_bank_valid
 (
 	input  wire [`NT_M1:0]                       i_p_valid,
 	input  wire [`NT_M1:0][31:0]                 i_p_addr,
-	output wire [NUMBER_BANKS - 1 : 0][`NT_M1:0] thread_track_banks
+	output reg [NUMBER_BANKS - 1 : 0][`NT_M1:0]  thread_track_banks
 );
 
-
-	
-
 	genvar t_id;
-    for (t_id = 0; t_id <= `NT_M1; t_id = t_id + 1)
-    begin
-    	wire[2:0] threads_bank                        = i_p_addr[t_id][4:2];
-    	assign thread_track_banks[threads_bank][t_id] = i_p_valid[t_id];
-    end
+	always @(*) begin
+		thread_track_banks = 0;
+	    for (t_id = 0; t_id <= `NT_M1; t_id = t_id + 1)
+	    begin
+	    	thread_track_banks[i_p_addr[t_id][4:2]][t_id] = i_p_valid[t_id];
+	    end
+	end
 
 endmodule
\ No newline at end of file
diff --git a/rtl/cache/VX_d_cache.v b/rtl/cache/VX_d_cache.v
index 4feb4c86..572dafb3 100644
--- a/rtl/cache/VX_d_cache.v
+++ b/rtl/cache/VX_d_cache.v
@@ -64,9 +64,10 @@ module VX_d_cache(clk,
 
     // Buffer for final data
     reg [`NT_M1:0][31:0] final_data_read;
-    wire[`NT_M1:0][31:0] new_final_data_read;
+    reg [`NT_M1:0][31:0] new_final_data_read;
+    wire[`NT_M1:0][31:0] new_final_data_read_Qual;
 
-    assign o_p_readdata = final_data_read;
+    assign o_p_readdata = new_final_data_read_Qual;
 
 
 
@@ -95,6 +96,8 @@ module VX_d_cache(clk,
     reg[31:0] miss_addr;
     reg[31:0] evict_addr;
 
+    wire curr_processor_request_valid = (|i_p_valid);
+
 
     assign use_valid = (stored_valid == 0) ?  i_p_valid : stored_valid;
 
@@ -121,10 +124,15 @@ module VX_d_cache(clk,
     //   end
     // end
 
+    reg[`NT_M1:0] debug_hit_per_bank_mask[NUMBER_BANKS-1:0];
+
     genvar bid;
     for (bid = 0; bid < NUMBER_BANKS; bid=bid+1)
     begin
-      wire[`NT_M1:0] use_threads_track_banks = thread_track_banks[bid];
+      wire[`NT_M1:0]        use_threads_track_banks = thread_track_banks[bid];
+      wire[$clog2(`NT)-1:0] use_thread_index        = index_per_bank[bid];
+      wire                  use_write_final_data    = hit_per_bank[bid];
+      wire[31:0]            use_data_final_data     = readdata_per_bank[bid];
         VX_priority_encoder_w_mask #(.N(`NT)) choose_thread(
           .valids(use_threads_track_banks),
           .mask  (use_mask_per_bank[bid]),
@@ -132,17 +140,20 @@ module VX_d_cache(clk,
           .found (valid_per_bank[bid])
           );
 
-        assign new_final_data_read[index_per_bank[bid]] = hit_per_bank[bid] ? readdata_per_bank[bid] : 0;
-
-        assign threads_serviced_per_bank[bid] = use_mask_per_bank[bid] & {`NT{hit_per_bank[bid]}};
+        always @(*) begin
+          if (use_write_final_data) new_final_data_read[use_thread_index] = use_data_final_data;
+        end
+        // assign new_final_data_read[use_thread_index] = use_write_final_data ? use_data_final_data : 0;
+        assign debug_hit_per_bank_mask[bid]   = {`NT{hit_per_bank[bid]}};
+        assign threads_serviced_per_bank[bid] = use_mask_per_bank[bid] & debug_hit_per_bank_mask[bid];
     end
 
 
-    // genvar tid;
-
-    assign threads_serviced_Qual = threads_serviced_per_bank[0] | threads_serviced_per_bank[1] | threads_serviced_per_bank[2] | threads_serviced_per_bank[3] | threads_serviced_per_bank[4] | threads_serviced_per_bank[5] | threads_serviced_per_bank[6] | threads_serviced_per_bank[7];
-    // for(tid = 0; tid )
     wire[NUMBER_BANKS - 1 : 0] detect_bank_miss;
+    assign threads_serviced_Qual = threads_serviced_per_bank[0] | threads_serviced_per_bank[1] |
+                                   threads_serviced_per_bank[2] | threads_serviced_per_bank[3] |
+                                   threads_serviced_per_bank[4] | threads_serviced_per_bank[5] |
+                                   threads_serviced_per_bank[6] | threads_serviced_per_bank[7];
     // genvar bbid;
     // always @(*) begin
     //   for (bbid = 0; bbid < NUMBER_BANKS; bbid=bbid+1)
@@ -152,6 +163,14 @@ module VX_d_cache(clk,
     // end
 
 
+
+    genvar tid;
+    for (tid = 0; tid < `NT; tid =tid+1)
+    begin
+      assign new_final_data_read_Qual[tid] = threads_serviced_Qual[tid] ? new_final_data_read[tid] : final_data_read[tid];
+    end
+
+
     assign detect_bank_miss = (valid_per_bank & ~hit_per_bank);
 
     wire   delay;
@@ -193,10 +212,7 @@ module VX_d_cache(clk,
       evict_addr  <= eviction_addr_per_bank[miss_bank_index];
     end
 
-    for (cur_t = 0; cur_t < `NT; cur_t=cur_t+1)
-    begin
-      if (threads_serviced_Qual[cur_t]) final_data_read[cur_t] <= new_final_data_read[cur_t];
-    end
+    final_data_read <= new_final_data_read_Qual;
   end
 
 
@@ -245,8 +261,8 @@ module VX_d_cache(clk,
     // Mem Rsp
 
     // Req to mem:
-    assign o_m_evict_addr     = evict_addr;
-    assign o_m_read_addr      = miss_addr;
+    assign o_m_evict_addr     = evict_addr & 32'hffffffc0;
+    assign o_m_read_addr      = miss_addr  & 32'hffffffc0;
     assign o_m_valid          = (state == SEND_MEM_REQ);
     assign o_m_read_or_write  = (state == SEND_MEM_REQ) && (|eviction_wb);
     //end
diff --git a/rtl/results.txt b/rtl/results.txt
index e69de29b..41d5ff0a 100644
--- a/rtl/results.txt
+++ b/rtl/results.txt
@@ -0,0 +1,7 @@
+# Dynamic Instructions: 4139
+# of total cycles:      4156
+# of forwarding stalls: 0
+# of branch stalls:     0
+# CPI:                  1.00411
+# time to simulate:     6.95312e-310 milliseconds
+# GRADE:                Failed on test: 4294967295
diff --git a/rtl/simulate/test_bench.cpp b/rtl/simulate/test_bench.cpp
index 1e0a6a0c..9387ad89 100644
--- a/rtl/simulate/test_bench.cpp
+++ b/rtl/simulate/test_bench.cpp
@@ -5,7 +5,7 @@
 int main(int argc, char **argv)
 {
 
-	Verilated::debug(1);
+	// Verilated::debug(1);
 
 	Verilated::commandArgs(argc, argv);
 
diff --git a/rtl/simulate/test_bench.h b/rtl/simulate/test_bench.h
index 9e595384..cacbc695 100644
--- a/rtl/simulate/test_bench.h
+++ b/rtl/simulate/test_bench.h
@@ -39,6 +39,7 @@ class Vortex
         void print_stats(bool = true);
         bool ibus_driver();
         bool dbus_driver();
+        void io_handler();
 
         RAM ram;
 
@@ -188,77 +189,115 @@ bool Vortex::ibus_driver()
 
 }
 
+void Vortex::io_handler()
+{
+    if (vortex->io_valid)
+    {
+        uint32_t data_write = (uint32_t) vortex->io_data;
+
+        char c = (char) data_write;
+        std::cerr << c;
+    }
+}
 
 
 bool Vortex::dbus_driver()
 {
 
+    // printf("****************************\n");
+
+    vortex->i_m_ready = 0;
+    for (int i = 0; i < CACHE_NUM_BANKS; i++)
+    {
+        for (int j = 0; j < CACHE_WORDS_PER_BLOCK; j++)
+        {
+            vortex->i_m_readdata[i][j] = 0;
+        }
+    }
 
 
     if (this->refill)
     {
         this->refill = false;
-        unsigned unordered_mem[32];
-        int num_iter = 0;
-        for (int i = 0; i < CACHE_WORDS_PER_BLOCK; i++)
-        {
-            for (int j = 0; j < (CACHE_NUM_BANKS*8); j+=8)
-            {
-                unsigned addr = this->refill_addr + (4*num_iter);
-                unsigned data_read;
-                ram.getWord(addr, &data_read);
-                unordered_mem[i+j] = data_read;
-                num_iter++;
-            }
-        }
 
         vortex->i_m_ready = 1;
-        for (int i = 0; i < CACHE_NUM_BANKS; i++)
+        for (int curr_e = 0; curr_e < (CACHE_NUM_BANKS*CACHE_WORDS_PER_BLOCK); curr_e++)
         {
-            for (int j = 0; j < CACHE_WORDS_PER_BLOCK; j++)
-            {
-                vortex->i_m_readdata[i][j] = unordered_mem[(i*CACHE_WORDS_PER_BLOCK)+j];
+            unsigned new_addr = this->refill_addr + (4*curr_e);
+
+
+            unsigned addr_without_byte = new_addr >> 2;
+            unsigned bank_num          = addr_without_byte & 0x7;
+            unsigned addr_wihtout_bank = addr_without_byte >> 3;
+            unsigned offset_num        = addr_wihtout_bank & 0x3;
+
+            unsigned value;
+            ram.getWord(new_addr, &value);
+
+            // printf("-------- (%x) i_m_readdata[%d][%d] (%d) = %d\n", new_addr, bank_num, offset_num, curr_e, value);
+            vortex->i_m_readdata[bank_num][offset_num] = value;
 
-            }
         }
     }
     else
     {
         if (vortex->o_m_valid)
         {
+            // printf("Valid o_m_valid\n");
             if (vortex->o_m_read_or_write)
             {
-                unsigned ordered_mem[32];
+                // printf("Valid write\n");
 
-                // Create unordered mem
-                unsigned unordered_mem[32];
-                for (int i = 0; i < CACHE_NUM_BANKS; i++)
+                for (int curr_e = 0; curr_e < (CACHE_NUM_BANKS*CACHE_WORDS_PER_BLOCK); curr_e++)
                 {
-                    for (int j = 0; j < CACHE_WORDS_PER_BLOCK; j++)
-                    {
-                        unordered_mem[(i*CACHE_WORDS_PER_BLOCK)+j] = vortex->o_m_writedata[i][j];
-                    }
+                    unsigned new_addr = vortex->o_m_evict_addr + (4*curr_e);
+
+
+                    unsigned addr_without_byte = new_addr >> 2;
+                    unsigned bank_num          = addr_without_byte & 0x7;
+                    unsigned addr_wihtout_bank = addr_without_byte >> 3;
+                    unsigned offset_num        = addr_wihtout_bank & 0x3;
+
+
+                    unsigned new_value         = vortex->o_m_writedata[bank_num][offset_num];
+
+                    ram.writeWord( new_addr, &new_value);
+
+                    // printf("+++++++ (%x) writeback[%d][%d] (%d) = %d\n", new_addr, bank_num, offset_num, curr_e, new_value);
+                    // printf("+++++++ (%x) i_m_readdata[%d][%d] (%d) = %d\n", new_addr, bank_num, offset_num, curr_e, value);
                 }
 
-                // Order the memory
-                int num_iter = 0;
-                for (int i = 0; i < CACHE_NUM_BANKS; i++)
-                {
-                    for (int j = 0; j < (CACHE_NUM_BANKS*CACHE_WORDS_PER_BLOCK); j+=CACHE_WORDS_PER_BLOCK)
-                    {
-                        printf("i: %d, j: %d, num_iter: %d\n", i, j, num_iter);
-                        ordered_mem[i+j] = unordered_mem[num_iter];
-                        num_iter++;
-                    }
-                }
+                // unsigned ordered_mem[32];
 
-                // Save the memory
-                for (int i = 0; i < (CACHE_WORDS_PER_BLOCK * CACHE_NUM_BANKS); i++)
-                {
-                    unsigned addr        = (vortex->o_m_evict_addr) + (4*i);
-                    unsigned * data_addr = ordered_mem + i;
-                    ram.writeWord( addr, data_addr);
-                }
+                // // Create unordered mem
+                // unsigned unordered_mem[32];
+                // for (int i = 0; i < CACHE_NUM_BANKS; i++)
+                // {
+                //     for (int j = 0; j < CACHE_WORDS_PER_BLOCK; j++)
+                //     {
+                //         unordered_mem[(i*CACHE_WORDS_PER_BLOCK)+j] = vortex->o_m_writedata[i][j];
+                //     }
+                // }
+
+                // // Order the memory
+                // int num_iter = 0;
+                // for (int i = 0; i < CACHE_NUM_BANKS; i++)
+                // {
+                //     for (int j = 0; j < (CACHE_NUM_BANKS*CACHE_WORDS_PER_BLOCK); j+=CACHE_WORDS_PER_BLOCK)
+                //     {
+                //         printf("i: %d, j: %d, num_iter: %d\n", i, j, num_iter);
+                //         ordered_mem[i+j] = unordered_mem[num_iter];
+                //         num_iter++;
+                //     }
+                // }
+
+                // // Save the memory
+                // for (int i = 0; i < (CACHE_WORDS_PER_BLOCK * CACHE_NUM_BANKS); i++)
+                // {
+                //     unsigned addr        = (vortex->o_m_evict_addr) + (4*i);
+                //     unsigned * data_addr = ordered_mem + i;
+                //     ram.writeWord( addr, data_addr);
+                // }
                 
             }
 
@@ -268,122 +307,6 @@ bool Vortex::dbus_driver()
         }
     }
 
-    // uint32_t data_read;
-    // uint32_t data_write;
-    // uint32_t addr;
-    // // std::cout << "DBUS DRIVER\n" << std::endl;
-    // ////////////////////// DBUS //////////////////////
-
-    // bool did = false;
-
-    // for (unsigned curr_th = 0; curr_th < NT; curr_th++)
-    // {
-    //     if ((vortex->out_cache_driver_in_mem_write != NO_MEM_WRITE) && vortex->out_cache_driver_in_valid[curr_th])
-    //     {
-    //             did = true;
-    //             data_write = (uint32_t) vortex->out_cache_driver_in_data[curr_th];
-    //             addr       = (uint32_t) vortex->out_cache_driver_in_address[curr_th];
-
-    //             if (addr == 0x00010000)
-    //             {
-    //               std::cerr << (char) data_write;
-    //             }
-
-    //             // if ((addr >= 0x810002cc) && (addr < 0x810002d0))
-    //             // {
-    //             //     int index = (addr - 0x810002cc) / 4;
-    //             //     // std::cerr << GREEN << "1done[" << index << "] = " << data_write << DEFAULT << "\n";
-    //             // }
-
-    //             // if ((addr >= 0x810059f4) && (addr < 0x810059f4))
-    //             // {
-    //             //     int index = (addr - 0x810059f4) / 4;
-    //             //     // std::cerr << RED << "2done[" << index << "] = " << data_write << DEFAULT << "\n";
-    //             // }
-
-    //             if (vortex->out_cache_driver_in_mem_write == SB_MEM_WRITE)
-    //             {
-    //                 data_write = ( data_write) & 0xFF;
-    //                 ram.writeByte( addr, &data_write);
-
-    //             } else if (vortex->out_cache_driver_in_mem_write == SH_MEM_WRITE)
-    //             {
-    //                 data_write = ( data_write) & 0xFFFF;
-    //                 ram.writeHalf( addr, &data_write);
-    //             } else if (vortex->out_cache_driver_in_mem_write == SW_MEM_WRITE)
-    //             {
-    //                 // printf("STORING %x in %x \n", data_write, addr);
-    //                 data_write = data_write;
-    //                 ram.writeWord( addr, &data_write);
-    //             }
-
-    //     }
-
-    // }
-
-
-
-
-    // // printf("----\n");
-    // for (unsigned curr_th = 0; curr_th < NT; curr_th++)
-    // {
-
-    //     if ((vortex->out_cache_driver_in_mem_read != NO_MEM_READ) && vortex->out_cache_driver_in_valid[curr_th])
-    //     {
-    //             did = true;
-    //             addr = (uint32_t) vortex->out_cache_driver_in_address[curr_th];
-    //             ram.getWord(addr, &data_read);
-
-    //             if (vortex->out_cache_driver_in_mem_read == LB_MEM_READ)
-    //             {
-
-    //                 vortex->in_cache_driver_out_data[curr_th] = (data_read & 0x80) ? (data_read | 0xFFFFFF00) : (data_read & 0xFF);
-
-    //             } else if (vortex->out_cache_driver_in_mem_read == LH_MEM_READ)
-    //             {
-
-    //                 vortex->in_cache_driver_out_data[curr_th] = (data_read & 0x8000) ? (data_read | 0xFFFF0000) : (data_read & 0xFFFF);
-
-    //             } else if (vortex->out_cache_driver_in_mem_read == LW_MEM_READ)
-    //             {
-    //                 // printf("Reading mem - Addr: %x = %x\n", addr, data_read);
-    //                 // std::cout << "READING - Addr: " << std::hex << addr << " = " << data_read << "\n";
-    //                 // std::cout << std::dec;
-    //                 vortex->in_cache_driver_out_data[curr_th] = data_read;
-
-    //             } else if (vortex->out_cache_driver_in_mem_read == LBU_MEM_READ)
-    //             {
-
-    //                 vortex->in_cache_driver_out_data[curr_th] = (data_read & 0xFF);
-
-    //             } else if (vortex->out_cache_driver_in_mem_read == LHU_MEM_READ)
-    //             {
-
-    //                 vortex->in_cache_driver_out_data[curr_th] = (data_read & 0xFFFF);
-
-    //             }
-    //             else
-    //             {
-    //                 vortex->in_cache_driver_out_data[curr_th] = 0xbabebabe;
-    //             }
-    //     }
-    //     else
-    //     {
-    //         vortex->in_cache_driver_out_data[curr_th] = 0xbabebabe;
-    //     }
-
-    // }
-
-    // if (did && (NW > 1))
-    // {
-
-    //     if (NW < NT)
-    //     {
-    //         this->stats_total_cycles += NT % (NW -1);
-    //     }
-    // }
-    // printf("******\n");
-
 
     return false;
 }
@@ -465,9 +388,11 @@ bool Vortex::simulate(std::string file_to_simulate)
     // unsigned cycles;
     counter = 0;
     this->stats_total_cycles = 12;
-    while (this->stop && ((counter < 2)))
+    while (this->stop && ((counter < 5)))
     // while (this->stats_total_cycles < 10)
     {
+
+        // printf("-------------------------\n");
         // std::cout << "Counter: " << counter << "\n";
         // if ((this->stats_total_cycles) % 5000 == 0) std::cout << "************* Cycle: " << (this->stats_total_cycles) << "\n";
         // dstop = !dbus_driver();
@@ -478,6 +403,7 @@ bool Vortex::simulate(std::string file_to_simulate)
         vortex->eval();
         istop =  ibus_driver();
         dstop = !dbus_driver();
+                  io_handler();
 
         #ifdef VCD_OUTPUT
         m_trace->dump((2*this->stats_total_cycles)+1);