diff --git a/sim/common/rvfloats.cpp b/sim/common/rvfloats.cpp index fd21d0c6..5e85332e 100644 --- a/sim/common/rvfloats.cpp +++ b/sim/common/rvfloats.cpp @@ -169,7 +169,7 @@ uint32_t rv_ftoi_s(uint32_t a, uint32_t frm, uint32_t* fflags) { return r; } -uint64_t rv_ftoi_d(uint64_t a, uint32_t frm, uint32_t* fflags) { +uint32_t rv_ftoi_d(uint64_t a, uint32_t frm, uint32_t* fflags) { softfloat_roundingMode = frm; auto r = f64_to_i32(to_float64_t(a), frm, true); if (fflags) { *fflags = get_fflags(); } @@ -183,7 +183,7 @@ uint32_t rv_ftou_s(uint32_t a, uint32_t frm, uint32_t* fflags) { return r; } -uint64_t rv_ftou_d(uint64_t a, uint32_t frm, uint32_t* fflags) { +uint32_t rv_ftou_d(uint64_t a, uint32_t frm, uint32_t* fflags) { softfloat_roundingMode = frm; auto r = f64_to_ui32(to_float64_t(a), frm, true); if (fflags) { *fflags = get_fflags(); } @@ -225,7 +225,7 @@ uint32_t rv_itof_s(uint32_t a, uint32_t frm, uint32_t* fflags) { return from_float32_t(r); } -uint64_t rv_itof_d(uint64_t a, uint32_t frm, uint32_t* fflags) { +uint64_t rv_itof_d(uint32_t a, uint32_t frm, uint32_t* fflags) { softfloat_roundingMode = frm; auto r = i32_to_f64(a); if (fflags) { *fflags = get_fflags(); } @@ -239,7 +239,7 @@ uint32_t rv_utof_s(uint32_t a, uint32_t frm, uint32_t* fflags) { return from_float32_t(r); } -uint64_t rv_utof_d(uint64_t a, uint32_t frm, uint32_t* fflags) { +uint64_t rv_utof_d(uint32_t a, uint32_t frm, uint32_t* fflags) { softfloat_roundingMode = frm; auto r = ui32_to_f64(a); if (fflags) { *fflags = get_fflags(); } @@ -274,38 +274,37 @@ uint64_t rv_lutof_d(uint64_t a, uint32_t frm, uint32_t* fflags) { return from_float64_t(r); } -uint32_t rv_flt_s(uint32_t a, uint32_t b, uint32_t* fflags) { +bool rv_flt_s(uint32_t a, uint32_t b, uint32_t* fflags) { auto r = f32_lt(to_float32_t(a), to_float32_t(b)); if (fflags) { *fflags = get_fflags(); } return r; } -uint64_t rv_flt_d(uint64_t a, uint64_t b, uint32_t* fflags) { +bool rv_flt_d(uint64_t a, uint64_t b, uint32_t* fflags) { auto r = f64_lt(to_float64_t(a), to_float64_t(b)); if (fflags) { *fflags = get_fflags(); } return r; } -uint32_t rv_fle_s(uint32_t a, uint32_t b, uint32_t* fflags) { +bool rv_fle_s(uint32_t a, uint32_t b, uint32_t* fflags) { auto r = f32_le(to_float32_t(a), to_float32_t(b)); if (fflags) { *fflags = get_fflags(); } return r; } -uint64_t rv_fle_d(uint64_t a, uint64_t b, uint32_t* fflags) { +bool rv_fle_d(uint64_t a, uint64_t b, uint32_t* fflags) { auto r = f64_le(to_float64_t(a), to_float64_t(b)); if (fflags) { *fflags = get_fflags(); } return r; } -uint32_t rv_feq_s(uint32_t a, uint32_t b, uint32_t* fflags) { - +bool rv_feq_s(uint32_t a, uint32_t b, uint32_t* fflags) { auto r = f32_eq(to_float32_t(a), to_float32_t(b)); if (fflags) { *fflags = get_fflags(); } return r; } -uint64_t rv_feq_d(uint64_t a, uint64_t b, uint32_t* fflags) { +bool rv_feq_d(uint64_t a, uint64_t b, uint32_t* fflags) { auto r = f64_eq(to_float64_t(a), to_float64_t(b)); if (fflags) { *fflags = get_fflags(); } return r; diff --git a/sim/common/rvfloats.h b/sim/common/rvfloats.h index a27caf58..4e92c007 100644 --- a/sim/common/rvfloats.h +++ b/sim/common/rvfloats.h @@ -33,9 +33,9 @@ uint32_t rv_fsgnj_s(uint32_t a, uint32_t b); uint32_t rv_fsgnjn_s(uint32_t a, uint32_t b); uint32_t rv_fsgnjx_s(uint32_t a, uint32_t b); -uint32_t rv_flt_s(uint32_t a, uint32_t b, uint32_t* fflags); -uint32_t rv_fle_s(uint32_t a, uint32_t b, uint32_t* fflags); -uint32_t rv_feq_s(uint32_t a, uint32_t b, uint32_t* fflags); +bool rv_flt_s(uint32_t a, uint32_t b, uint32_t* fflags); +bool rv_fle_s(uint32_t a, uint32_t b, uint32_t* fflags); +bool rv_feq_s(uint32_t a, uint32_t b, uint32_t* fflags); uint32_t rv_fmin_s(uint32_t a, uint32_t b, uint32_t* fflags); uint32_t rv_fmax_s(uint32_t a, uint32_t b, uint32_t* fflags); @@ -52,12 +52,12 @@ uint64_t rv_fmsub_d(uint64_t a, uint64_t b, uint64_t c, uint32_t frm, uint32_t* uint64_t rv_fnmadd_d(uint64_t a, uint64_t b, uint64_t c, uint32_t frm, uint32_t* fflags); uint64_t rv_fnmsub_d(uint64_t a, uint64_t b, uint64_t c, uint32_t frm, uint32_t* fflags); -uint64_t rv_ftoi_d(uint64_t a, uint32_t frm, uint32_t* fflags); -uint64_t rv_ftou_d(uint64_t a, uint32_t frm, uint32_t* fflags); +uint32_t rv_ftoi_d(uint64_t a, uint32_t frm, uint32_t* fflags); +uint32_t rv_ftou_d(uint64_t a, uint32_t frm, uint32_t* fflags); uint64_t rv_ftol_d(uint64_t a, uint32_t frm, uint32_t* fflags); uint64_t rv_ftolu_d(uint64_t a, uint32_t frm, uint32_t* fflags); -uint64_t rv_itof_d(uint64_t a, uint32_t frm, uint32_t* fflags); -uint64_t rv_utof_d(uint64_t a, uint32_t frm, uint32_t* fflags); +uint64_t rv_itof_d(uint32_t a, uint32_t frm, uint32_t* fflags); +uint64_t rv_utof_d(uint32_t a, uint32_t frm, uint32_t* fflags); uint64_t rv_ltof_d(uint64_t a, uint32_t frm, uint32_t* fflags); uint64_t rv_lutof_d(uint64_t a, uint32_t frm, uint32_t* fflags); @@ -66,9 +66,9 @@ uint64_t rv_fsgnj_d(uint64_t a, uint64_t b); uint64_t rv_fsgnjn_d(uint64_t a, uint64_t b); uint64_t rv_fsgnjx_d(uint64_t a, uint64_t b); -uint64_t rv_flt_d(uint64_t a, uint64_t b, uint32_t* fflags); -uint64_t rv_fle_d(uint64_t a, uint64_t b, uint32_t* fflags); -uint64_t rv_feq_d(uint64_t a, uint64_t b, uint32_t* fflags); +bool rv_flt_d(uint64_t a, uint64_t b, uint32_t* fflags); +bool rv_fle_d(uint64_t a, uint64_t b, uint32_t* fflags); +bool rv_feq_d(uint64_t a, uint64_t b, uint32_t* fflags); uint64_t rv_fmin_d(uint64_t a, uint64_t b, uint32_t* fflags); uint64_t rv_fmax_d(uint64_t a, uint64_t b, uint32_t* fflags); diff --git a/sim/simx/decode.cpp b/sim/simx/decode.cpp index cc4d3c83..7ab19e2f 100644 --- a/sim/simx/decode.cpp +++ b/sim/simx/decode.cpp @@ -444,21 +444,31 @@ std::shared_ptr Decoder::decode(uint32_t code) const { switch (func7) { case 0x50: // FLE.S, FLT.S, FEQ.S case 0x51: // FLE.D, FLT.D, FEQ.D + instr->setDestReg(rd, RegType::Integer); + instr->setSrcReg(rs1, RegType::Float); + instr->setSrcReg(rs2, RegType::Float); + break; case 0x60: // FCVT.W.D, FCVT.WU.D, FCVT.L.D, FCVT.LU.D case 0x61: // FCVT.WU.S, FCVT.W.S, FCVT.L.S, FCVT.LU.S - case 0x70: // FCLASS.S, FMV.X.W - case 0x71: // FCLASS.D, FMV.X.D instr->setDestReg(rd, RegType::Integer); instr->setSrcReg(rs1, RegType::Float); instr->setSrcReg(rs2, RegType::Integer); break; case 0x68: // FCVT.S.W, FCVT.S.WU, FCVT.S.L, FCVT.S.LU case 0x69: // FCVT.D.W, FCVT.D.WU, FCVT.D.L, FCVT.D.LU + instr->setDestReg(rd, RegType::Float); + instr->setSrcReg(rs1, RegType::Integer); + instr->setSrcReg(rs2, RegType::Integer); + break; + case 0x70: // FCLASS.S, FMV.X.W + case 0x71: // FCLASS.D, FMV.X.D + instr->setDestReg(rd, RegType::Integer); + instr->setSrcReg(rs1, RegType::Float); + break; case 0x78: // FMV.W.X case 0x79: // FMV.D.X instr->setDestReg(rd, RegType::Float); instr->setSrcReg(rs1, RegType::Integer); - instr->setSrcReg(rs2, RegType::Integer); break; default: instr->setDestReg(rd, RegType::Float);