diff --git a/hw/rtl/VX_core_wrapper.sv b/hw/rtl/VX_core_wrapper.sv
index bbd75311..626a3cb1 100644
--- a/hw/rtl/VX_core_wrapper.sv
+++ b/hw/rtl/VX_core_wrapper.sv
@@ -495,28 +495,34 @@ module Vortex import VX_gpu_pkg::*; #(
     //     .busy(busy)
     // );
 
-    always @(*) begin
-        if (busy === 1'b0) begin
-            $display("---------------- no more active warps ----------------");
-            `ifdef SIMULATION
-            if ($time >= 60000) begin
-              $display("simulation has probably ended. exiting");
-              @(posedge clock) $finish();
+    always @(posedge clock) begin
+        if (!reset) begin
+            if (finished) begin
+                `ifdef SIMULATION
+                    $display("---------------- core%2d has no more active warps ----------------", CORE_ID);
+                    $display("simulation has ended. exiting");
+                    $finish();
+                `endif
+                // `ifdef SIMULATION
+                // if ($time >= 60000) begin
+                //   $display("simulation has probably ended. exiting");
+                //   @(posedge clock) $finish();
+                // end
+                // `endif
+                // TODO: lane assumed to be 4
+                // `ifndef SYNTHESIS
+                // for (integer j = 0; j < `NUM_WARPS; j++) begin
+                //     $display("warp %2d", j);
+                //     for (integer k = 0; k < `NUM_REGS; k += 1)
+                //         $display("x%2d: %08x  %08x  %08x  %08x", k,
+                //             pipeline.issue.gpr_stage.iports[/*thread*/0].dp_ram1.not_out_reg.reg_dump.ram[j * `NUM_REGS + k],
+                //             pipeline.issue.gpr_stage.iports[/*thread*/1].dp_ram1.not_out_reg.reg_dump.ram[j * `NUM_REGS + k],
+                //             pipeline.issue.gpr_stage.iports[/*thread*/2].dp_ram1.not_out_reg.reg_dump.ram[j * `NUM_REGS + k],
+                //             pipeline.issue.gpr_stage.iports[/*thread*/3].dp_ram1.not_out_reg.reg_dump.ram[j * `NUM_REGS + k]);
+                //     end
+                // `endif
+                // @(posedge clock) $finish();
             end
-            `endif
-            // TODO: lane assumed to be 4
-            // `ifndef SYNTHESIS
-            // for (integer j = 0; j < `NUM_WARPS; j++) begin
-            //     $display("warp %2d", j);
-            //     for (integer k = 0; k < `NUM_REGS; k += 1)
-            //         $display("x%2d: %08x  %08x  %08x  %08x", k,
-            //             pipeline.issue.gpr_stage.iports[/*thread*/0].dp_ram1.not_out_reg.reg_dump.ram[j * `NUM_REGS + k],
-            //             pipeline.issue.gpr_stage.iports[/*thread*/1].dp_ram1.not_out_reg.reg_dump.ram[j * `NUM_REGS + k],
-            //             pipeline.issue.gpr_stage.iports[/*thread*/2].dp_ram1.not_out_reg.reg_dump.ram[j * `NUM_REGS + k],
-            //             pipeline.issue.gpr_stage.iports[/*thread*/3].dp_ram1.not_out_reg.reg_dump.ram[j * `NUM_REGS + k]);
-            //     end
-            // `endif
-            // @(posedge clock) $finish();
         end
     end
 
diff --git a/hw/rtl/libs/VX_mem_scheduler.sv b/hw/rtl/libs/VX_mem_scheduler.sv
index 4138c6c8..1734c720 100644
--- a/hw/rtl/libs/VX_mem_scheduler.sv
+++ b/hw/rtl/libs/VX_mem_scheduler.sv
@@ -532,66 +532,70 @@ module VX_mem_scheduler #(
 
 `ifndef NDEBUG
     wire [NUM_BANKS-1:0] mem_req_fire_s = mem_req_valid_s & mem_req_ready_s;
-    always @(posedge clk) begin
-        if (req_valid && req_ready) begin
-            if (req_rw) begin
-                `TRACE(1, ("%d: %s-core-req-wr: valid=%b, addr=", $time, INST_ID, req_mask));
-                `TRACE_ARRAY1D(1, req_addr, NUM_REQS);                       
-                `TRACE(1, (", byteen="));
-                `TRACE_ARRAY1D(1, req_byteen, NUM_REQS);
-                `TRACE(1, (", data="));
-                `TRACE_ARRAY1D(1, req_data, NUM_REQS);         
-            end else begin
-                `TRACE(1, ("%d: %s-core-req-rd: valid=%b, addr=", $time, INST_ID, req_mask));
-                `TRACE_ARRAY1D(1, req_addr, NUM_REQS);                
-            end 
-            `TRACE(1, (", tag=0x%0h, tag_only=0x%0h (#%0d)\n", req_tag, req_tag[TAG_ONLY_WIDTH-1:0], req_dbg_uuid));           
-        end
-        if (rsp_valid && rsp_ready) begin
-            `TRACE(1, ("%d: %s-rsp: valid=%b, sop=%b, eop=%b, data=", $time, INST_ID, rsp_mask, rsp_sop, rsp_eop));
-            `TRACE_ARRAY1D(1, rsp_data, NUM_REQS);
-            `TRACE(1, (", tag=0x%0h, tag_only=0x%0h (#%0d)\n", rsp_tag, rsp_tag[TAG_ONLY_WIDTH-1:0], rsp_dbg_uuid));
-        end
-        if (| mem_req_fire_s) begin
-            if (| mem_req_rw_s) begin
-                `TRACE(1, ("%d: %s-mem-req-wr: valid=%b, addr=", $time, INST_ID, mem_req_fire_s));
-                `TRACE_ARRAY1D(1, mem_req_addr_s, NUM_BANKS);
-                `TRACE(1, (", byteen="));
-                `TRACE_ARRAY1D(1, mem_req_byteen_s, NUM_BANKS);
-                `TRACE(1, (", data="));
-                `TRACE_ARRAY1D(1, mem_req_data_s, NUM_BANKS);           
-            end else begin
-                `TRACE(1, ("%d: %s-mem-req-rd: valid=%b, addr=", $time, INST_ID, mem_req_fire_s));
-                `TRACE_ARRAY1D(1, mem_req_addr_s, NUM_BANKS);                
+    always @(negedge clk) begin
+        if (!reset) begin
+            if (req_valid && req_ready) begin
+                if (req_rw) begin
+                    `TRACE(1, ("%d: %s-core-req-wr: valid=%b, addr=", $time, INST_ID, req_mask));
+                    `TRACE_ARRAY1D(1, req_addr, NUM_REQS);
+                    `TRACE(1, (", byteen="));
+                    `TRACE_ARRAY1D(1, req_byteen, NUM_REQS);
+                    `TRACE(1, (", data="));
+                    `TRACE_ARRAY1D(1, req_data, NUM_REQS);
+                end else begin
+                    `TRACE(1, ("%d: %s-core-req-rd: valid=%b, addr=", $time, INST_ID, req_mask));
+                    `TRACE_ARRAY1D(1, req_addr, NUM_REQS);
+                end
+                `TRACE(1, (", tag=0x%0h, tag_only=0x%0h (#%0d)\n", req_tag, req_tag[TAG_ONLY_WIDTH-1:0], req_dbg_uuid));
+            end
+            if (rsp_valid && rsp_ready) begin
+                `TRACE(1, ("%d: %s-rsp: valid=%b, sop=%b, eop=%b, data=", $time, INST_ID, rsp_mask, rsp_sop, rsp_eop));
+                `TRACE_ARRAY1D(1, rsp_data, NUM_REQS);
+                `TRACE(1, (", tag=0x%0h, tag_only=0x%0h (#%0d)\n", rsp_tag, rsp_tag[TAG_ONLY_WIDTH-1:0], rsp_dbg_uuid));
+            end
+            if (| mem_req_fire_s) begin
+                if (| mem_req_rw_s) begin
+                    `TRACE(1, ("%d: %s-mem-req-wr: valid=%b, addr=", $time, INST_ID, mem_req_fire_s));
+                    `TRACE_ARRAY1D(1, mem_req_addr_s, NUM_BANKS);
+                    `TRACE(1, (", byteen="));
+                    `TRACE_ARRAY1D(1, mem_req_byteen_s, NUM_BANKS);
+                    `TRACE(1, (", data="));
+                    `TRACE_ARRAY1D(1, mem_req_data_s, NUM_BANKS);
+                end else begin
+                    `TRACE(1, ("%d: %s-mem-req-rd: valid=%b, addr=", $time, INST_ID, mem_req_fire_s));
+                    `TRACE_ARRAY1D(1, mem_req_addr_s, NUM_BANKS);
+                end
+                `TRACE(1, (", ibuf_idx=%0d, batch_idx=%0d (#%0d)\n", ibuf_waddr, req_batch_idx, mem_req_dbg_uuid));
+            end
+            if (mem_rsp_fire_s) begin
+                `TRACE(1, ("%d: %s-mem-rsp: valid=%b, data=", $time, INST_ID, mem_rsp_mask_s));
+                `TRACE_ARRAY1D(1, mem_rsp_data_s, NUM_BANKS);
+                `TRACE(1, (", ibuf_idx=%0d, batch_idx=%0d (#%0d)\n", ibuf_raddr, rsp_batch_idx, mem_rsp_dbg_uuid));
             end
-            `TRACE(1, (", ibuf_idx=%0d, batch_idx=%0d (#%0d)\n", ibuf_waddr, req_batch_idx, mem_req_dbg_uuid));
-        end 
-        if (mem_rsp_fire_s) begin
-            `TRACE(1, ("%d: %s-mem-rsp: valid=%b, data=", $time, INST_ID, mem_rsp_mask_s));                
-            `TRACE_ARRAY1D(1, mem_rsp_data_s, NUM_BANKS);
-            `TRACE(1, (", ibuf_idx=%0d, batch_idx=%0d (#%0d)\n", ibuf_raddr, rsp_batch_idx, mem_rsp_dbg_uuid));
         end
     end
 `else
-    always @(posedge clk) begin
-        if (req_valid && req_ready) begin
-            if (req_rw) begin
-                `TRACE(1, ("%d: %s-core-req-wr: valid=%b, addr=", $time, INST_ID, req_mask));
-                `TRACE_ARRAY1D(1, req_addr, NUM_REQS);
-                `TRACE(1, (", byteen="));
-                `TRACE_ARRAY1D(1, req_byteen, NUM_REQS);
-                `TRACE(1, (", data="));
-                `TRACE_ARRAY1D(1, req_data, NUM_REQS);
-            end else begin
-                `TRACE(1, ("%d: %s-core-req-rd: valid=%b, addr=", $time, INST_ID, req_mask));
-                `TRACE_ARRAY1D(1, req_addr, NUM_REQS);
+    always @(negedge clk) begin
+        if (!reset) begin
+            if (req_valid && req_ready) begin
+                if (req_rw) begin
+                    `TRACE(1, ("%d: %s-core-req-wr: valid=%b, addr=", $time, INST_ID, req_mask));
+                    `TRACE_ARRAY1D(1, req_addr, NUM_REQS);
+                    `TRACE(1, (", byteen="));
+                    `TRACE_ARRAY1D(1, req_byteen, NUM_REQS);
+                    `TRACE(1, (", data="));
+                    `TRACE_ARRAY1D(1, req_data, NUM_REQS);
+                end else begin
+                    `TRACE(1, ("%d: %s-core-req-rd: valid=%b, addr=", $time, INST_ID, req_mask));
+                    `TRACE_ARRAY1D(1, req_addr, NUM_REQS);
+                end
+                `TRACE(1, (", tag=0x%0h, tag_only=0x%0h\n", req_tag, req_tag[TAG_ONLY_WIDTH-1:0]));
+            end
+            if (rsp_valid && rsp_ready) begin
+                `TRACE(1, ("%d: %s-rsp: valid=%b, sop=%b, eop=%b, data=", $time, INST_ID, rsp_mask, rsp_sop, rsp_eop));
+                `TRACE_ARRAY1D(1, rsp_data, NUM_REQS);
+                `TRACE(1, (", tag=0x%0h, tag_only=0x%0h\n", rsp_tag, rsp_tag[TAG_ONLY_WIDTH-1:0]));
             end
-            `TRACE(1, (", tag=0x%0h, tag_only=0x%0h\n", req_tag, req_tag[TAG_ONLY_WIDTH-1:0]));
-        end
-        if (rsp_valid && rsp_ready) begin
-            `TRACE(1, ("%d: %s-rsp: valid=%b, sop=%b, eop=%b, data=", $time, INST_ID, rsp_mask, rsp_sop, rsp_eop));
-            `TRACE_ARRAY1D(1, rsp_data, NUM_REQS);
-            `TRACE(1, (", tag=0x%0h, tag_only=0x%0h\n", rsp_tag, rsp_tag[TAG_ONLY_WIDTH-1:0]));
         end
     end
 `endif