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tensor: Fix wrong writeback bit

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Hansung Kim
2024-10-28 21:47:25 -07:00
parent 8a66b5ed89
commit 19876ab9fd
1 changed files with 1 additions and 1 deletions
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2
hw/rtl/core/VX_tensor_hopper_core.sv
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@@ -234,7 +234,7 @@ module VX_tensor_hopper_core_block import VX_gpu_pkg::*; #(
commit_if.data.wid = writeback_wid; commit_if.data.wid = writeback_wid;
commit_if.data.tmask = {NUM_LANES{1'b1}}; commit_if.data.tmask = {NUM_LANES{1'b1}};
commit_if.data.PC = '0; commit_if.data.PC = '0;
commit_if.data.wb = writeback_last; commit_if.data.wb = 1'b1;
// writeback_rd is 0-based // writeback_rd is 0-based
commit_if.data.rd = (`NR_BITS'(`NUM_IREGS) + {1'b0, writeback_rd}); commit_if.data.rd = (`NR_BITS'(`NUM_IREGS) + {1'b0, writeback_rd});
commit_if.data.data = writeback_data; commit_if.data.data = writeback_data;