From 1e648c5819ee2b6d78f6c0ef69a9b13106f7646b Mon Sep 17 00:00:00 2001
From: felsabbagh3 <felsabbagh3@gatech.edu>
Date: Thu, 24 Oct 2019 10:38:04 -0400
Subject: [PATCH] FIxed first circular issue

---
 kernel/vortex_test.dump                | 3265 ++++++++++++------------
 kernel/vortex_test.elf                 |  Bin 15636 -> 15636 bytes
 kernel/vortex_test.hex                 |  796 +++---
 kernel/vx_os/vx_back/vx_back.s         |    2 +-
 rtl/Makefile                           |   12 +-
 rtl/VX_back_end.v                      |    3 +-
 rtl/VX_define.v                        |    1 +
 rtl/VX_dmem_controller.v               |   10 +-
 rtl/VX_front_end.v                     |    4 -
 rtl/VX_lsu.v                           |   37 +-
 rtl/VX_priority_encoder_w_mask.v       |    9 +-
 rtl/Vortex.v                           |   32 +-
 rtl/cache/VX_Cache_Bank.v              |    3 +-
 rtl/cache/VX_d_cache.v                 |   67 +-
 rtl/cache/VX_d_cache_old.v             |  568 -----
 rtl/interfaces/VX_dram_req_rsp_inter.v |    3 +-
 rtl/simulate/VX_define.h               |    2 +
 rtl/simulate/test_bench.cpp            |    3 +-
 rtl/simulate/test_bench.h              |  284 ++-
 19 files changed, 2302 insertions(+), 2799 deletions(-)
 delete mode 100644 rtl/cache/VX_d_cache_old.v

diff --git a/kernel/vortex_test.dump b/kernel/vortex_test.dump
index ba870690..5960dff2 100644
--- a/kernel/vortex_test.dump
+++ b/kernel/vortex_test.dump
@@ -5,49 +5,49 @@ vortex_test.elf:     file format elf32-littleriscv
 Disassembly of section .text:
 
 80000000 <_start>:
-80000000:	ff003537          	lui	a0,0xff003
-80000004:	30050513          	addi	a0,a0,768 # ff003300 <barrier_bool+0x7dfda03c>
-80000008:	00700593          	li	a1,7
-8000000c:	00b52223          	sw	a1,4(a0)
+80000000:	00020537          	lui	a0,0x20
+80000004:	00700593          	li	a1,7
+80000008:	00b52223          	sw	a1,4(a0) # 20004 <SIZE+0x1ffd2>
+8000000c:	00000013          	nop
 80000010:	00000013          	nop
 80000014:	00000013          	nop
-80000018:	00000013          	nop
-8000001c:	00452603          	lw	a2,4(a0)
-80000020:	00000513          	li	a0,0
-80000024:	0005006b          	0x5006b
+80000018:	00452603          	lw	a2,4(a0)
+8000001c:	00000513          	li	a0,0
+80000020:	0005006b          	0x5006b
 
-80000028 <vx_createThreads>:
-80000028:	00068b93          	mv	s7,a3
-8000002c:	00070d13          	mv	s10,a4
-80000030:	00010f13          	mv	t5,sp
-80000034:	00050393          	mv	t2,a0
+80000024 <vx_createThreads>:
+80000024:	00068b93          	mv	s7,a3
+80000028:	00070d13          	mv	s10,a4
+8000002c:	00010f13          	mv	t5,sp
+80000030:	00050393          	mv	t2,a0
 
-80000038 <loop_init>:
-80000038:	00100513          	li	a0,1
+80000034 <loop_init>:
+80000034:	00100513          	li	a0,1
 
-8000003c <loop_cond>:
-8000003c:	00755c63          	bge	a0,t2,80000054 <loop_done>
+80000038 <loop_cond>:
+80000038:	00755c63          	bge	a0,t2,80000050 <loop_done>
 
-80000040 <loop_body>:
-80000040:	80010113          	addi	sp,sp,-2048
-80000044:	00050313          	mv	t1,a0
-80000048:	0003506b          	0x3506b
+8000003c <loop_body>:
+8000003c:	80010113          	addi	sp,sp,-2048
+80000040:	00050313          	mv	t1,a0
+80000044:	0003506b          	0x3506b
 
-8000004c <loop_inc>:
-8000004c:	00150513          	addi	a0,a0,1
-80000050:	fedff06f          	j	8000003c <loop_cond>
+80000048 <loop_inc>:
+80000048:	00150513          	addi	a0,a0,1
+8000004c:	fedff06f          	j	80000038 <loop_cond>
 
-80000054 <loop_done>:
+80000050 <loop_done>:
+80000050:	00000013          	nop
 80000054:	00000013          	nop
 80000058:	00000013          	nop
 8000005c:	00000013          	nop
 80000060:	00000013          	nop
 80000064:	00000013          	nop
-80000068:	00000013          	nop
-8000006c:	000f0113          	mv	sp,t5
-80000070:	00000513          	li	a0,0
-80000074:	00060f93          	mv	t6,a2
-80000078:	00038d93          	mv	s11,t2
+80000068:	000f0113          	mv	sp,t5
+8000006c:	00000513          	li	a0,0
+80000070:	00060f93          	mv	t6,a2
+80000074:	00038d93          	mv	s11,t2
+80000078:	00000013          	nop
 8000007c:	00000013          	nop
 80000080:	00000013          	nop
 80000084:	00000013          	nop
@@ -55,1658 +55,1657 @@ Disassembly of section .text:
 8000008c:	00000013          	nop
 80000090:	00000013          	nop
 80000094:	00000013          	nop
-80000098:	00000013          	nop
-8000009c:	01bfe0eb          	0x1bfe0eb
+80000098:	01bfe0eb          	0x1bfe0eb
+8000009c:	00000013          	nop
 800000a0:	00000013          	nop
 800000a4:	00000013          	nop
 800000a8:	00000013          	nop
 800000ac:	00000013          	nop
 800000b0:	00000013          	nop
-800000b4:	00000013          	nop
-800000b8:	00000517          	auipc	a0,0x0
-800000bc:	1b450513          	addi	a0,a0,436 # 8000026c <vx_reschedule_warps>
-800000c0:	0005406b          	0x5406b
+800000b4:	00000517          	auipc	a0,0x0
+800000b8:	1b450513          	addi	a0,a0,436 # 80000268 <vx_reschedule_warps>
+800000bc:	0005406b          	0x5406b
 
-800000c4 <vx_wspawn>:
-800000c4:	00000317          	auipc	t1,0x0
-800000c8:	f6430313          	addi	t1,t1,-156 # 80000028 <vx_createThreads>
-800000cc:	0003006b          	0x3006b
-800000d0:	00008067          	ret
+800000c0 <vx_wspawn>:
+800000c0:	00000317          	auipc	t1,0x0
+800000c4:	f6430313          	addi	t1,t1,-156 # 80000024 <vx_createThreads>
+800000c8:	0003006b          	0x3006b
+800000cc:	00008067          	ret
 
-800000d4 <vx_save_context>:
-800000d4:	01000217          	auipc	tp,0x1000
-800000d8:	23c20213          	addi	tp,tp,572 # 81000310 <context>
-800000dc:	00022023          	sw	zero,0(tp) # 0 <A_WARPS-0x7>
-800000e0:	00122223          	sw	ra,4(tp) # 4 <A_WARPS-0x3>
-800000e4:	00222423          	sw	sp,8(tp) # 8 <A_WARPS+0x1>
-800000e8:	00322623          	sw	gp,12(tp) # c <A_WARPS+0x5>
-800000ec:	00422823          	sw	tp,16(tp) # 10 <A_WARPS+0x9>
-800000f0:	00522a23          	sw	t0,20(tp) # 14 <A_WARPS+0xd>
-800000f4:	00622c23          	sw	t1,24(tp) # 18 <A_WARPS+0x11>
-800000f8:	00722e23          	sw	t2,28(tp) # 1c <A_WARPS+0x15>
-800000fc:	02822023          	sw	s0,32(tp) # 20 <A_WARPS+0x19>
-80000100:	02922223          	sw	s1,36(tp) # 24 <A_WARPS+0x1d>
-80000104:	02a22423          	sw	a0,40(tp) # 28 <A_WARPS+0x21>
-80000108:	02b22623          	sw	a1,44(tp) # 2c <A_WARPS+0x25>
-8000010c:	02c22823          	sw	a2,48(tp) # 30 <A_WARPS+0x29>
-80000110:	02d22a23          	sw	a3,52(tp) # 34 <SIZE+0x2>
-80000114:	02e22c23          	sw	a4,56(tp) # 38 <SIZE+0x6>
-80000118:	02f22e23          	sw	a5,60(tp) # 3c <SIZE+0xa>
-8000011c:	05022023          	sw	a6,64(tp) # 40 <SIZE+0xe>
-80000120:	05122223          	sw	a7,68(tp) # 44 <SIZE+0x12>
-80000124:	05222423          	sw	s2,72(tp) # 48 <SIZE+0x16>
-80000128:	05322623          	sw	s3,76(tp) # 4c <SIZE+0x1a>
-8000012c:	05422823          	sw	s4,80(tp) # 50 <SIZE+0x1e>
-80000130:	05522a23          	sw	s5,84(tp) # 54 <SIZE+0x22>
-80000134:	05622c23          	sw	s6,88(tp) # 58 <SIZE+0x26>
-80000138:	05722e23          	sw	s7,92(tp) # 5c <SIZE+0x2a>
-8000013c:	07822023          	sw	s8,96(tp) # 60 <SIZE+0x2e>
-80000140:	07922223          	sw	s9,100(tp) # 64 <SIZE+0x32>
-80000144:	07a22423          	sw	s10,104(tp) # 68 <SIZE+0x36>
-80000148:	07b22623          	sw	s11,108(tp) # 6c <SIZE+0x3a>
-8000014c:	07c22823          	sw	t3,112(tp) # 70 <SIZE+0x3e>
-80000150:	07d22a23          	sw	t4,116(tp) # 74 <SIZE+0x42>
-80000154:	07e22c23          	sw	t5,120(tp) # 78 <SIZE+0x46>
-80000158:	07f22e23          	sw	t6,124(tp) # 7c <SIZE+0x4a>
-8000015c:	00100213          	li	tp,1
-80000160:	00008067          	ret
+800000d0 <vx_save_context>:
+800000d0:	01000217          	auipc	tp,0x1000
+800000d4:	24020213          	addi	tp,tp,576 # 81000310 <context>
+800000d8:	00022023          	sw	zero,0(tp) # 0 <A_WARPS-0x7>
+800000dc:	00122223          	sw	ra,4(tp) # 4 <A_WARPS-0x3>
+800000e0:	00222423          	sw	sp,8(tp) # 8 <A_WARPS+0x1>
+800000e4:	00322623          	sw	gp,12(tp) # c <A_WARPS+0x5>
+800000e8:	00422823          	sw	tp,16(tp) # 10 <A_WARPS+0x9>
+800000ec:	00522a23          	sw	t0,20(tp) # 14 <A_WARPS+0xd>
+800000f0:	00622c23          	sw	t1,24(tp) # 18 <A_WARPS+0x11>
+800000f4:	00722e23          	sw	t2,28(tp) # 1c <A_WARPS+0x15>
+800000f8:	02822023          	sw	s0,32(tp) # 20 <A_WARPS+0x19>
+800000fc:	02922223          	sw	s1,36(tp) # 24 <A_WARPS+0x1d>
+80000100:	02a22423          	sw	a0,40(tp) # 28 <A_WARPS+0x21>
+80000104:	02b22623          	sw	a1,44(tp) # 2c <A_WARPS+0x25>
+80000108:	02c22823          	sw	a2,48(tp) # 30 <A_WARPS+0x29>
+8000010c:	02d22a23          	sw	a3,52(tp) # 34 <SIZE+0x2>
+80000110:	02e22c23          	sw	a4,56(tp) # 38 <SIZE+0x6>
+80000114:	02f22e23          	sw	a5,60(tp) # 3c <SIZE+0xa>
+80000118:	05022023          	sw	a6,64(tp) # 40 <SIZE+0xe>
+8000011c:	05122223          	sw	a7,68(tp) # 44 <SIZE+0x12>
+80000120:	05222423          	sw	s2,72(tp) # 48 <SIZE+0x16>
+80000124:	05322623          	sw	s3,76(tp) # 4c <SIZE+0x1a>
+80000128:	05422823          	sw	s4,80(tp) # 50 <SIZE+0x1e>
+8000012c:	05522a23          	sw	s5,84(tp) # 54 <SIZE+0x22>
+80000130:	05622c23          	sw	s6,88(tp) # 58 <SIZE+0x26>
+80000134:	05722e23          	sw	s7,92(tp) # 5c <SIZE+0x2a>
+80000138:	07822023          	sw	s8,96(tp) # 60 <SIZE+0x2e>
+8000013c:	07922223          	sw	s9,100(tp) # 64 <SIZE+0x32>
+80000140:	07a22423          	sw	s10,104(tp) # 68 <SIZE+0x36>
+80000144:	07b22623          	sw	s11,108(tp) # 6c <SIZE+0x3a>
+80000148:	07c22823          	sw	t3,112(tp) # 70 <SIZE+0x3e>
+8000014c:	07d22a23          	sw	t4,116(tp) # 74 <SIZE+0x42>
+80000150:	07e22c23          	sw	t5,120(tp) # 78 <SIZE+0x46>
+80000154:	07f22e23          	sw	t6,124(tp) # 7c <SIZE+0x4a>
+80000158:	00100213          	li	tp,1
+8000015c:	00008067          	ret
 
-80000164 <vx_load_context>:
-80000164:	01000217          	auipc	tp,0x1000
-80000168:	1ac20213          	addi	tp,tp,428 # 81000310 <context>
-8000016c:	00022003          	lw	zero,0(tp) # 0 <A_WARPS-0x7>
-80000170:	00422083          	lw	ra,4(tp) # 4 <A_WARPS-0x3>
-80000174:	00822103          	lw	sp,8(tp) # 8 <A_WARPS+0x1>
-80000178:	00c22183          	lw	gp,12(tp) # c <A_WARPS+0x5>
-8000017c:	01022203          	lw	tp,16(tp) # 10 <A_WARPS+0x9>
-80000180:	01422283          	lw	t0,20(tp) # 14 <A_WARPS+0xd>
-80000184:	01822303          	lw	t1,24(tp) # 18 <A_WARPS+0x11>
-80000188:	01c22383          	lw	t2,28(tp) # 1c <A_WARPS+0x15>
-8000018c:	02022403          	lw	s0,32(tp) # 20 <A_WARPS+0x19>
-80000190:	02422483          	lw	s1,36(tp) # 24 <A_WARPS+0x1d>
-80000194:	02822503          	lw	a0,40(tp) # 28 <A_WARPS+0x21>
-80000198:	02c22583          	lw	a1,44(tp) # 2c <A_WARPS+0x25>
-8000019c:	03022603          	lw	a2,48(tp) # 30 <A_WARPS+0x29>
-800001a0:	03422683          	lw	a3,52(tp) # 34 <SIZE+0x2>
-800001a4:	03822703          	lw	a4,56(tp) # 38 <SIZE+0x6>
-800001a8:	03c22783          	lw	a5,60(tp) # 3c <SIZE+0xa>
-800001ac:	04022803          	lw	a6,64(tp) # 40 <SIZE+0xe>
-800001b0:	04422883          	lw	a7,68(tp) # 44 <SIZE+0x12>
-800001b4:	04822903          	lw	s2,72(tp) # 48 <SIZE+0x16>
-800001b8:	04c22983          	lw	s3,76(tp) # 4c <SIZE+0x1a>
-800001bc:	05022a03          	lw	s4,80(tp) # 50 <SIZE+0x1e>
-800001c0:	05422a83          	lw	s5,84(tp) # 54 <SIZE+0x22>
-800001c4:	05822b03          	lw	s6,88(tp) # 58 <SIZE+0x26>
-800001c8:	05c22b83          	lw	s7,92(tp) # 5c <SIZE+0x2a>
-800001cc:	06022c03          	lw	s8,96(tp) # 60 <SIZE+0x2e>
-800001d0:	06422c83          	lw	s9,100(tp) # 64 <SIZE+0x32>
-800001d4:	06822d03          	lw	s10,104(tp) # 68 <SIZE+0x36>
-800001d8:	06c22d83          	lw	s11,108(tp) # 6c <SIZE+0x3a>
-800001dc:	07022e03          	lw	t3,112(tp) # 70 <SIZE+0x3e>
-800001e0:	07422e83          	lw	t4,116(tp) # 74 <SIZE+0x42>
-800001e4:	07822f03          	lw	t5,120(tp) # 78 <SIZE+0x46>
-800001e8:	07c22f83          	lw	t6,124(tp) # 7c <SIZE+0x4a>
-800001ec:	00000213          	li	tp,0
-800001f0:	00008067          	ret
+80000160 <vx_load_context>:
+80000160:	01000217          	auipc	tp,0x1000
+80000164:	1b020213          	addi	tp,tp,432 # 81000310 <context>
+80000168:	00022003          	lw	zero,0(tp) # 0 <A_WARPS-0x7>
+8000016c:	00422083          	lw	ra,4(tp) # 4 <A_WARPS-0x3>
+80000170:	00822103          	lw	sp,8(tp) # 8 <A_WARPS+0x1>
+80000174:	00c22183          	lw	gp,12(tp) # c <A_WARPS+0x5>
+80000178:	01022203          	lw	tp,16(tp) # 10 <A_WARPS+0x9>
+8000017c:	01422283          	lw	t0,20(tp) # 14 <A_WARPS+0xd>
+80000180:	01822303          	lw	t1,24(tp) # 18 <A_WARPS+0x11>
+80000184:	01c22383          	lw	t2,28(tp) # 1c <A_WARPS+0x15>
+80000188:	02022403          	lw	s0,32(tp) # 20 <A_WARPS+0x19>
+8000018c:	02422483          	lw	s1,36(tp) # 24 <A_WARPS+0x1d>
+80000190:	02822503          	lw	a0,40(tp) # 28 <A_WARPS+0x21>
+80000194:	02c22583          	lw	a1,44(tp) # 2c <A_WARPS+0x25>
+80000198:	03022603          	lw	a2,48(tp) # 30 <A_WARPS+0x29>
+8000019c:	03422683          	lw	a3,52(tp) # 34 <SIZE+0x2>
+800001a0:	03822703          	lw	a4,56(tp) # 38 <SIZE+0x6>
+800001a4:	03c22783          	lw	a5,60(tp) # 3c <SIZE+0xa>
+800001a8:	04022803          	lw	a6,64(tp) # 40 <SIZE+0xe>
+800001ac:	04422883          	lw	a7,68(tp) # 44 <SIZE+0x12>
+800001b0:	04822903          	lw	s2,72(tp) # 48 <SIZE+0x16>
+800001b4:	04c22983          	lw	s3,76(tp) # 4c <SIZE+0x1a>
+800001b8:	05022a03          	lw	s4,80(tp) # 50 <SIZE+0x1e>
+800001bc:	05422a83          	lw	s5,84(tp) # 54 <SIZE+0x22>
+800001c0:	05822b03          	lw	s6,88(tp) # 58 <SIZE+0x26>
+800001c4:	05c22b83          	lw	s7,92(tp) # 5c <SIZE+0x2a>
+800001c8:	06022c03          	lw	s8,96(tp) # 60 <SIZE+0x2e>
+800001cc:	06422c83          	lw	s9,100(tp) # 64 <SIZE+0x32>
+800001d0:	06822d03          	lw	s10,104(tp) # 68 <SIZE+0x36>
+800001d4:	06c22d83          	lw	s11,108(tp) # 6c <SIZE+0x3a>
+800001d8:	07022e03          	lw	t3,112(tp) # 70 <SIZE+0x3e>
+800001dc:	07422e83          	lw	t4,116(tp) # 74 <SIZE+0x42>
+800001e0:	07822f03          	lw	t5,120(tp) # 78 <SIZE+0x46>
+800001e4:	07c22f83          	lw	t6,124(tp) # 7c <SIZE+0x4a>
+800001e8:	00000213          	li	tp,0
+800001ec:	00008067          	ret
 
-800001f4 <vx_available_warps>:
-800001f4:	02002573          	csrr	a0,0x20
-800001f8:	00008067          	ret
+800001f0 <vx_available_warps>:
+800001f0:	02002573          	csrr	a0,0x20
+800001f4:	00008067          	ret
 
-800001fc <vx_available_threads>:
-800001fc:	02102573          	csrr	a0,0x21
-80000200:	00008067          	ret
+800001f8 <vx_available_threads>:
+800001f8:	02102573          	csrr	a0,0x21
+800001fc:	00008067          	ret
 
-80000204 <vx_before_main>:
-80000204:	fe010113          	addi	sp,sp,-32
-80000208:	00112e23          	sw	ra,28(sp)
-8000020c:	00812c23          	sw	s0,24(sp)
-80000210:	02010413          	addi	s0,sp,32
-80000214:	fe042623          	sw	zero,-20(s0)
-80000218:	0340006f          	j	8000024c <vx_before_main+0x48>
-8000021c:	fec42703          	lw	a4,-20(s0)
-80000220:	000017b7          	lui	a5,0x1
-80000224:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
-80000228:	02f70733          	mul	a4,a4,a5
-8000022c:	810007b7          	lui	a5,0x81000
-80000230:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
-80000234:	00f707b3          	add	a5,a4,a5
-80000238:	00078513          	mv	a0,a5
-8000023c:	440000ef          	jal	ra,8000067c <queue_initialize>
-80000240:	fec42783          	lw	a5,-20(s0)
-80000244:	00178793          	addi	a5,a5,1
-80000248:	fef42623          	sw	a5,-20(s0)
-8000024c:	fec42703          	lw	a4,-20(s0)
-80000250:	01f00793          	li	a5,31
-80000254:	fce7d4e3          	bge	a5,a4,8000021c <vx_before_main+0x18>
-80000258:	00000013          	nop
-8000025c:	01c12083          	lw	ra,28(sp)
-80000260:	01812403          	lw	s0,24(sp)
-80000264:	02010113          	addi	sp,sp,32
-80000268:	00008067          	ret
+80000200 <vx_before_main>:
+80000200:	fe010113          	addi	sp,sp,-32
+80000204:	00112e23          	sw	ra,28(sp)
+80000208:	00812c23          	sw	s0,24(sp)
+8000020c:	02010413          	addi	s0,sp,32
+80000210:	fe042623          	sw	zero,-20(s0)
+80000214:	0340006f          	j	80000248 <vx_before_main+0x48>
+80000218:	fec42703          	lw	a4,-20(s0)
+8000021c:	000017b7          	lui	a5,0x1
+80000220:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
+80000224:	02f70733          	mul	a4,a4,a5
+80000228:	810007b7          	lui	a5,0x81000
+8000022c:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
+80000230:	00f707b3          	add	a5,a4,a5
+80000234:	00078513          	mv	a0,a5
+80000238:	440000ef          	jal	ra,80000678 <queue_initialize>
+8000023c:	fec42783          	lw	a5,-20(s0)
+80000240:	00178793          	addi	a5,a5,1
+80000244:	fef42623          	sw	a5,-20(s0)
+80000248:	fec42703          	lw	a4,-20(s0)
+8000024c:	01f00793          	li	a5,31
+80000250:	fce7d4e3          	bge	a5,a4,80000218 <vx_before_main+0x18>
+80000254:	00000013          	nop
+80000258:	01c12083          	lw	ra,28(sp)
+8000025c:	01812403          	lw	s0,24(sp)
+80000260:	02010113          	addi	sp,sp,32
+80000264:	00008067          	ret
 
-8000026c <vx_reschedule_warps>:
-8000026c:	fd010113          	addi	sp,sp,-48
-80000270:	02112623          	sw	ra,44(sp)
-80000274:	02812423          	sw	s0,40(sp)
-80000278:	03a12223          	sw	s10,36(sp)
-8000027c:	03010413          	addi	s0,sp,48
-80000280:	00000013          	nop
-80000284:	000d0713          	mv	a4,s10
-80000288:	000017b7          	lui	a5,0x1
-8000028c:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
-80000290:	02f70733          	mul	a4,a4,a5
-80000294:	810007b7          	lui	a5,0x81000
-80000298:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
-8000029c:	00f707b3          	add	a5,a4,a5
-800002a0:	00078513          	mv	a0,a5
-800002a4:	504000ef          	jal	ra,800007a8 <queue_isEmpty>
-800002a8:	00050793          	mv	a5,a0
-800002ac:	02078a63          	beqz	a5,800002e0 <vx_reschedule_warps+0x74>
-800002b0:	000d0713          	mv	a4,s10
-800002b4:	810007b7          	lui	a5,0x81000
-800002b8:	00271713          	slli	a4,a4,0x2
-800002bc:	26878793          	addi	a5,a5,616 # 81000268 <barrier_bool+0xfffd6fa4>
-800002c0:	00f707b3          	add	a5,a4,a5
-800002c4:	00100713          	li	a4,1
-800002c8:	00e7a023          	sw	a4,0(a5)
-800002cc:	000d0793          	mv	a5,s10
-800002d0:	00079663          	bnez	a5,800002dc <vx_reschedule_warps+0x70>
-800002d4:	e91ff0ef          	jal	ra,80000164 <vx_load_context>
-800002d8:	05c0006f          	j	80000334 <vx_reschedule_warps+0xc8>
-800002dc:	00000073          	ecall
-800002e0:	000d0713          	mv	a4,s10
-800002e4:	000017b7          	lui	a5,0x1
-800002e8:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
-800002ec:	02f70733          	mul	a4,a4,a5
-800002f0:	810007b7          	lui	a5,0x81000
-800002f4:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
-800002f8:	00f707b3          	add	a5,a4,a5
-800002fc:	fd840713          	addi	a4,s0,-40
-80000300:	00070593          	mv	a1,a4
-80000304:	00078513          	mv	a0,a5
-80000308:	400000ef          	jal	ra,80000708 <queue_dequeue>
-8000030c:	fe042783          	lw	a5,-32(s0)
-80000310:	00078113          	mv	sp,a5
-80000314:	fdc42783          	lw	a5,-36(s0)
-80000318:	fd842583          	lw	a1,-40(s0)
-8000031c:	fe442603          	lw	a2,-28(s0)
-80000320:	fe842683          	lw	a3,-24(s0)
-80000324:	fec42703          	lw	a4,-20(s0)
-80000328:	00078513          	mv	a0,a5
-8000032c:	cfdff0ef          	jal	ra,80000028 <vx_createThreads>
-80000330:	00000073          	ecall
-80000334:	02c12083          	lw	ra,44(sp)
-80000338:	02812403          	lw	s0,40(sp)
-8000033c:	02412d03          	lw	s10,36(sp)
-80000340:	03010113          	addi	sp,sp,48
-80000344:	00008067          	ret
+80000268 <vx_reschedule_warps>:
+80000268:	fd010113          	addi	sp,sp,-48
+8000026c:	02112623          	sw	ra,44(sp)
+80000270:	02812423          	sw	s0,40(sp)
+80000274:	03a12223          	sw	s10,36(sp)
+80000278:	03010413          	addi	s0,sp,48
+8000027c:	00000013          	nop
+80000280:	000d0713          	mv	a4,s10
+80000284:	000017b7          	lui	a5,0x1
+80000288:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
+8000028c:	02f70733          	mul	a4,a4,a5
+80000290:	810007b7          	lui	a5,0x81000
+80000294:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
+80000298:	00f707b3          	add	a5,a4,a5
+8000029c:	00078513          	mv	a0,a5
+800002a0:	504000ef          	jal	ra,800007a4 <queue_isEmpty>
+800002a4:	00050793          	mv	a5,a0
+800002a8:	02078a63          	beqz	a5,800002dc <vx_reschedule_warps+0x74>
+800002ac:	000d0713          	mv	a4,s10
+800002b0:	810007b7          	lui	a5,0x81000
+800002b4:	00271713          	slli	a4,a4,0x2
+800002b8:	26878793          	addi	a5,a5,616 # 81000268 <barrier_bool+0xfffd6fa4>
+800002bc:	00f707b3          	add	a5,a4,a5
+800002c0:	00100713          	li	a4,1
+800002c4:	00e7a023          	sw	a4,0(a5)
+800002c8:	000d0793          	mv	a5,s10
+800002cc:	00079663          	bnez	a5,800002d8 <vx_reschedule_warps+0x70>
+800002d0:	e91ff0ef          	jal	ra,80000160 <vx_load_context>
+800002d4:	05c0006f          	j	80000330 <vx_reschedule_warps+0xc8>
+800002d8:	00000073          	ecall
+800002dc:	000d0713          	mv	a4,s10
+800002e0:	000017b7          	lui	a5,0x1
+800002e4:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
+800002e8:	02f70733          	mul	a4,a4,a5
+800002ec:	810007b7          	lui	a5,0x81000
+800002f0:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
+800002f4:	00f707b3          	add	a5,a4,a5
+800002f8:	fd840713          	addi	a4,s0,-40
+800002fc:	00070593          	mv	a1,a4
+80000300:	00078513          	mv	a0,a5
+80000304:	400000ef          	jal	ra,80000704 <queue_dequeue>
+80000308:	fe042783          	lw	a5,-32(s0)
+8000030c:	00078113          	mv	sp,a5
+80000310:	fdc42783          	lw	a5,-36(s0)
+80000314:	fd842583          	lw	a1,-40(s0)
+80000318:	fe442603          	lw	a2,-28(s0)
+8000031c:	fe842683          	lw	a3,-24(s0)
+80000320:	fec42703          	lw	a4,-20(s0)
+80000324:	00078513          	mv	a0,a5
+80000328:	cfdff0ef          	jal	ra,80000024 <vx_createThreads>
+8000032c:	00000073          	ecall
+80000330:	02c12083          	lw	ra,44(sp)
+80000334:	02812403          	lw	s0,40(sp)
+80000338:	02412d03          	lw	s10,36(sp)
+8000033c:	03010113          	addi	sp,sp,48
+80000340:	00008067          	ret
 
-80000348 <vx_schedule_warps>:
-80000348:	fb010113          	addi	sp,sp,-80
-8000034c:	04112623          	sw	ra,76(sp)
-80000350:	04812423          	sw	s0,72(sp)
-80000354:	05010413          	addi	s0,sp,80
-80000358:	e9dff0ef          	jal	ra,800001f4 <vx_available_warps>
-8000035c:	fea42423          	sw	a0,-24(s0)
-80000360:	00010993          	mv	s3,sp
-80000364:	00100793          	li	a5,1
-80000368:	fef42623          	sw	a5,-20(s0)
-8000036c:	08c0006f          	j	800003f8 <vx_schedule_warps+0xb0>
-80000370:	fec42703          	lw	a4,-20(s0)
-80000374:	000017b7          	lui	a5,0x1
-80000378:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
-8000037c:	02f70733          	mul	a4,a4,a5
-80000380:	810007b7          	lui	a5,0x81000
-80000384:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
-80000388:	00f707b3          	add	a5,a4,a5
-8000038c:	00078513          	mv	a0,a5
-80000390:	418000ef          	jal	ra,800007a8 <queue_isEmpty>
-80000394:	00050793          	mv	a5,a0
-80000398:	04079a63          	bnez	a5,800003ec <vx_schedule_warps+0xa4>
-8000039c:	fec42703          	lw	a4,-20(s0)
-800003a0:	000017b7          	lui	a5,0x1
-800003a4:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
-800003a8:	02f70733          	mul	a4,a4,a5
-800003ac:	810007b7          	lui	a5,0x81000
-800003b0:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
-800003b4:	00f707b3          	add	a5,a4,a5
-800003b8:	fd040713          	addi	a4,s0,-48
-800003bc:	00070593          	mv	a1,a4
-800003c0:	00078513          	mv	a0,a5
-800003c4:	344000ef          	jal	ra,80000708 <queue_dequeue>
-800003c8:	fd842783          	lw	a5,-40(s0)
-800003cc:	00078113          	mv	sp,a5
-800003d0:	fd442783          	lw	a5,-44(s0)
-800003d4:	fd042583          	lw	a1,-48(s0)
-800003d8:	fdc42603          	lw	a2,-36(s0)
-800003dc:	fe042683          	lw	a3,-32(s0)
-800003e0:	fe442703          	lw	a4,-28(s0)
-800003e4:	00078513          	mv	a0,a5
-800003e8:	cddff0ef          	jal	ra,800000c4 <vx_wspawn>
-800003ec:	fec42783          	lw	a5,-20(s0)
-800003f0:	00178793          	addi	a5,a5,1
-800003f4:	fef42623          	sw	a5,-20(s0)
-800003f8:	fec42783          	lw	a5,-20(s0)
-800003fc:	fe842703          	lw	a4,-24(s0)
-80000400:	f6e7e8e3          	bltu	a5,a4,80000370 <vx_schedule_warps+0x28>
-80000404:	00098113          	mv	sp,s3
-80000408:	ccdff0ef          	jal	ra,800000d4 <vx_save_context>
-8000040c:	00020793          	mv	a5,tp
-80000410:	04078863          	beqz	a5,80000460 <vx_schedule_warps+0x118>
-80000414:	810007b7          	lui	a5,0x81000
-80000418:	41078513          	addi	a0,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
-8000041c:	38c000ef          	jal	ra,800007a8 <queue_isEmpty>
-80000420:	00050793          	mv	a5,a0
-80000424:	02079e63          	bnez	a5,80000460 <vx_schedule_warps+0x118>
-80000428:	fb840793          	addi	a5,s0,-72
-8000042c:	00078593          	mv	a1,a5
-80000430:	810007b7          	lui	a5,0x81000
-80000434:	41078513          	addi	a0,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
-80000438:	2d0000ef          	jal	ra,80000708 <queue_dequeue>
-8000043c:	fc042783          	lw	a5,-64(s0)
-80000440:	00078113          	mv	sp,a5
-80000444:	fbc42783          	lw	a5,-68(s0)
-80000448:	fb842583          	lw	a1,-72(s0)
-8000044c:	fc442603          	lw	a2,-60(s0)
-80000450:	fc842683          	lw	a3,-56(s0)
-80000454:	fcc42703          	lw	a4,-52(s0)
-80000458:	00078513          	mv	a0,a5
-8000045c:	bcdff0ef          	jal	ra,80000028 <vx_createThreads>
-80000460:	00000013          	nop
-80000464:	04c12083          	lw	ra,76(sp)
-80000468:	04812403          	lw	s0,72(sp)
-8000046c:	05010113          	addi	sp,sp,80
-80000470:	00008067          	ret
+80000344 <vx_schedule_warps>:
+80000344:	fb010113          	addi	sp,sp,-80
+80000348:	04112623          	sw	ra,76(sp)
+8000034c:	04812423          	sw	s0,72(sp)
+80000350:	05010413          	addi	s0,sp,80
+80000354:	e9dff0ef          	jal	ra,800001f0 <vx_available_warps>
+80000358:	fea42423          	sw	a0,-24(s0)
+8000035c:	00010993          	mv	s3,sp
+80000360:	00100793          	li	a5,1
+80000364:	fef42623          	sw	a5,-20(s0)
+80000368:	08c0006f          	j	800003f4 <vx_schedule_warps+0xb0>
+8000036c:	fec42703          	lw	a4,-20(s0)
+80000370:	000017b7          	lui	a5,0x1
+80000374:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
+80000378:	02f70733          	mul	a4,a4,a5
+8000037c:	810007b7          	lui	a5,0x81000
+80000380:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
+80000384:	00f707b3          	add	a5,a4,a5
+80000388:	00078513          	mv	a0,a5
+8000038c:	418000ef          	jal	ra,800007a4 <queue_isEmpty>
+80000390:	00050793          	mv	a5,a0
+80000394:	04079a63          	bnez	a5,800003e8 <vx_schedule_warps+0xa4>
+80000398:	fec42703          	lw	a4,-20(s0)
+8000039c:	000017b7          	lui	a5,0x1
+800003a0:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
+800003a4:	02f70733          	mul	a4,a4,a5
+800003a8:	810007b7          	lui	a5,0x81000
+800003ac:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
+800003b0:	00f707b3          	add	a5,a4,a5
+800003b4:	fd040713          	addi	a4,s0,-48
+800003b8:	00070593          	mv	a1,a4
+800003bc:	00078513          	mv	a0,a5
+800003c0:	344000ef          	jal	ra,80000704 <queue_dequeue>
+800003c4:	fd842783          	lw	a5,-40(s0)
+800003c8:	00078113          	mv	sp,a5
+800003cc:	fd442783          	lw	a5,-44(s0)
+800003d0:	fd042583          	lw	a1,-48(s0)
+800003d4:	fdc42603          	lw	a2,-36(s0)
+800003d8:	fe042683          	lw	a3,-32(s0)
+800003dc:	fe442703          	lw	a4,-28(s0)
+800003e0:	00078513          	mv	a0,a5
+800003e4:	cddff0ef          	jal	ra,800000c0 <vx_wspawn>
+800003e8:	fec42783          	lw	a5,-20(s0)
+800003ec:	00178793          	addi	a5,a5,1
+800003f0:	fef42623          	sw	a5,-20(s0)
+800003f4:	fec42783          	lw	a5,-20(s0)
+800003f8:	fe842703          	lw	a4,-24(s0)
+800003fc:	f6e7e8e3          	bltu	a5,a4,8000036c <vx_schedule_warps+0x28>
+80000400:	00098113          	mv	sp,s3
+80000404:	ccdff0ef          	jal	ra,800000d0 <vx_save_context>
+80000408:	00020793          	mv	a5,tp
+8000040c:	04078863          	beqz	a5,8000045c <vx_schedule_warps+0x118>
+80000410:	810007b7          	lui	a5,0x81000
+80000414:	41078513          	addi	a0,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
+80000418:	38c000ef          	jal	ra,800007a4 <queue_isEmpty>
+8000041c:	00050793          	mv	a5,a0
+80000420:	02079e63          	bnez	a5,8000045c <vx_schedule_warps+0x118>
+80000424:	fb840793          	addi	a5,s0,-72
+80000428:	00078593          	mv	a1,a5
+8000042c:	810007b7          	lui	a5,0x81000
+80000430:	41078513          	addi	a0,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
+80000434:	2d0000ef          	jal	ra,80000704 <queue_dequeue>
+80000438:	fc042783          	lw	a5,-64(s0)
+8000043c:	00078113          	mv	sp,a5
+80000440:	fbc42783          	lw	a5,-68(s0)
+80000444:	fb842583          	lw	a1,-72(s0)
+80000448:	fc442603          	lw	a2,-60(s0)
+8000044c:	fc842683          	lw	a3,-56(s0)
+80000450:	fcc42703          	lw	a4,-52(s0)
+80000454:	00078513          	mv	a0,a5
+80000458:	bcdff0ef          	jal	ra,80000024 <vx_createThreads>
+8000045c:	00000013          	nop
+80000460:	04c12083          	lw	ra,76(sp)
+80000464:	04812403          	lw	s0,72(sp)
+80000468:	05010113          	addi	sp,sp,80
+8000046c:	00008067          	ret
 
-80000474 <vx_spawnWarps>:
-80000474:	fb010113          	addi	sp,sp,-80
-80000478:	04112623          	sw	ra,76(sp)
-8000047c:	04812423          	sw	s0,72(sp)
-80000480:	05010413          	addi	s0,sp,80
-80000484:	faa42e23          	sw	a0,-68(s0)
-80000488:	fab42c23          	sw	a1,-72(s0)
-8000048c:	fac42a23          	sw	a2,-76(s0)
-80000490:	fad42823          	sw	a3,-80(s0)
-80000494:	d71ff0ef          	jal	ra,80000204 <vx_before_main>
-80000498:	d5dff0ef          	jal	ra,800001f4 <vx_available_warps>
-8000049c:	fea42223          	sw	a0,-28(s0)
-800004a0:	00010913          	mv	s2,sp
-800004a4:	fe042623          	sw	zero,-20(s0)
-800004a8:	fe042423          	sw	zero,-24(s0)
-800004ac:	0900006f          	j	8000053c <vx_spawnWarps+0xc8>
-800004b0:	ffff09b7          	lui	s3,0xffff0
-800004b4:	01310133          	add	sp,sp,s3
-800004b8:	fe842783          	lw	a5,-24(s0)
-800004bc:	fcf42623          	sw	a5,-52(s0)
-800004c0:	fb842783          	lw	a5,-72(s0)
-800004c4:	fcf42823          	sw	a5,-48(s0)
-800004c8:	00010793          	mv	a5,sp
-800004cc:	fcf42a23          	sw	a5,-44(s0)
-800004d0:	fb442783          	lw	a5,-76(s0)
-800004d4:	fcf42c23          	sw	a5,-40(s0)
-800004d8:	fb042783          	lw	a5,-80(s0)
-800004dc:	fcf42e23          	sw	a5,-36(s0)
-800004e0:	fec42783          	lw	a5,-20(s0)
-800004e4:	fef42023          	sw	a5,-32(s0)
-800004e8:	fec42703          	lw	a4,-20(s0)
-800004ec:	000017b7          	lui	a5,0x1
-800004f0:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
-800004f4:	02f70733          	mul	a4,a4,a5
-800004f8:	810007b7          	lui	a5,0x81000
-800004fc:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
-80000500:	00f707b3          	add	a5,a4,a5
-80000504:	fcc40713          	addi	a4,s0,-52
-80000508:	00070593          	mv	a1,a4
-8000050c:	00078513          	mv	a0,a5
-80000510:	190000ef          	jal	ra,800006a0 <queue_enqueue>
-80000514:	fec42783          	lw	a5,-20(s0)
-80000518:	00178793          	addi	a5,a5,1
-8000051c:	fef42623          	sw	a5,-20(s0)
-80000520:	fec42783          	lw	a5,-20(s0)
-80000524:	fe442703          	lw	a4,-28(s0)
-80000528:	00e7e463          	bltu	a5,a4,80000530 <vx_spawnWarps+0xbc>
-8000052c:	fe042623          	sw	zero,-20(s0)
-80000530:	fe842783          	lw	a5,-24(s0)
-80000534:	00178793          	addi	a5,a5,1
-80000538:	fef42423          	sw	a5,-24(s0)
-8000053c:	fe842703          	lw	a4,-24(s0)
-80000540:	fbc42783          	lw	a5,-68(s0)
-80000544:	f6f766e3          	bltu	a4,a5,800004b0 <vx_spawnWarps+0x3c>
-80000548:	00090113          	mv	sp,s2
-8000054c:	dfdff0ef          	jal	ra,80000348 <vx_schedule_warps>
-80000550:	00000013          	nop
-80000554:	04c12083          	lw	ra,76(sp)
-80000558:	04812403          	lw	s0,72(sp)
-8000055c:	05010113          	addi	sp,sp,80
-80000560:	00008067          	ret
+80000470 <vx_spawnWarps>:
+80000470:	fb010113          	addi	sp,sp,-80
+80000474:	04112623          	sw	ra,76(sp)
+80000478:	04812423          	sw	s0,72(sp)
+8000047c:	05010413          	addi	s0,sp,80
+80000480:	faa42e23          	sw	a0,-68(s0)
+80000484:	fab42c23          	sw	a1,-72(s0)
+80000488:	fac42a23          	sw	a2,-76(s0)
+8000048c:	fad42823          	sw	a3,-80(s0)
+80000490:	d71ff0ef          	jal	ra,80000200 <vx_before_main>
+80000494:	d5dff0ef          	jal	ra,800001f0 <vx_available_warps>
+80000498:	fea42223          	sw	a0,-28(s0)
+8000049c:	00010913          	mv	s2,sp
+800004a0:	fe042623          	sw	zero,-20(s0)
+800004a4:	fe042423          	sw	zero,-24(s0)
+800004a8:	0900006f          	j	80000538 <vx_spawnWarps+0xc8>
+800004ac:	ffff09b7          	lui	s3,0xffff0
+800004b0:	01310133          	add	sp,sp,s3
+800004b4:	fe842783          	lw	a5,-24(s0)
+800004b8:	fcf42623          	sw	a5,-52(s0)
+800004bc:	fb842783          	lw	a5,-72(s0)
+800004c0:	fcf42823          	sw	a5,-48(s0)
+800004c4:	00010793          	mv	a5,sp
+800004c8:	fcf42a23          	sw	a5,-44(s0)
+800004cc:	fb442783          	lw	a5,-76(s0)
+800004d0:	fcf42c23          	sw	a5,-40(s0)
+800004d4:	fb042783          	lw	a5,-80(s0)
+800004d8:	fcf42e23          	sw	a5,-36(s0)
+800004dc:	fec42783          	lw	a5,-20(s0)
+800004e0:	fef42023          	sw	a5,-32(s0)
+800004e4:	fec42703          	lw	a4,-20(s0)
+800004e8:	000017b7          	lui	a5,0x1
+800004ec:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
+800004f0:	02f70733          	mul	a4,a4,a5
+800004f4:	810007b7          	lui	a5,0x81000
+800004f8:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
+800004fc:	00f707b3          	add	a5,a4,a5
+80000500:	fcc40713          	addi	a4,s0,-52
+80000504:	00070593          	mv	a1,a4
+80000508:	00078513          	mv	a0,a5
+8000050c:	190000ef          	jal	ra,8000069c <queue_enqueue>
+80000510:	fec42783          	lw	a5,-20(s0)
+80000514:	00178793          	addi	a5,a5,1
+80000518:	fef42623          	sw	a5,-20(s0)
+8000051c:	fec42783          	lw	a5,-20(s0)
+80000520:	fe442703          	lw	a4,-28(s0)
+80000524:	00e7e463          	bltu	a5,a4,8000052c <vx_spawnWarps+0xbc>
+80000528:	fe042623          	sw	zero,-20(s0)
+8000052c:	fe842783          	lw	a5,-24(s0)
+80000530:	00178793          	addi	a5,a5,1
+80000534:	fef42423          	sw	a5,-24(s0)
+80000538:	fe842703          	lw	a4,-24(s0)
+8000053c:	fbc42783          	lw	a5,-68(s0)
+80000540:	f6f766e3          	bltu	a4,a5,800004ac <vx_spawnWarps+0x3c>
+80000544:	00090113          	mv	sp,s2
+80000548:	dfdff0ef          	jal	ra,80000344 <vx_schedule_warps>
+8000054c:	00000013          	nop
+80000550:	04c12083          	lw	ra,76(sp)
+80000554:	04812403          	lw	s0,72(sp)
+80000558:	05010113          	addi	sp,sp,80
+8000055c:	00008067          	ret
 
-80000564 <vx_wait_for_warps>:
-80000564:	fd010113          	addi	sp,sp,-48
-80000568:	02112623          	sw	ra,44(sp)
-8000056c:	02812423          	sw	s0,40(sp)
-80000570:	03010413          	addi	s0,sp,48
-80000574:	fca42e23          	sw	a0,-36(s0)
-80000578:	fdc42583          	lw	a1,-36(s0)
-8000057c:	810007b7          	lui	a5,0x81000
-80000580:	04078513          	addi	a0,a5,64 # 81000040 <barrier_bool+0xfffd6d7c>
-80000584:	354000ef          	jal	ra,800008d8 <vx_printf>
-80000588:	c6dff0ef          	jal	ra,800001f4 <vx_available_warps>
-8000058c:	fea42023          	sw	a0,-32(s0)
-80000590:	fe042623          	sw	zero,-20(s0)
-80000594:	0680006f          	j	800005fc <vx_wait_for_warps+0x98>
-80000598:	00100793          	li	a5,1
-8000059c:	fef42623          	sw	a5,-20(s0)
-800005a0:	fe042423          	sw	zero,-24(s0)
-800005a4:	03c0006f          	j	800005e0 <vx_wait_for_warps+0x7c>
-800005a8:	810007b7          	lui	a5,0x81000
-800005ac:	fe842703          	lw	a4,-24(s0)
-800005b0:	00271713          	slli	a4,a4,0x2
-800005b4:	26878793          	addi	a5,a5,616 # 81000268 <barrier_bool+0xfffd6fa4>
-800005b8:	00f707b3          	add	a5,a4,a5
-800005bc:	0007a703          	lw	a4,0(a5)
-800005c0:	00100793          	li	a5,1
-800005c4:	00f71863          	bne	a4,a5,800005d4 <vx_wait_for_warps+0x70>
-800005c8:	fec42783          	lw	a5,-20(s0)
-800005cc:	00178793          	addi	a5,a5,1
-800005d0:	fef42623          	sw	a5,-20(s0)
-800005d4:	fe842783          	lw	a5,-24(s0)
-800005d8:	00178793          	addi	a5,a5,1
-800005dc:	fef42423          	sw	a5,-24(s0)
-800005e0:	fe842703          	lw	a4,-24(s0)
-800005e4:	01f00793          	li	a5,31
-800005e8:	fce7d0e3          	bge	a5,a4,800005a8 <vx_wait_for_warps+0x44>
-800005ec:	fec42583          	lw	a1,-20(s0)
-800005f0:	810007b7          	lui	a5,0x81000
-800005f4:	04c78513          	addi	a0,a5,76 # 8100004c <barrier_bool+0xfffd6d88>
-800005f8:	2e0000ef          	jal	ra,800008d8 <vx_printf>
-800005fc:	fec42703          	lw	a4,-20(s0)
-80000600:	fdc42783          	lw	a5,-36(s0)
-80000604:	f8f76ae3          	bltu	a4,a5,80000598 <vx_wait_for_warps+0x34>
-80000608:	fe042223          	sw	zero,-28(s0)
-8000060c:	0280006f          	j	80000634 <vx_wait_for_warps+0xd0>
-80000610:	810007b7          	lui	a5,0x81000
-80000614:	fe442703          	lw	a4,-28(s0)
-80000618:	00271713          	slli	a4,a4,0x2
-8000061c:	26878793          	addi	a5,a5,616 # 81000268 <barrier_bool+0xfffd6fa4>
-80000620:	00f707b3          	add	a5,a4,a5
-80000624:	0007a023          	sw	zero,0(a5)
-80000628:	fe442783          	lw	a5,-28(s0)
-8000062c:	00178793          	addi	a5,a5,1
-80000630:	fef42223          	sw	a5,-28(s0)
-80000634:	fe442783          	lw	a5,-28(s0)
-80000638:	fe042703          	lw	a4,-32(s0)
-8000063c:	fce7eae3          	bltu	a5,a4,80000610 <vx_wait_for_warps+0xac>
-80000640:	00000013          	nop
-80000644:	02c12083          	lw	ra,44(sp)
-80000648:	02812403          	lw	s0,40(sp)
-8000064c:	03010113          	addi	sp,sp,48
-80000650:	00008067          	ret
+80000560 <vx_wait_for_warps>:
+80000560:	fd010113          	addi	sp,sp,-48
+80000564:	02112623          	sw	ra,44(sp)
+80000568:	02812423          	sw	s0,40(sp)
+8000056c:	03010413          	addi	s0,sp,48
+80000570:	fca42e23          	sw	a0,-36(s0)
+80000574:	fdc42583          	lw	a1,-36(s0)
+80000578:	810007b7          	lui	a5,0x81000
+8000057c:	04078513          	addi	a0,a5,64 # 81000040 <barrier_bool+0xfffd6d7c>
+80000580:	354000ef          	jal	ra,800008d4 <vx_printf>
+80000584:	c6dff0ef          	jal	ra,800001f0 <vx_available_warps>
+80000588:	fea42023          	sw	a0,-32(s0)
+8000058c:	fe042623          	sw	zero,-20(s0)
+80000590:	0680006f          	j	800005f8 <vx_wait_for_warps+0x98>
+80000594:	00100793          	li	a5,1
+80000598:	fef42623          	sw	a5,-20(s0)
+8000059c:	fe042423          	sw	zero,-24(s0)
+800005a0:	03c0006f          	j	800005dc <vx_wait_for_warps+0x7c>
+800005a4:	810007b7          	lui	a5,0x81000
+800005a8:	fe842703          	lw	a4,-24(s0)
+800005ac:	00271713          	slli	a4,a4,0x2
+800005b0:	26878793          	addi	a5,a5,616 # 81000268 <barrier_bool+0xfffd6fa4>
+800005b4:	00f707b3          	add	a5,a4,a5
+800005b8:	0007a703          	lw	a4,0(a5)
+800005bc:	00100793          	li	a5,1
+800005c0:	00f71863          	bne	a4,a5,800005d0 <vx_wait_for_warps+0x70>
+800005c4:	fec42783          	lw	a5,-20(s0)
+800005c8:	00178793          	addi	a5,a5,1
+800005cc:	fef42623          	sw	a5,-20(s0)
+800005d0:	fe842783          	lw	a5,-24(s0)
+800005d4:	00178793          	addi	a5,a5,1
+800005d8:	fef42423          	sw	a5,-24(s0)
+800005dc:	fe842703          	lw	a4,-24(s0)
+800005e0:	01f00793          	li	a5,31
+800005e4:	fce7d0e3          	bge	a5,a4,800005a4 <vx_wait_for_warps+0x44>
+800005e8:	fec42583          	lw	a1,-20(s0)
+800005ec:	810007b7          	lui	a5,0x81000
+800005f0:	04c78513          	addi	a0,a5,76 # 8100004c <barrier_bool+0xfffd6d88>
+800005f4:	2e0000ef          	jal	ra,800008d4 <vx_printf>
+800005f8:	fec42703          	lw	a4,-20(s0)
+800005fc:	fdc42783          	lw	a5,-36(s0)
+80000600:	f8f76ae3          	bltu	a4,a5,80000594 <vx_wait_for_warps+0x34>
+80000604:	fe042223          	sw	zero,-28(s0)
+80000608:	0280006f          	j	80000630 <vx_wait_for_warps+0xd0>
+8000060c:	810007b7          	lui	a5,0x81000
+80000610:	fe442703          	lw	a4,-28(s0)
+80000614:	00271713          	slli	a4,a4,0x2
+80000618:	26878793          	addi	a5,a5,616 # 81000268 <barrier_bool+0xfffd6fa4>
+8000061c:	00f707b3          	add	a5,a4,a5
+80000620:	0007a023          	sw	zero,0(a5)
+80000624:	fe442783          	lw	a5,-28(s0)
+80000628:	00178793          	addi	a5,a5,1
+8000062c:	fef42223          	sw	a5,-28(s0)
+80000630:	fe442783          	lw	a5,-28(s0)
+80000634:	fe042703          	lw	a4,-32(s0)
+80000638:	fce7eae3          	bltu	a5,a4,8000060c <vx_wait_for_warps+0xac>
+8000063c:	00000013          	nop
+80000640:	02c12083          	lw	ra,44(sp)
+80000644:	02812403          	lw	s0,40(sp)
+80000648:	03010113          	addi	sp,sp,48
+8000064c:	00008067          	ret
 
-80000654 <vx_get_arg_struct>:
-80000654:	ff010113          	addi	sp,sp,-16
-80000658:	00812623          	sw	s0,12(sp)
-8000065c:	01712423          	sw	s7,8(sp)
-80000660:	01010413          	addi	s0,sp,16
-80000664:	000b8793          	mv	a5,s7
-80000668:	00078513          	mv	a0,a5
-8000066c:	00c12403          	lw	s0,12(sp)
-80000670:	00812b83          	lw	s7,8(sp)
-80000674:	01010113          	addi	sp,sp,16
-80000678:	00008067          	ret
+80000650 <vx_get_arg_struct>:
+80000650:	ff010113          	addi	sp,sp,-16
+80000654:	00812623          	sw	s0,12(sp)
+80000658:	01712423          	sw	s7,8(sp)
+8000065c:	01010413          	addi	s0,sp,16
+80000660:	000b8793          	mv	a5,s7
+80000664:	00078513          	mv	a0,a5
+80000668:	00c12403          	lw	s0,12(sp)
+8000066c:	00812b83          	lw	s7,8(sp)
+80000670:	01010113          	addi	sp,sp,16
+80000674:	00008067          	ret
 
-8000067c <queue_initialize>:
-8000067c:	00050293          	mv	t0,a0
-80000680:	00000313          	li	t1,0
-80000684:	00700393          	li	t2,7
-80000688:	0062a023          	sw	t1,0(t0)
-8000068c:	0062a223          	sw	t1,4(t0)
-80000690:	0062a423          	sw	t1,8(t0)
-80000694:	0072a623          	sw	t2,12(t0)
-80000698:	0062a823          	sw	t1,16(t0)
-8000069c:	00008067          	ret
+80000678 <queue_initialize>:
+80000678:	00050293          	mv	t0,a0
+8000067c:	00000313          	li	t1,0
+80000680:	00700393          	li	t2,7
+80000684:	0062a023          	sw	t1,0(t0)
+80000688:	0062a223          	sw	t1,4(t0)
+8000068c:	0062a423          	sw	t1,8(t0)
+80000690:	0072a623          	sw	t2,12(t0)
+80000694:	0062a823          	sw	t1,16(t0)
+80000698:	00008067          	ret
 
-800006a0 <queue_enqueue>:
-800006a0:	00050293          	mv	t0,a0
-800006a4:	0082a303          	lw	t1,8(t0)
-800006a8:	00130313          	addi	t1,t1,1
-800006ac:	0062a423          	sw	t1,8(t0)
-800006b0:	01428313          	addi	t1,t0,20
-800006b4:	0042ae83          	lw	t4,4(t0)
-800006b8:	005e9393          	slli	t2,t4,0x5
-800006bc:	00730333          	add	t1,t1,t2
-800006c0:	0005ae03          	lw	t3,0(a1)
-800006c4:	01c32023          	sw	t3,0(t1)
-800006c8:	0045ae03          	lw	t3,4(a1)
-800006cc:	01c32223          	sw	t3,4(t1)
-800006d0:	0085ae03          	lw	t3,8(a1)
-800006d4:	01c32423          	sw	t3,8(t1)
-800006d8:	00c5ae03          	lw	t3,12(a1)
-800006dc:	01c32623          	sw	t3,12(t1)
-800006e0:	0105ae03          	lw	t3,16(a1)
-800006e4:	01c32823          	sw	t3,16(t1)
-800006e8:	0145ae03          	lw	t3,20(a1)
-800006ec:	01c32a23          	sw	t3,20(t1)
-800006f0:	001e8e93          	addi	t4,t4,1
-800006f4:	03200f13          	li	t5,50
-800006f8:	01ee9463          	bne	t4,t5,80000700 <ec>
-800006fc:	00000e93          	li	t4,0
+8000069c <queue_enqueue>:
+8000069c:	00050293          	mv	t0,a0
+800006a0:	0082a303          	lw	t1,8(t0)
+800006a4:	00130313          	addi	t1,t1,1
+800006a8:	0062a423          	sw	t1,8(t0)
+800006ac:	01428313          	addi	t1,t0,20
+800006b0:	0042ae83          	lw	t4,4(t0)
+800006b4:	005e9393          	slli	t2,t4,0x5
+800006b8:	00730333          	add	t1,t1,t2
+800006bc:	0005ae03          	lw	t3,0(a1)
+800006c0:	01c32023          	sw	t3,0(t1)
+800006c4:	0045ae03          	lw	t3,4(a1)
+800006c8:	01c32223          	sw	t3,4(t1)
+800006cc:	0085ae03          	lw	t3,8(a1)
+800006d0:	01c32423          	sw	t3,8(t1)
+800006d4:	00c5ae03          	lw	t3,12(a1)
+800006d8:	01c32623          	sw	t3,12(t1)
+800006dc:	0105ae03          	lw	t3,16(a1)
+800006e0:	01c32823          	sw	t3,16(t1)
+800006e4:	0145ae03          	lw	t3,20(a1)
+800006e8:	01c32a23          	sw	t3,20(t1)
+800006ec:	001e8e93          	addi	t4,t4,1
+800006f0:	03200f13          	li	t5,50
+800006f4:	01ee9463          	bne	t4,t5,800006fc <ec>
+800006f8:	00000e93          	li	t4,0
 
-80000700 <ec>:
-80000700:	01d2a223          	sw	t4,4(t0)
-80000704:	00008067          	ret
+800006fc <ec>:
+800006fc:	01d2a223          	sw	t4,4(t0)
+80000700:	00008067          	ret
 
-80000708 <queue_dequeue>:
-80000708:	00050293          	mv	t0,a0
-8000070c:	0082a303          	lw	t1,8(t0)
+80000704 <queue_dequeue>:
+80000704:	00050293          	mv	t0,a0
+80000708:	0082a303          	lw	t1,8(t0)
+8000070c:	00000013          	nop
 80000710:	00000013          	nop
 80000714:	00000013          	nop
 80000718:	00000013          	nop
 8000071c:	00000013          	nop
 80000720:	00000013          	nop
-80000724:	00000013          	nop
-80000728:	fff30313          	addi	t1,t1,-1
-8000072c:	0062a423          	sw	t1,8(t0)
-80000730:	01428313          	addi	t1,t0,20
-80000734:	0002ae83          	lw	t4,0(t0)
-80000738:	03200f93          	li	t6,50
-8000073c:	000e8f13          	mv	t5,t4
-80000740:	001f0f13          	addi	t5,t5,1
-80000744:	01ff1463          	bne	t5,t6,8000074c <dc>
-80000748:	00000f13          	li	t5,0
+80000724:	fff30313          	addi	t1,t1,-1
+80000728:	0062a423          	sw	t1,8(t0)
+8000072c:	01428313          	addi	t1,t0,20
+80000730:	0002ae83          	lw	t4,0(t0)
+80000734:	03200f93          	li	t6,50
+80000738:	000e8f13          	mv	t5,t4
+8000073c:	001f0f13          	addi	t5,t5,1
+80000740:	01ff1463          	bne	t5,t6,80000748 <dc>
+80000744:	00000f13          	li	t5,0
 
-8000074c <dc>:
-8000074c:	01e2a023          	sw	t5,0(t0)
-80000750:	005e9393          	slli	t2,t4,0x5
-80000754:	00730333          	add	t1,t1,t2
-80000758:	00032e03          	lw	t3,0(t1)
-8000075c:	01c5a023          	sw	t3,0(a1)
-80000760:	00432e03          	lw	t3,4(t1)
-80000764:	01c5a223          	sw	t3,4(a1)
-80000768:	00832e03          	lw	t3,8(t1)
-8000076c:	01c5a423          	sw	t3,8(a1)
-80000770:	00c32e03          	lw	t3,12(t1)
-80000774:	01c5a623          	sw	t3,12(a1)
-80000778:	01032e03          	lw	t3,16(t1)
-8000077c:	01c5a823          	sw	t3,16(a1)
-80000780:	01432e03          	lw	t3,20(t1)
-80000784:	01c5aa23          	sw	t3,20(a1)
-80000788:	00008067          	ret
+80000748 <dc>:
+80000748:	01e2a023          	sw	t5,0(t0)
+8000074c:	005e9393          	slli	t2,t4,0x5
+80000750:	00730333          	add	t1,t1,t2
+80000754:	00032e03          	lw	t3,0(t1)
+80000758:	01c5a023          	sw	t3,0(a1)
+8000075c:	00432e03          	lw	t3,4(t1)
+80000760:	01c5a223          	sw	t3,4(a1)
+80000764:	00832e03          	lw	t3,8(t1)
+80000768:	01c5a423          	sw	t3,8(a1)
+8000076c:	00c32e03          	lw	t3,12(t1)
+80000770:	01c5a623          	sw	t3,12(a1)
+80000774:	01032e03          	lw	t3,16(t1)
+80000778:	01c5a823          	sw	t3,16(a1)
+8000077c:	01432e03          	lw	t3,20(t1)
+80000780:	01c5aa23          	sw	t3,20(a1)
+80000784:	00008067          	ret
 
-8000078c <queue_isFull>:
-8000078c:	00050293          	mv	t0,a0
-80000790:	0082a303          	lw	t1,8(t0)
-80000794:	00000513          	li	a0,0
-80000798:	03200e13          	li	t3,50
-8000079c:	006e1463          	bne	t3,t1,800007a4 <qf>
-800007a0:	00150513          	addi	a0,a0,1
+80000788 <queue_isFull>:
+80000788:	00050293          	mv	t0,a0
+8000078c:	0082a303          	lw	t1,8(t0)
+80000790:	00000513          	li	a0,0
+80000794:	03200e13          	li	t3,50
+80000798:	006e1463          	bne	t3,t1,800007a0 <qf>
+8000079c:	00150513          	addi	a0,a0,1
 
-800007a4 <qf>:
-800007a4:	00008067          	ret
+800007a0 <qf>:
+800007a0:	00008067          	ret
 
-800007a8 <queue_isEmpty>:
-800007a8:	00050293          	mv	t0,a0
-800007ac:	0082a303          	lw	t1,8(t0)
-800007b0:	00000513          	li	a0,0
-800007b4:	00000e13          	li	t3,0
-800007b8:	006e1463          	bne	t3,t1,800007c0 <qe>
-800007bc:	00150513          	addi	a0,a0,1
+800007a4 <queue_isEmpty>:
+800007a4:	00050293          	mv	t0,a0
+800007a8:	0082a303          	lw	t1,8(t0)
+800007ac:	00000513          	li	a0,0
+800007b0:	00000e13          	li	t3,0
+800007b4:	006e1463          	bne	t3,t1,800007bc <qe>
+800007b8:	00150513          	addi	a0,a0,1
 
-800007c0 <qe>:
-800007c0:	00008067          	ret
+800007bc <qe>:
+800007bc:	00008067          	ret
 
-800007c4 <queue_availableWarps>:
-800007c4:	00050293          	mv	t0,a0
-800007c8:	00c2a303          	lw	t1,12(t0)
-800007cc:	0102a383          	lw	t2,16(t0)
-800007d0:	0063b533          	sltu	a0,t2,t1
-800007d4:	00008067          	ret
+800007c0 <queue_availableWarps>:
+800007c0:	00050293          	mv	t0,a0
+800007c4:	00c2a303          	lw	t1,12(t0)
+800007c8:	0102a383          	lw	t2,16(t0)
+800007cc:	0063b533          	sltu	a0,t2,t1
+800007d0:	00008067          	ret
 
-800007d8 <vx_print_str>:
-800007d8:	ff410113          	addi	sp,sp,-12
-800007dc:	00112023          	sw	ra,0(sp)
-800007e0:	00b12223          	sw	a1,4(sp)
+800007d4 <vx_print_str>:
+800007d4:	ff410113          	addi	sp,sp,-12
+800007d8:	00112023          	sw	ra,0(sp)
+800007dc:	00b12223          	sw	a1,4(sp)
 
-800007e4 <bl>:
-800007e4:	00054583          	lbu	a1,0(a0)
-800007e8:	00058863          	beqz	a1,800007f8 <be>
-800007ec:	01c000ef          	jal	ra,80000808 <vx_printc>
-800007f0:	00150513          	addi	a0,a0,1
-800007f4:	ff1ff06f          	j	800007e4 <bl>
+800007e0 <bl>:
+800007e0:	00054583          	lbu	a1,0(a0)
+800007e4:	00058863          	beqz	a1,800007f4 <be>
+800007e8:	01c000ef          	jal	ra,80000804 <vx_printc>
+800007ec:	00150513          	addi	a0,a0,1
+800007f0:	ff1ff06f          	j	800007e0 <bl>
 
-800007f8 <be>:
-800007f8:	00012083          	lw	ra,0(sp)
-800007fc:	00412583          	lw	a1,4(sp)
-80000800:	00c10113          	addi	sp,sp,12
-80000804:	00008067          	ret
+800007f4 <be>:
+800007f4:	00012083          	lw	ra,0(sp)
+800007f8:	00412583          	lw	a1,4(sp)
+800007fc:	00c10113          	addi	sp,sp,12
+80000800:	00008067          	ret
 
-80000808 <vx_printc>:
-80000808:	000108b7          	lui	a7,0x10
-8000080c:	00b8a023          	sw	a1,0(a7) # 10000 <SIZE+0xffce>
-80000810:	00008067          	ret
+80000804 <vx_printc>:
+80000804:	000108b7          	lui	a7,0x10
+80000808:	00b8a023          	sw	a1,0(a7) # 10000 <SIZE+0xffce>
+8000080c:	00008067          	ret
 
-80000814 <vx_print_hex>:
-80000814:	fd010113          	addi	sp,sp,-48
-80000818:	02112623          	sw	ra,44(sp)
-8000081c:	02812423          	sw	s0,40(sp)
-80000820:	03010413          	addi	s0,sp,48
-80000824:	fca42e23          	sw	a0,-36(s0)
-80000828:	fdc42703          	lw	a4,-36(s0)
-8000082c:	00f00793          	li	a5,15
-80000830:	02e7e463          	bltu	a5,a4,80000858 <vx_print_hex+0x44>
-80000834:	810007b7          	lui	a5,0x81000
-80000838:	fdc42703          	lw	a4,-36(s0)
-8000083c:	00271713          	slli	a4,a4,0x2
-80000840:	1a878793          	addi	a5,a5,424 # 810001a8 <barrier_bool+0xfffd6ee4>
-80000844:	00f707b3          	add	a5,a4,a5
-80000848:	0007a783          	lw	a5,0(a5)
-8000084c:	00078513          	mv	a0,a5
-80000850:	f89ff0ef          	jal	ra,800007d8 <vx_print_str>
-80000854:	0740006f          	j	800008c8 <vx_print_hex+0xb4>
-80000858:	02000793          	li	a5,32
-8000085c:	fef42623          	sw	a5,-20(s0)
-80000860:	fe0405a3          	sb	zero,-21(s0)
-80000864:	fec42783          	lw	a5,-20(s0)
-80000868:	ffc78793          	addi	a5,a5,-4
-8000086c:	fdc42703          	lw	a4,-36(s0)
-80000870:	00f757b3          	srl	a5,a4,a5
-80000874:	00f7f793          	andi	a5,a5,15
-80000878:	fef42223          	sw	a5,-28(s0)
-8000087c:	fe442783          	lw	a5,-28(s0)
-80000880:	00078663          	beqz	a5,8000088c <vx_print_hex+0x78>
-80000884:	00100793          	li	a5,1
-80000888:	fef405a3          	sb	a5,-21(s0)
-8000088c:	feb44783          	lbu	a5,-21(s0)
-80000890:	02078263          	beqz	a5,800008b4 <vx_print_hex+0xa0>
-80000894:	810007b7          	lui	a5,0x81000
-80000898:	fe442703          	lw	a4,-28(s0)
-8000089c:	00271713          	slli	a4,a4,0x2
-800008a0:	1a878793          	addi	a5,a5,424 # 810001a8 <barrier_bool+0xfffd6ee4>
-800008a4:	00f707b3          	add	a5,a4,a5
-800008a8:	0007a783          	lw	a5,0(a5)
-800008ac:	00078513          	mv	a0,a5
-800008b0:	f29ff0ef          	jal	ra,800007d8 <vx_print_str>
-800008b4:	fec42783          	lw	a5,-20(s0)
-800008b8:	ffc78793          	addi	a5,a5,-4
-800008bc:	fef42623          	sw	a5,-20(s0)
-800008c0:	fec42783          	lw	a5,-20(s0)
-800008c4:	faf040e3          	bgtz	a5,80000864 <vx_print_hex+0x50>
-800008c8:	02c12083          	lw	ra,44(sp)
-800008cc:	02812403          	lw	s0,40(sp)
-800008d0:	03010113          	addi	sp,sp,48
-800008d4:	00008067          	ret
+80000810 <vx_print_hex>:
+80000810:	fd010113          	addi	sp,sp,-48
+80000814:	02112623          	sw	ra,44(sp)
+80000818:	02812423          	sw	s0,40(sp)
+8000081c:	03010413          	addi	s0,sp,48
+80000820:	fca42e23          	sw	a0,-36(s0)
+80000824:	fdc42703          	lw	a4,-36(s0)
+80000828:	00f00793          	li	a5,15
+8000082c:	02e7e463          	bltu	a5,a4,80000854 <vx_print_hex+0x44>
+80000830:	810007b7          	lui	a5,0x81000
+80000834:	fdc42703          	lw	a4,-36(s0)
+80000838:	00271713          	slli	a4,a4,0x2
+8000083c:	1a878793          	addi	a5,a5,424 # 810001a8 <barrier_bool+0xfffd6ee4>
+80000840:	00f707b3          	add	a5,a4,a5
+80000844:	0007a783          	lw	a5,0(a5)
+80000848:	00078513          	mv	a0,a5
+8000084c:	f89ff0ef          	jal	ra,800007d4 <vx_print_str>
+80000850:	0740006f          	j	800008c4 <vx_print_hex+0xb4>
+80000854:	02000793          	li	a5,32
+80000858:	fef42623          	sw	a5,-20(s0)
+8000085c:	fe0405a3          	sb	zero,-21(s0)
+80000860:	fec42783          	lw	a5,-20(s0)
+80000864:	ffc78793          	addi	a5,a5,-4
+80000868:	fdc42703          	lw	a4,-36(s0)
+8000086c:	00f757b3          	srl	a5,a4,a5
+80000870:	00f7f793          	andi	a5,a5,15
+80000874:	fef42223          	sw	a5,-28(s0)
+80000878:	fe442783          	lw	a5,-28(s0)
+8000087c:	00078663          	beqz	a5,80000888 <vx_print_hex+0x78>
+80000880:	00100793          	li	a5,1
+80000884:	fef405a3          	sb	a5,-21(s0)
+80000888:	feb44783          	lbu	a5,-21(s0)
+8000088c:	02078263          	beqz	a5,800008b0 <vx_print_hex+0xa0>
+80000890:	810007b7          	lui	a5,0x81000
+80000894:	fe442703          	lw	a4,-28(s0)
+80000898:	00271713          	slli	a4,a4,0x2
+8000089c:	1a878793          	addi	a5,a5,424 # 810001a8 <barrier_bool+0xfffd6ee4>
+800008a0:	00f707b3          	add	a5,a4,a5
+800008a4:	0007a783          	lw	a5,0(a5)
+800008a8:	00078513          	mv	a0,a5
+800008ac:	f29ff0ef          	jal	ra,800007d4 <vx_print_str>
+800008b0:	fec42783          	lw	a5,-20(s0)
+800008b4:	ffc78793          	addi	a5,a5,-4
+800008b8:	fef42623          	sw	a5,-20(s0)
+800008bc:	fec42783          	lw	a5,-20(s0)
+800008c0:	faf040e3          	bgtz	a5,80000860 <vx_print_hex+0x50>
+800008c4:	02c12083          	lw	ra,44(sp)
+800008c8:	02812403          	lw	s0,40(sp)
+800008cc:	03010113          	addi	sp,sp,48
+800008d0:	00008067          	ret
 
-800008d8 <vx_printf>:
-800008d8:	fe010113          	addi	sp,sp,-32
-800008dc:	00112e23          	sw	ra,28(sp)
-800008e0:	00812c23          	sw	s0,24(sp)
-800008e4:	02010413          	addi	s0,sp,32
-800008e8:	fea42623          	sw	a0,-20(s0)
-800008ec:	feb42423          	sw	a1,-24(s0)
-800008f0:	fec42503          	lw	a0,-20(s0)
-800008f4:	ee5ff0ef          	jal	ra,800007d8 <vx_print_str>
-800008f8:	fe842503          	lw	a0,-24(s0)
-800008fc:	f19ff0ef          	jal	ra,80000814 <vx_print_hex>
-80000900:	810007b7          	lui	a5,0x81000
-80000904:	09478513          	addi	a0,a5,148 # 81000094 <barrier_bool+0xfffd6dd0>
-80000908:	ed1ff0ef          	jal	ra,800007d8 <vx_print_str>
-8000090c:	00000013          	nop
-80000910:	01c12083          	lw	ra,28(sp)
-80000914:	01812403          	lw	s0,24(sp)
-80000918:	02010113          	addi	sp,sp,32
-8000091c:	00008067          	ret
+800008d4 <vx_printf>:
+800008d4:	fe010113          	addi	sp,sp,-32
+800008d8:	00112e23          	sw	ra,28(sp)
+800008dc:	00812c23          	sw	s0,24(sp)
+800008e0:	02010413          	addi	s0,sp,32
+800008e4:	fea42623          	sw	a0,-20(s0)
+800008e8:	feb42423          	sw	a1,-24(s0)
+800008ec:	fec42503          	lw	a0,-20(s0)
+800008f0:	ee5ff0ef          	jal	ra,800007d4 <vx_print_str>
+800008f4:	fe842503          	lw	a0,-24(s0)
+800008f8:	f19ff0ef          	jal	ra,80000810 <vx_print_hex>
+800008fc:	810007b7          	lui	a5,0x81000
+80000900:	09478513          	addi	a0,a5,148 # 81000094 <barrier_bool+0xfffd6dd0>
+80000904:	ed1ff0ef          	jal	ra,800007d4 <vx_print_str>
+80000908:	00000013          	nop
+8000090c:	01c12083          	lw	ra,28(sp)
+80000910:	01812403          	lw	s0,24(sp)
+80000914:	02010113          	addi	sp,sp,32
+80000918:	00008067          	ret
 
-80000920 <vx_sq_mat_mult>:
-80000920:	fd010113          	addi	sp,sp,-48
-80000924:	02112623          	sw	ra,44(sp)
-80000928:	02812423          	sw	s0,40(sp)
-8000092c:	03010413          	addi	s0,sp,48
-80000930:	fca42e23          	sw	a0,-36(s0)
-80000934:	fcb42c23          	sw	a1,-40(s0)
-80000938:	fcc42a23          	sw	a2,-44(s0)
-8000093c:	fcd42823          	sw	a3,-48(s0)
-80000940:	810267b7          	lui	a5,0x81026
-80000944:	fdc42703          	lw	a4,-36(s0)
-80000948:	1ae7ac23          	sw	a4,440(a5) # 810261b8 <barrier_bool+0xffffcef4>
-8000094c:	810267b7          	lui	a5,0x81026
-80000950:	1b878793          	addi	a5,a5,440 # 810261b8 <barrier_bool+0xffffcef4>
-80000954:	fd842703          	lw	a4,-40(s0)
-80000958:	00e7a223          	sw	a4,4(a5)
-8000095c:	810267b7          	lui	a5,0x81026
-80000960:	1b878793          	addi	a5,a5,440 # 810261b8 <barrier_bool+0xffffcef4>
-80000964:	fd442703          	lw	a4,-44(s0)
-80000968:	00e7a423          	sw	a4,8(a5)
-8000096c:	810267b7          	lui	a5,0x81026
-80000970:	1b878793          	addi	a5,a5,440 # 810261b8 <barrier_bool+0xffffcef4>
-80000974:	fd042703          	lw	a4,-48(s0)
-80000978:	00e7a623          	sw	a4,12(a5)
-8000097c:	881ff0ef          	jal	ra,800001fc <vx_available_threads>
-80000980:	fea42423          	sw	a0,-24(s0)
-80000984:	fd042703          	lw	a4,-48(s0)
-80000988:	fe842783          	lw	a5,-24(s0)
-8000098c:	02f757b3          	divu	a5,a4,a5
-80000990:	fef42623          	sw	a5,-20(s0)
-80000994:	fd042703          	lw	a4,-48(s0)
-80000998:	fe842783          	lw	a5,-24(s0)
-8000099c:	02f777b3          	remu	a5,a4,a5
-800009a0:	00078863          	beqz	a5,800009b0 <vx_sq_mat_mult+0x90>
-800009a4:	fec42783          	lw	a5,-20(s0)
-800009a8:	00178793          	addi	a5,a5,1
-800009ac:	fef42623          	sw	a5,-20(s0)
-800009b0:	810267b7          	lui	a5,0x81026
-800009b4:	1b878793          	addi	a5,a5,440 # 810261b8 <barrier_bool+0xffffcef4>
-800009b8:	fec42703          	lw	a4,-20(s0)
-800009bc:	00e7a823          	sw	a4,16(a5)
-800009c0:	fd042703          	lw	a4,-48(s0)
-800009c4:	fe842783          	lw	a5,-24(s0)
-800009c8:	02f76263          	bltu	a4,a5,800009ec <vx_sq_mat_mult+0xcc>
-800009cc:	810267b7          	lui	a5,0x81026
-800009d0:	1b878693          	addi	a3,a5,440 # 810261b8 <barrier_bool+0xffffcef4>
-800009d4:	800017b7          	lui	a5,0x80001
-800009d8:	a4478613          	addi	a2,a5,-1468 # 80000a44 <barrier_bool+0xfefd7780>
-800009dc:	fe842583          	lw	a1,-24(s0)
-800009e0:	fd042503          	lw	a0,-48(s0)
-800009e4:	a91ff0ef          	jal	ra,80000474 <vx_spawnWarps>
-800009e8:	0200006f          	j	80000a08 <vx_sq_mat_mult+0xe8>
-800009ec:	810267b7          	lui	a5,0x81026
-800009f0:	1b878693          	addi	a3,a5,440 # 810261b8 <barrier_bool+0xffffcef4>
-800009f4:	800017b7          	lui	a5,0x80001
-800009f8:	a4478613          	addi	a2,a5,-1468 # 80000a44 <barrier_bool+0xfefd7780>
-800009fc:	fd042583          	lw	a1,-48(s0)
-80000a00:	fd042503          	lw	a0,-48(s0)
-80000a04:	a71ff0ef          	jal	ra,80000474 <vx_spawnWarps>
-80000a08:	fecff0ef          	jal	ra,800001f4 <vx_available_warps>
-80000a0c:	fea42223          	sw	a0,-28(s0)
-80000a10:	fd042703          	lw	a4,-48(s0)
-80000a14:	fe442783          	lw	a5,-28(s0)
-80000a18:	00e7f863          	bgeu	a5,a4,80000a28 <vx_sq_mat_mult+0x108>
-80000a1c:	fe442503          	lw	a0,-28(s0)
-80000a20:	b45ff0ef          	jal	ra,80000564 <vx_wait_for_warps>
-80000a24:	00c0006f          	j	80000a30 <vx_sq_mat_mult+0x110>
-80000a28:	fd042503          	lw	a0,-48(s0)
-80000a2c:	b39ff0ef          	jal	ra,80000564 <vx_wait_for_warps>
-80000a30:	00000013          	nop
-80000a34:	02c12083          	lw	ra,44(sp)
-80000a38:	02812403          	lw	s0,40(sp)
-80000a3c:	03010113          	addi	sp,sp,48
-80000a40:	00008067          	ret
+8000091c <vx_sq_mat_mult>:
+8000091c:	fd010113          	addi	sp,sp,-48
+80000920:	02112623          	sw	ra,44(sp)
+80000924:	02812423          	sw	s0,40(sp)
+80000928:	03010413          	addi	s0,sp,48
+8000092c:	fca42e23          	sw	a0,-36(s0)
+80000930:	fcb42c23          	sw	a1,-40(s0)
+80000934:	fcc42a23          	sw	a2,-44(s0)
+80000938:	fcd42823          	sw	a3,-48(s0)
+8000093c:	810267b7          	lui	a5,0x81026
+80000940:	fdc42703          	lw	a4,-36(s0)
+80000944:	1ae7ac23          	sw	a4,440(a5) # 810261b8 <barrier_bool+0xffffcef4>
+80000948:	810267b7          	lui	a5,0x81026
+8000094c:	1b878793          	addi	a5,a5,440 # 810261b8 <barrier_bool+0xffffcef4>
+80000950:	fd842703          	lw	a4,-40(s0)
+80000954:	00e7a223          	sw	a4,4(a5)
+80000958:	810267b7          	lui	a5,0x81026
+8000095c:	1b878793          	addi	a5,a5,440 # 810261b8 <barrier_bool+0xffffcef4>
+80000960:	fd442703          	lw	a4,-44(s0)
+80000964:	00e7a423          	sw	a4,8(a5)
+80000968:	810267b7          	lui	a5,0x81026
+8000096c:	1b878793          	addi	a5,a5,440 # 810261b8 <barrier_bool+0xffffcef4>
+80000970:	fd042703          	lw	a4,-48(s0)
+80000974:	00e7a623          	sw	a4,12(a5)
+80000978:	881ff0ef          	jal	ra,800001f8 <vx_available_threads>
+8000097c:	fea42423          	sw	a0,-24(s0)
+80000980:	fd042703          	lw	a4,-48(s0)
+80000984:	fe842783          	lw	a5,-24(s0)
+80000988:	02f757b3          	divu	a5,a4,a5
+8000098c:	fef42623          	sw	a5,-20(s0)
+80000990:	fd042703          	lw	a4,-48(s0)
+80000994:	fe842783          	lw	a5,-24(s0)
+80000998:	02f777b3          	remu	a5,a4,a5
+8000099c:	00078863          	beqz	a5,800009ac <vx_sq_mat_mult+0x90>
+800009a0:	fec42783          	lw	a5,-20(s0)
+800009a4:	00178793          	addi	a5,a5,1
+800009a8:	fef42623          	sw	a5,-20(s0)
+800009ac:	810267b7          	lui	a5,0x81026
+800009b0:	1b878793          	addi	a5,a5,440 # 810261b8 <barrier_bool+0xffffcef4>
+800009b4:	fec42703          	lw	a4,-20(s0)
+800009b8:	00e7a823          	sw	a4,16(a5)
+800009bc:	fd042703          	lw	a4,-48(s0)
+800009c0:	fe842783          	lw	a5,-24(s0)
+800009c4:	02f76263          	bltu	a4,a5,800009e8 <vx_sq_mat_mult+0xcc>
+800009c8:	810267b7          	lui	a5,0x81026
+800009cc:	1b878693          	addi	a3,a5,440 # 810261b8 <barrier_bool+0xffffcef4>
+800009d0:	800017b7          	lui	a5,0x80001
+800009d4:	a4078613          	addi	a2,a5,-1472 # 80000a40 <barrier_bool+0xfefd777c>
+800009d8:	fe842583          	lw	a1,-24(s0)
+800009dc:	fd042503          	lw	a0,-48(s0)
+800009e0:	a91ff0ef          	jal	ra,80000470 <vx_spawnWarps>
+800009e4:	0200006f          	j	80000a04 <vx_sq_mat_mult+0xe8>
+800009e8:	810267b7          	lui	a5,0x81026
+800009ec:	1b878693          	addi	a3,a5,440 # 810261b8 <barrier_bool+0xffffcef4>
+800009f0:	800017b7          	lui	a5,0x80001
+800009f4:	a4078613          	addi	a2,a5,-1472 # 80000a40 <barrier_bool+0xfefd777c>
+800009f8:	fd042583          	lw	a1,-48(s0)
+800009fc:	fd042503          	lw	a0,-48(s0)
+80000a00:	a71ff0ef          	jal	ra,80000470 <vx_spawnWarps>
+80000a04:	fecff0ef          	jal	ra,800001f0 <vx_available_warps>
+80000a08:	fea42223          	sw	a0,-28(s0)
+80000a0c:	fd042703          	lw	a4,-48(s0)
+80000a10:	fe442783          	lw	a5,-28(s0)
+80000a14:	00e7f863          	bgeu	a5,a4,80000a24 <vx_sq_mat_mult+0x108>
+80000a18:	fe442503          	lw	a0,-28(s0)
+80000a1c:	b45ff0ef          	jal	ra,80000560 <vx_wait_for_warps>
+80000a20:	00c0006f          	j	80000a2c <vx_sq_mat_mult+0x110>
+80000a24:	fd042503          	lw	a0,-48(s0)
+80000a28:	b39ff0ef          	jal	ra,80000560 <vx_wait_for_warps>
+80000a2c:	00000013          	nop
+80000a30:	02c12083          	lw	ra,44(sp)
+80000a34:	02812403          	lw	s0,40(sp)
+80000a38:	03010113          	addi	sp,sp,48
+80000a3c:	00008067          	ret
 
-80000a44 <_vx_mat_mult>:
-80000a44:	fa010113          	addi	sp,sp,-96
-80000a48:	04112e23          	sw	ra,92(sp)
-80000a4c:	04812c23          	sw	s0,88(sp)
-80000a50:	06010413          	addi	s0,sp,96
-80000a54:	faa42623          	sw	a0,-84(s0)
-80000a58:	fab42423          	sw	a1,-88(s0)
-80000a5c:	bf9ff0ef          	jal	ra,80000654 <vx_get_arg_struct>
-80000a60:	fca42c23          	sw	a0,-40(s0)
-80000a64:	fd842783          	lw	a5,-40(s0)
-80000a68:	0007a783          	lw	a5,0(a5)
-80000a6c:	fcf42a23          	sw	a5,-44(s0)
-80000a70:	fd842783          	lw	a5,-40(s0)
-80000a74:	0047a783          	lw	a5,4(a5)
-80000a78:	fcf42823          	sw	a5,-48(s0)
-80000a7c:	fd842783          	lw	a5,-40(s0)
-80000a80:	0087a783          	lw	a5,8(a5)
-80000a84:	fcf42623          	sw	a5,-52(s0)
-80000a88:	fd842783          	lw	a5,-40(s0)
-80000a8c:	0107a783          	lw	a5,16(a5)
-80000a90:	fef42623          	sw	a5,-20(s0)
-80000a94:	fec42703          	lw	a4,-20(s0)
-80000a98:	fac42783          	lw	a5,-84(s0)
-80000a9c:	02f707b3          	mul	a5,a4,a5
-80000aa0:	fef42423          	sw	a5,-24(s0)
-80000aa4:	fec42783          	lw	a5,-20(s0)
-80000aa8:	00079a63          	bnez	a5,80000abc <_vx_mat_mult+0x78>
-80000aac:	00100793          	li	a5,1
-80000ab0:	fef42623          	sw	a5,-20(s0)
-80000ab4:	fac42783          	lw	a5,-84(s0)
-80000ab8:	fef42423          	sw	a5,-24(s0)
-80000abc:	fd842783          	lw	a5,-40(s0)
-80000ac0:	00c7a783          	lw	a5,12(a5)
-80000ac4:	fcf42423          	sw	a5,-56(s0)
-80000ac8:	fe042223          	sw	zero,-28(s0)
-80000acc:	0d80006f          	j	80000ba4 <_vx_mat_mult+0x160>
-80000ad0:	fe042023          	sw	zero,-32(s0)
-80000ad4:	fc042e23          	sw	zero,-36(s0)
-80000ad8:	0780006f          	j	80000b50 <_vx_mat_mult+0x10c>
-80000adc:	fa842703          	lw	a4,-88(s0)
-80000ae0:	fc842783          	lw	a5,-56(s0)
-80000ae4:	02f707b3          	mul	a5,a4,a5
-80000ae8:	fdc42703          	lw	a4,-36(s0)
-80000aec:	00f707b3          	add	a5,a4,a5
-80000af0:	fcf42223          	sw	a5,-60(s0)
-80000af4:	fc842703          	lw	a4,-56(s0)
-80000af8:	fdc42783          	lw	a5,-36(s0)
-80000afc:	02f707b3          	mul	a5,a4,a5
-80000b00:	fe842703          	lw	a4,-24(s0)
-80000b04:	00f707b3          	add	a5,a4,a5
-80000b08:	fcf42023          	sw	a5,-64(s0)
-80000b0c:	fc442783          	lw	a5,-60(s0)
-80000b10:	00279793          	slli	a5,a5,0x2
-80000b14:	fd442703          	lw	a4,-44(s0)
-80000b18:	00f707b3          	add	a5,a4,a5
-80000b1c:	0007a703          	lw	a4,0(a5)
-80000b20:	fc042783          	lw	a5,-64(s0)
-80000b24:	00279793          	slli	a5,a5,0x2
-80000b28:	fd042683          	lw	a3,-48(s0)
-80000b2c:	00f687b3          	add	a5,a3,a5
-80000b30:	0007a783          	lw	a5,0(a5)
-80000b34:	02f707b3          	mul	a5,a4,a5
-80000b38:	fe042703          	lw	a4,-32(s0)
-80000b3c:	00f707b3          	add	a5,a4,a5
-80000b40:	fef42023          	sw	a5,-32(s0)
-80000b44:	fdc42783          	lw	a5,-36(s0)
-80000b48:	00178793          	addi	a5,a5,1
-80000b4c:	fcf42e23          	sw	a5,-36(s0)
-80000b50:	fdc42703          	lw	a4,-36(s0)
-80000b54:	fc842783          	lw	a5,-56(s0)
-80000b58:	f8f762e3          	bltu	a4,a5,80000adc <_vx_mat_mult+0x98>
-80000b5c:	fa842703          	lw	a4,-88(s0)
-80000b60:	fc842783          	lw	a5,-56(s0)
-80000b64:	02f70733          	mul	a4,a4,a5
-80000b68:	fe842783          	lw	a5,-24(s0)
-80000b6c:	00f707b3          	add	a5,a4,a5
-80000b70:	faf42e23          	sw	a5,-68(s0)
-80000b74:	fbc42783          	lw	a5,-68(s0)
-80000b78:	00279793          	slli	a5,a5,0x2
-80000b7c:	fcc42703          	lw	a4,-52(s0)
-80000b80:	00f707b3          	add	a5,a4,a5
-80000b84:	fe042703          	lw	a4,-32(s0)
-80000b88:	00e7a023          	sw	a4,0(a5)
-80000b8c:	fe842783          	lw	a5,-24(s0)
-80000b90:	00178793          	addi	a5,a5,1
-80000b94:	fef42423          	sw	a5,-24(s0)
-80000b98:	fe442783          	lw	a5,-28(s0)
-80000b9c:	00178793          	addi	a5,a5,1
-80000ba0:	fef42223          	sw	a5,-28(s0)
-80000ba4:	fe442783          	lw	a5,-28(s0)
-80000ba8:	fec42703          	lw	a4,-20(s0)
-80000bac:	f2e7e2e3          	bltu	a5,a4,80000ad0 <_vx_mat_mult+0x8c>
-80000bb0:	00000013          	nop
-80000bb4:	05c12083          	lw	ra,92(sp)
-80000bb8:	05812403          	lw	s0,88(sp)
-80000bbc:	06010113          	addi	sp,sp,96
-80000bc0:	00008067          	ret
+80000a40 <_vx_mat_mult>:
+80000a40:	fa010113          	addi	sp,sp,-96
+80000a44:	04112e23          	sw	ra,92(sp)
+80000a48:	04812c23          	sw	s0,88(sp)
+80000a4c:	06010413          	addi	s0,sp,96
+80000a50:	faa42623          	sw	a0,-84(s0)
+80000a54:	fab42423          	sw	a1,-88(s0)
+80000a58:	bf9ff0ef          	jal	ra,80000650 <vx_get_arg_struct>
+80000a5c:	fca42c23          	sw	a0,-40(s0)
+80000a60:	fd842783          	lw	a5,-40(s0)
+80000a64:	0007a783          	lw	a5,0(a5)
+80000a68:	fcf42a23          	sw	a5,-44(s0)
+80000a6c:	fd842783          	lw	a5,-40(s0)
+80000a70:	0047a783          	lw	a5,4(a5)
+80000a74:	fcf42823          	sw	a5,-48(s0)
+80000a78:	fd842783          	lw	a5,-40(s0)
+80000a7c:	0087a783          	lw	a5,8(a5)
+80000a80:	fcf42623          	sw	a5,-52(s0)
+80000a84:	fd842783          	lw	a5,-40(s0)
+80000a88:	0107a783          	lw	a5,16(a5)
+80000a8c:	fef42623          	sw	a5,-20(s0)
+80000a90:	fec42703          	lw	a4,-20(s0)
+80000a94:	fac42783          	lw	a5,-84(s0)
+80000a98:	02f707b3          	mul	a5,a4,a5
+80000a9c:	fef42423          	sw	a5,-24(s0)
+80000aa0:	fec42783          	lw	a5,-20(s0)
+80000aa4:	00079a63          	bnez	a5,80000ab8 <_vx_mat_mult+0x78>
+80000aa8:	00100793          	li	a5,1
+80000aac:	fef42623          	sw	a5,-20(s0)
+80000ab0:	fac42783          	lw	a5,-84(s0)
+80000ab4:	fef42423          	sw	a5,-24(s0)
+80000ab8:	fd842783          	lw	a5,-40(s0)
+80000abc:	00c7a783          	lw	a5,12(a5)
+80000ac0:	fcf42423          	sw	a5,-56(s0)
+80000ac4:	fe042223          	sw	zero,-28(s0)
+80000ac8:	0d80006f          	j	80000ba0 <_vx_mat_mult+0x160>
+80000acc:	fe042023          	sw	zero,-32(s0)
+80000ad0:	fc042e23          	sw	zero,-36(s0)
+80000ad4:	0780006f          	j	80000b4c <_vx_mat_mult+0x10c>
+80000ad8:	fa842703          	lw	a4,-88(s0)
+80000adc:	fc842783          	lw	a5,-56(s0)
+80000ae0:	02f707b3          	mul	a5,a4,a5
+80000ae4:	fdc42703          	lw	a4,-36(s0)
+80000ae8:	00f707b3          	add	a5,a4,a5
+80000aec:	fcf42223          	sw	a5,-60(s0)
+80000af0:	fc842703          	lw	a4,-56(s0)
+80000af4:	fdc42783          	lw	a5,-36(s0)
+80000af8:	02f707b3          	mul	a5,a4,a5
+80000afc:	fe842703          	lw	a4,-24(s0)
+80000b00:	00f707b3          	add	a5,a4,a5
+80000b04:	fcf42023          	sw	a5,-64(s0)
+80000b08:	fc442783          	lw	a5,-60(s0)
+80000b0c:	00279793          	slli	a5,a5,0x2
+80000b10:	fd442703          	lw	a4,-44(s0)
+80000b14:	00f707b3          	add	a5,a4,a5
+80000b18:	0007a703          	lw	a4,0(a5)
+80000b1c:	fc042783          	lw	a5,-64(s0)
+80000b20:	00279793          	slli	a5,a5,0x2
+80000b24:	fd042683          	lw	a3,-48(s0)
+80000b28:	00f687b3          	add	a5,a3,a5
+80000b2c:	0007a783          	lw	a5,0(a5)
+80000b30:	02f707b3          	mul	a5,a4,a5
+80000b34:	fe042703          	lw	a4,-32(s0)
+80000b38:	00f707b3          	add	a5,a4,a5
+80000b3c:	fef42023          	sw	a5,-32(s0)
+80000b40:	fdc42783          	lw	a5,-36(s0)
+80000b44:	00178793          	addi	a5,a5,1
+80000b48:	fcf42e23          	sw	a5,-36(s0)
+80000b4c:	fdc42703          	lw	a4,-36(s0)
+80000b50:	fc842783          	lw	a5,-56(s0)
+80000b54:	f8f762e3          	bltu	a4,a5,80000ad8 <_vx_mat_mult+0x98>
+80000b58:	fa842703          	lw	a4,-88(s0)
+80000b5c:	fc842783          	lw	a5,-56(s0)
+80000b60:	02f70733          	mul	a4,a4,a5
+80000b64:	fe842783          	lw	a5,-24(s0)
+80000b68:	00f707b3          	add	a5,a4,a5
+80000b6c:	faf42e23          	sw	a5,-68(s0)
+80000b70:	fbc42783          	lw	a5,-68(s0)
+80000b74:	00279793          	slli	a5,a5,0x2
+80000b78:	fcc42703          	lw	a4,-52(s0)
+80000b7c:	00f707b3          	add	a5,a4,a5
+80000b80:	fe042703          	lw	a4,-32(s0)
+80000b84:	00e7a023          	sw	a4,0(a5)
+80000b88:	fe842783          	lw	a5,-24(s0)
+80000b8c:	00178793          	addi	a5,a5,1
+80000b90:	fef42423          	sw	a5,-24(s0)
+80000b94:	fe442783          	lw	a5,-28(s0)
+80000b98:	00178793          	addi	a5,a5,1
+80000b9c:	fef42223          	sw	a5,-28(s0)
+80000ba0:	fe442783          	lw	a5,-28(s0)
+80000ba4:	fec42703          	lw	a4,-20(s0)
+80000ba8:	f2e7e2e3          	bltu	a5,a4,80000acc <_vx_mat_mult+0x8c>
+80000bac:	00000013          	nop
+80000bb0:	05c12083          	lw	ra,92(sp)
+80000bb4:	05812403          	lw	s0,88(sp)
+80000bb8:	06010113          	addi	sp,sp,96
+80000bbc:	00008067          	ret
 
-80000bc4 <vx_mat_add>:
-80000bc4:	fc010113          	addi	sp,sp,-64
-80000bc8:	02112e23          	sw	ra,60(sp)
-80000bcc:	02812c23          	sw	s0,56(sp)
-80000bd0:	04010413          	addi	s0,sp,64
-80000bd4:	fca42e23          	sw	a0,-36(s0)
-80000bd8:	fcb42c23          	sw	a1,-40(s0)
-80000bdc:	fcc42a23          	sw	a2,-44(s0)
-80000be0:	fcd42823          	sw	a3,-48(s0)
-80000be4:	fce42623          	sw	a4,-52(s0)
-80000be8:	810267b7          	lui	a5,0x81026
-80000bec:	fdc42703          	lw	a4,-36(s0)
-80000bf0:	1ce7a623          	sw	a4,460(a5) # 810261cc <barrier_bool+0xffffcf08>
-80000bf4:	810267b7          	lui	a5,0x81026
-80000bf8:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000bfc:	fd842703          	lw	a4,-40(s0)
-80000c00:	00e7a223          	sw	a4,4(a5)
-80000c04:	810267b7          	lui	a5,0x81026
-80000c08:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000c0c:	fd442703          	lw	a4,-44(s0)
-80000c10:	00e7a423          	sw	a4,8(a5)
-80000c14:	810267b7          	lui	a5,0x81026
-80000c18:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000c1c:	fcc42703          	lw	a4,-52(s0)
-80000c20:	00e7a623          	sw	a4,12(a5)
-80000c24:	810267b7          	lui	a5,0x81026
-80000c28:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000c2c:	fd042703          	lw	a4,-48(s0)
-80000c30:	00e7a823          	sw	a4,16(a5)
-80000c34:	dc8ff0ef          	jal	ra,800001fc <vx_available_threads>
-80000c38:	fea42423          	sw	a0,-24(s0)
-80000c3c:	fcc42703          	lw	a4,-52(s0)
-80000c40:	fe842783          	lw	a5,-24(s0)
-80000c44:	02f757b3          	divu	a5,a4,a5
-80000c48:	fef42623          	sw	a5,-20(s0)
-80000c4c:	fcc42703          	lw	a4,-52(s0)
-80000c50:	fe842783          	lw	a5,-24(s0)
-80000c54:	02f777b3          	remu	a5,a4,a5
-80000c58:	00078863          	beqz	a5,80000c68 <vx_mat_add+0xa4>
-80000c5c:	fec42783          	lw	a5,-20(s0)
-80000c60:	00178793          	addi	a5,a5,1
-80000c64:	fef42623          	sw	a5,-20(s0)
-80000c68:	810267b7          	lui	a5,0x81026
-80000c6c:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000c70:	fec42703          	lw	a4,-20(s0)
-80000c74:	00e7aa23          	sw	a4,20(a5)
-80000c78:	fcc42703          	lw	a4,-52(s0)
-80000c7c:	fe842783          	lw	a5,-24(s0)
-80000c80:	02f76263          	bltu	a4,a5,80000ca4 <vx_mat_add+0xe0>
-80000c84:	810267b7          	lui	a5,0x81026
-80000c88:	1cc78693          	addi	a3,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000c8c:	800017b7          	lui	a5,0x80001
-80000c90:	cfc78613          	addi	a2,a5,-772 # 80000cfc <barrier_bool+0xfefd7a38>
-80000c94:	fe842583          	lw	a1,-24(s0)
-80000c98:	fd042503          	lw	a0,-48(s0)
-80000c9c:	fd8ff0ef          	jal	ra,80000474 <vx_spawnWarps>
-80000ca0:	0200006f          	j	80000cc0 <vx_mat_add+0xfc>
-80000ca4:	810267b7          	lui	a5,0x81026
-80000ca8:	1cc78693          	addi	a3,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000cac:	800017b7          	lui	a5,0x80001
-80000cb0:	cfc78613          	addi	a2,a5,-772 # 80000cfc <barrier_bool+0xfefd7a38>
-80000cb4:	fcc42583          	lw	a1,-52(s0)
-80000cb8:	fd042503          	lw	a0,-48(s0)
-80000cbc:	fb8ff0ef          	jal	ra,80000474 <vx_spawnWarps>
-80000cc0:	d34ff0ef          	jal	ra,800001f4 <vx_available_warps>
-80000cc4:	fea42223          	sw	a0,-28(s0)
-80000cc8:	fd042703          	lw	a4,-48(s0)
-80000ccc:	fe442783          	lw	a5,-28(s0)
-80000cd0:	00e7f863          	bgeu	a5,a4,80000ce0 <vx_mat_add+0x11c>
-80000cd4:	fe442503          	lw	a0,-28(s0)
-80000cd8:	88dff0ef          	jal	ra,80000564 <vx_wait_for_warps>
-80000cdc:	00c0006f          	j	80000ce8 <vx_mat_add+0x124>
-80000ce0:	fd042503          	lw	a0,-48(s0)
-80000ce4:	881ff0ef          	jal	ra,80000564 <vx_wait_for_warps>
-80000ce8:	00000013          	nop
-80000cec:	03c12083          	lw	ra,60(sp)
-80000cf0:	03812403          	lw	s0,56(sp)
-80000cf4:	04010113          	addi	sp,sp,64
-80000cf8:	00008067          	ret
+80000bc0 <vx_mat_add>:
+80000bc0:	fc010113          	addi	sp,sp,-64
+80000bc4:	02112e23          	sw	ra,60(sp)
+80000bc8:	02812c23          	sw	s0,56(sp)
+80000bcc:	04010413          	addi	s0,sp,64
+80000bd0:	fca42e23          	sw	a0,-36(s0)
+80000bd4:	fcb42c23          	sw	a1,-40(s0)
+80000bd8:	fcc42a23          	sw	a2,-44(s0)
+80000bdc:	fcd42823          	sw	a3,-48(s0)
+80000be0:	fce42623          	sw	a4,-52(s0)
+80000be4:	810267b7          	lui	a5,0x81026
+80000be8:	fdc42703          	lw	a4,-36(s0)
+80000bec:	1ce7a623          	sw	a4,460(a5) # 810261cc <barrier_bool+0xffffcf08>
+80000bf0:	810267b7          	lui	a5,0x81026
+80000bf4:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
+80000bf8:	fd842703          	lw	a4,-40(s0)
+80000bfc:	00e7a223          	sw	a4,4(a5)
+80000c00:	810267b7          	lui	a5,0x81026
+80000c04:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
+80000c08:	fd442703          	lw	a4,-44(s0)
+80000c0c:	00e7a423          	sw	a4,8(a5)
+80000c10:	810267b7          	lui	a5,0x81026
+80000c14:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
+80000c18:	fcc42703          	lw	a4,-52(s0)
+80000c1c:	00e7a623          	sw	a4,12(a5)
+80000c20:	810267b7          	lui	a5,0x81026
+80000c24:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
+80000c28:	fd042703          	lw	a4,-48(s0)
+80000c2c:	00e7a823          	sw	a4,16(a5)
+80000c30:	dc8ff0ef          	jal	ra,800001f8 <vx_available_threads>
+80000c34:	fea42423          	sw	a0,-24(s0)
+80000c38:	fcc42703          	lw	a4,-52(s0)
+80000c3c:	fe842783          	lw	a5,-24(s0)
+80000c40:	02f757b3          	divu	a5,a4,a5
+80000c44:	fef42623          	sw	a5,-20(s0)
+80000c48:	fcc42703          	lw	a4,-52(s0)
+80000c4c:	fe842783          	lw	a5,-24(s0)
+80000c50:	02f777b3          	remu	a5,a4,a5
+80000c54:	00078863          	beqz	a5,80000c64 <vx_mat_add+0xa4>
+80000c58:	fec42783          	lw	a5,-20(s0)
+80000c5c:	00178793          	addi	a5,a5,1
+80000c60:	fef42623          	sw	a5,-20(s0)
+80000c64:	810267b7          	lui	a5,0x81026
+80000c68:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
+80000c6c:	fec42703          	lw	a4,-20(s0)
+80000c70:	00e7aa23          	sw	a4,20(a5)
+80000c74:	fcc42703          	lw	a4,-52(s0)
+80000c78:	fe842783          	lw	a5,-24(s0)
+80000c7c:	02f76263          	bltu	a4,a5,80000ca0 <vx_mat_add+0xe0>
+80000c80:	810267b7          	lui	a5,0x81026
+80000c84:	1cc78693          	addi	a3,a5,460 # 810261cc <barrier_bool+0xffffcf08>
+80000c88:	800017b7          	lui	a5,0x80001
+80000c8c:	cf878613          	addi	a2,a5,-776 # 80000cf8 <barrier_bool+0xfefd7a34>
+80000c90:	fe842583          	lw	a1,-24(s0)
+80000c94:	fd042503          	lw	a0,-48(s0)
+80000c98:	fd8ff0ef          	jal	ra,80000470 <vx_spawnWarps>
+80000c9c:	0200006f          	j	80000cbc <vx_mat_add+0xfc>
+80000ca0:	810267b7          	lui	a5,0x81026
+80000ca4:	1cc78693          	addi	a3,a5,460 # 810261cc <barrier_bool+0xffffcf08>
+80000ca8:	800017b7          	lui	a5,0x80001
+80000cac:	cf878613          	addi	a2,a5,-776 # 80000cf8 <barrier_bool+0xfefd7a34>
+80000cb0:	fcc42583          	lw	a1,-52(s0)
+80000cb4:	fd042503          	lw	a0,-48(s0)
+80000cb8:	fb8ff0ef          	jal	ra,80000470 <vx_spawnWarps>
+80000cbc:	d34ff0ef          	jal	ra,800001f0 <vx_available_warps>
+80000cc0:	fea42223          	sw	a0,-28(s0)
+80000cc4:	fd042703          	lw	a4,-48(s0)
+80000cc8:	fe442783          	lw	a5,-28(s0)
+80000ccc:	00e7f863          	bgeu	a5,a4,80000cdc <vx_mat_add+0x11c>
+80000cd0:	fe442503          	lw	a0,-28(s0)
+80000cd4:	88dff0ef          	jal	ra,80000560 <vx_wait_for_warps>
+80000cd8:	00c0006f          	j	80000ce4 <vx_mat_add+0x124>
+80000cdc:	fd042503          	lw	a0,-48(s0)
+80000ce0:	881ff0ef          	jal	ra,80000560 <vx_wait_for_warps>
+80000ce4:	00000013          	nop
+80000ce8:	03c12083          	lw	ra,60(sp)
+80000cec:	03812403          	lw	s0,56(sp)
+80000cf0:	04010113          	addi	sp,sp,64
+80000cf4:	00008067          	ret
 
-80000cfc <_vx_mat_add>:
-80000cfc:	fb010113          	addi	sp,sp,-80
-80000d00:	04112623          	sw	ra,76(sp)
-80000d04:	04812423          	sw	s0,72(sp)
-80000d08:	05010413          	addi	s0,sp,80
-80000d0c:	faa42e23          	sw	a0,-68(s0)
-80000d10:	fab42c23          	sw	a1,-72(s0)
-80000d14:	941ff0ef          	jal	ra,80000654 <vx_get_arg_struct>
-80000d18:	fea42023          	sw	a0,-32(s0)
-80000d1c:	fe042783          	lw	a5,-32(s0)
-80000d20:	0007a783          	lw	a5,0(a5)
-80000d24:	fcf42e23          	sw	a5,-36(s0)
-80000d28:	fe042783          	lw	a5,-32(s0)
-80000d2c:	0047a783          	lw	a5,4(a5)
-80000d30:	fcf42c23          	sw	a5,-40(s0)
-80000d34:	fe042783          	lw	a5,-32(s0)
-80000d38:	0087a783          	lw	a5,8(a5)
-80000d3c:	fcf42a23          	sw	a5,-44(s0)
-80000d40:	fe042783          	lw	a5,-32(s0)
-80000d44:	0147a783          	lw	a5,20(a5)
-80000d48:	fef42623          	sw	a5,-20(s0)
-80000d4c:	fec42703          	lw	a4,-20(s0)
-80000d50:	fbc42783          	lw	a5,-68(s0)
-80000d54:	02f707b3          	mul	a5,a4,a5
-80000d58:	fef42423          	sw	a5,-24(s0)
-80000d5c:	fec42783          	lw	a5,-20(s0)
-80000d60:	00079a63          	bnez	a5,80000d74 <_vx_mat_add+0x78>
-80000d64:	00100793          	li	a5,1
-80000d68:	fef42623          	sw	a5,-20(s0)
-80000d6c:	fbc42783          	lw	a5,-68(s0)
-80000d70:	fef42423          	sw	a5,-24(s0)
-80000d74:	fe042783          	lw	a5,-32(s0)
-80000d78:	00c7a783          	lw	a5,12(a5)
-80000d7c:	fcf42823          	sw	a5,-48(s0)
-80000d80:	fe042223          	sw	zero,-28(s0)
-80000d84:	0c00006f          	j	80000e44 <_vx_mat_add+0x148>
-80000d88:	fb842703          	lw	a4,-72(s0)
-80000d8c:	fd042783          	lw	a5,-48(s0)
-80000d90:	02f70733          	mul	a4,a4,a5
-80000d94:	fe842783          	lw	a5,-24(s0)
-80000d98:	00f707b3          	add	a5,a4,a5
-80000d9c:	fcf42623          	sw	a5,-52(s0)
-80000da0:	fe842703          	lw	a4,-24(s0)
-80000da4:	fd042783          	lw	a5,-48(s0)
-80000da8:	00f737b3          	sltu	a5,a4,a5
-80000dac:	0ff7f793          	andi	a5,a5,255
-80000db0:	fcf42423          	sw	a5,-56(s0)
-80000db4:	fc842783          	lw	a5,-56(s0)
-80000db8:	0017b793          	seqz	a5,a5
-80000dbc:	fcf403a3          	sb	a5,-57(s0)
-80000dc0:	fc744783          	lbu	a5,-57(s0)
-80000dc4:	00078f13          	mv	t5,a5
-80000dc8:	800017b7          	lui	a5,0x80001
-80000dcc:	e3078f93          	addi	t6,a5,-464 # 80000e30 <barrier_bool+0xfefd7b6c>
-80000dd0:	000f206b          	0xf206b
-80000dd4:	01ff707b          	0x1ff707b
-80000dd8:	fcc42783          	lw	a5,-52(s0)
-80000ddc:	00279793          	slli	a5,a5,0x2
-80000de0:	fdc42703          	lw	a4,-36(s0)
-80000de4:	00f707b3          	add	a5,a4,a5
-80000de8:	0007a683          	lw	a3,0(a5)
-80000dec:	fcc42783          	lw	a5,-52(s0)
-80000df0:	00279793          	slli	a5,a5,0x2
-80000df4:	fd842703          	lw	a4,-40(s0)
-80000df8:	00f707b3          	add	a5,a4,a5
-80000dfc:	0007a703          	lw	a4,0(a5)
-80000e00:	fcc42783          	lw	a5,-52(s0)
-80000e04:	00279793          	slli	a5,a5,0x2
-80000e08:	fd442603          	lw	a2,-44(s0)
-80000e0c:	00f607b3          	add	a5,a2,a5
-80000e10:	00e68733          	add	a4,a3,a4
-80000e14:	00e7a023          	sw	a4,0(a5)
-80000e18:	fe842783          	lw	a5,-24(s0)
-80000e1c:	00178793          	addi	a5,a5,1
-80000e20:	fef42423          	sw	a5,-24(s0)
-80000e24:	800017b7          	lui	a5,0x80001
-80000e28:	e3478e13          	addi	t3,a5,-460 # 80000e34 <barrier_bool+0xfefd7b70>
-80000e2c:	000e0067          	jr	t3
-80000e30:	00000013          	nop
-80000e34:	0000306b          	0x306b
-80000e38:	fe442783          	lw	a5,-28(s0)
-80000e3c:	00178793          	addi	a5,a5,1
-80000e40:	fef42223          	sw	a5,-28(s0)
-80000e44:	fe442783          	lw	a5,-28(s0)
-80000e48:	fec42703          	lw	a4,-20(s0)
-80000e4c:	f2e7eee3          	bltu	a5,a4,80000d88 <_vx_mat_add+0x8c>
-80000e50:	00000013          	nop
-80000e54:	04c12083          	lw	ra,76(sp)
-80000e58:	04812403          	lw	s0,72(sp)
-80000e5c:	05010113          	addi	sp,sp,80
-80000e60:	00008067          	ret
+80000cf8 <_vx_mat_add>:
+80000cf8:	fb010113          	addi	sp,sp,-80
+80000cfc:	04112623          	sw	ra,76(sp)
+80000d00:	04812423          	sw	s0,72(sp)
+80000d04:	05010413          	addi	s0,sp,80
+80000d08:	faa42e23          	sw	a0,-68(s0)
+80000d0c:	fab42c23          	sw	a1,-72(s0)
+80000d10:	941ff0ef          	jal	ra,80000650 <vx_get_arg_struct>
+80000d14:	fea42023          	sw	a0,-32(s0)
+80000d18:	fe042783          	lw	a5,-32(s0)
+80000d1c:	0007a783          	lw	a5,0(a5)
+80000d20:	fcf42e23          	sw	a5,-36(s0)
+80000d24:	fe042783          	lw	a5,-32(s0)
+80000d28:	0047a783          	lw	a5,4(a5)
+80000d2c:	fcf42c23          	sw	a5,-40(s0)
+80000d30:	fe042783          	lw	a5,-32(s0)
+80000d34:	0087a783          	lw	a5,8(a5)
+80000d38:	fcf42a23          	sw	a5,-44(s0)
+80000d3c:	fe042783          	lw	a5,-32(s0)
+80000d40:	0147a783          	lw	a5,20(a5)
+80000d44:	fef42623          	sw	a5,-20(s0)
+80000d48:	fec42703          	lw	a4,-20(s0)
+80000d4c:	fbc42783          	lw	a5,-68(s0)
+80000d50:	02f707b3          	mul	a5,a4,a5
+80000d54:	fef42423          	sw	a5,-24(s0)
+80000d58:	fec42783          	lw	a5,-20(s0)
+80000d5c:	00079a63          	bnez	a5,80000d70 <_vx_mat_add+0x78>
+80000d60:	00100793          	li	a5,1
+80000d64:	fef42623          	sw	a5,-20(s0)
+80000d68:	fbc42783          	lw	a5,-68(s0)
+80000d6c:	fef42423          	sw	a5,-24(s0)
+80000d70:	fe042783          	lw	a5,-32(s0)
+80000d74:	00c7a783          	lw	a5,12(a5)
+80000d78:	fcf42823          	sw	a5,-48(s0)
+80000d7c:	fe042223          	sw	zero,-28(s0)
+80000d80:	0c00006f          	j	80000e40 <_vx_mat_add+0x148>
+80000d84:	fb842703          	lw	a4,-72(s0)
+80000d88:	fd042783          	lw	a5,-48(s0)
+80000d8c:	02f70733          	mul	a4,a4,a5
+80000d90:	fe842783          	lw	a5,-24(s0)
+80000d94:	00f707b3          	add	a5,a4,a5
+80000d98:	fcf42623          	sw	a5,-52(s0)
+80000d9c:	fe842703          	lw	a4,-24(s0)
+80000da0:	fd042783          	lw	a5,-48(s0)
+80000da4:	00f737b3          	sltu	a5,a4,a5
+80000da8:	0ff7f793          	andi	a5,a5,255
+80000dac:	fcf42423          	sw	a5,-56(s0)
+80000db0:	fc842783          	lw	a5,-56(s0)
+80000db4:	0017b793          	seqz	a5,a5
+80000db8:	fcf403a3          	sb	a5,-57(s0)
+80000dbc:	fc744783          	lbu	a5,-57(s0)
+80000dc0:	00078f13          	mv	t5,a5
+80000dc4:	800017b7          	lui	a5,0x80001
+80000dc8:	e2c78f93          	addi	t6,a5,-468 # 80000e2c <barrier_bool+0xfefd7b68>
+80000dcc:	000f206b          	0xf206b
+80000dd0:	01ff707b          	0x1ff707b
+80000dd4:	fcc42783          	lw	a5,-52(s0)
+80000dd8:	00279793          	slli	a5,a5,0x2
+80000ddc:	fdc42703          	lw	a4,-36(s0)
+80000de0:	00f707b3          	add	a5,a4,a5
+80000de4:	0007a683          	lw	a3,0(a5)
+80000de8:	fcc42783          	lw	a5,-52(s0)
+80000dec:	00279793          	slli	a5,a5,0x2
+80000df0:	fd842703          	lw	a4,-40(s0)
+80000df4:	00f707b3          	add	a5,a4,a5
+80000df8:	0007a703          	lw	a4,0(a5)
+80000dfc:	fcc42783          	lw	a5,-52(s0)
+80000e00:	00279793          	slli	a5,a5,0x2
+80000e04:	fd442603          	lw	a2,-44(s0)
+80000e08:	00f607b3          	add	a5,a2,a5
+80000e0c:	00e68733          	add	a4,a3,a4
+80000e10:	00e7a023          	sw	a4,0(a5)
+80000e14:	fe842783          	lw	a5,-24(s0)
+80000e18:	00178793          	addi	a5,a5,1
+80000e1c:	fef42423          	sw	a5,-24(s0)
+80000e20:	800017b7          	lui	a5,0x80001
+80000e24:	e3078e13          	addi	t3,a5,-464 # 80000e30 <barrier_bool+0xfefd7b6c>
+80000e28:	000e0067          	jr	t3
+80000e2c:	00000013          	nop
+80000e30:	0000306b          	0x306b
+80000e34:	fe442783          	lw	a5,-28(s0)
+80000e38:	00178793          	addi	a5,a5,1
+80000e3c:	fef42223          	sw	a5,-28(s0)
+80000e40:	fe442783          	lw	a5,-28(s0)
+80000e44:	fec42703          	lw	a4,-20(s0)
+80000e48:	f2e7eee3          	bltu	a5,a4,80000d84 <_vx_mat_add+0x8c>
+80000e4c:	00000013          	nop
+80000e50:	04c12083          	lw	ra,76(sp)
+80000e54:	04812403          	lw	s0,72(sp)
+80000e58:	05010113          	addi	sp,sp,80
+80000e5c:	00008067          	ret
 
-80000e64 <vx_mat_sub>:
-80000e64:	fc010113          	addi	sp,sp,-64
-80000e68:	02112e23          	sw	ra,60(sp)
-80000e6c:	02812c23          	sw	s0,56(sp)
-80000e70:	04010413          	addi	s0,sp,64
-80000e74:	fca42e23          	sw	a0,-36(s0)
-80000e78:	fcb42c23          	sw	a1,-40(s0)
-80000e7c:	fcc42a23          	sw	a2,-44(s0)
-80000e80:	fcd42823          	sw	a3,-48(s0)
-80000e84:	fce42623          	sw	a4,-52(s0)
-80000e88:	810267b7          	lui	a5,0x81026
-80000e8c:	fdc42703          	lw	a4,-36(s0)
-80000e90:	1ce7a623          	sw	a4,460(a5) # 810261cc <barrier_bool+0xffffcf08>
-80000e94:	810267b7          	lui	a5,0x81026
-80000e98:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000e9c:	fd842703          	lw	a4,-40(s0)
-80000ea0:	00e7a223          	sw	a4,4(a5)
-80000ea4:	810267b7          	lui	a5,0x81026
-80000ea8:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000eac:	fd442703          	lw	a4,-44(s0)
-80000eb0:	00e7a423          	sw	a4,8(a5)
-80000eb4:	810267b7          	lui	a5,0x81026
-80000eb8:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000ebc:	fcc42703          	lw	a4,-52(s0)
-80000ec0:	00e7a623          	sw	a4,12(a5)
-80000ec4:	810267b7          	lui	a5,0x81026
-80000ec8:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000ecc:	fd042703          	lw	a4,-48(s0)
-80000ed0:	00e7a823          	sw	a4,16(a5)
-80000ed4:	b28ff0ef          	jal	ra,800001fc <vx_available_threads>
-80000ed8:	fea42423          	sw	a0,-24(s0)
-80000edc:	fcc42703          	lw	a4,-52(s0)
-80000ee0:	fe842783          	lw	a5,-24(s0)
-80000ee4:	02f757b3          	divu	a5,a4,a5
-80000ee8:	fef42623          	sw	a5,-20(s0)
-80000eec:	fcc42703          	lw	a4,-52(s0)
-80000ef0:	fe842783          	lw	a5,-24(s0)
-80000ef4:	02f777b3          	remu	a5,a4,a5
-80000ef8:	00078863          	beqz	a5,80000f08 <vx_mat_sub+0xa4>
-80000efc:	fec42783          	lw	a5,-20(s0)
-80000f00:	00178793          	addi	a5,a5,1
-80000f04:	fef42623          	sw	a5,-20(s0)
-80000f08:	810267b7          	lui	a5,0x81026
-80000f0c:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000f10:	fec42703          	lw	a4,-20(s0)
-80000f14:	00e7aa23          	sw	a4,20(a5)
-80000f18:	fcc42703          	lw	a4,-52(s0)
-80000f1c:	fe842783          	lw	a5,-24(s0)
-80000f20:	02f76263          	bltu	a4,a5,80000f44 <vx_mat_sub+0xe0>
-80000f24:	810267b7          	lui	a5,0x81026
-80000f28:	1cc78693          	addi	a3,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000f2c:	800017b7          	lui	a5,0x80001
-80000f30:	f9c78613          	addi	a2,a5,-100 # 80000f9c <barrier_bool+0xfefd7cd8>
-80000f34:	fe842583          	lw	a1,-24(s0)
-80000f38:	fd042503          	lw	a0,-48(s0)
-80000f3c:	d38ff0ef          	jal	ra,80000474 <vx_spawnWarps>
-80000f40:	0200006f          	j	80000f60 <vx_mat_sub+0xfc>
-80000f44:	810267b7          	lui	a5,0x81026
-80000f48:	1cc78693          	addi	a3,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000f4c:	800017b7          	lui	a5,0x80001
-80000f50:	f9c78613          	addi	a2,a5,-100 # 80000f9c <barrier_bool+0xfefd7cd8>
-80000f54:	fcc42583          	lw	a1,-52(s0)
-80000f58:	fd042503          	lw	a0,-48(s0)
-80000f5c:	d18ff0ef          	jal	ra,80000474 <vx_spawnWarps>
-80000f60:	a94ff0ef          	jal	ra,800001f4 <vx_available_warps>
-80000f64:	fea42223          	sw	a0,-28(s0)
-80000f68:	fd042703          	lw	a4,-48(s0)
-80000f6c:	fe442783          	lw	a5,-28(s0)
-80000f70:	00e7f863          	bgeu	a5,a4,80000f80 <vx_mat_sub+0x11c>
-80000f74:	fe442503          	lw	a0,-28(s0)
-80000f78:	decff0ef          	jal	ra,80000564 <vx_wait_for_warps>
-80000f7c:	00c0006f          	j	80000f88 <vx_mat_sub+0x124>
-80000f80:	fd042503          	lw	a0,-48(s0)
-80000f84:	de0ff0ef          	jal	ra,80000564 <vx_wait_for_warps>
-80000f88:	00000013          	nop
-80000f8c:	03c12083          	lw	ra,60(sp)
-80000f90:	03812403          	lw	s0,56(sp)
-80000f94:	04010113          	addi	sp,sp,64
-80000f98:	00008067          	ret
+80000e60 <vx_mat_sub>:
+80000e60:	fc010113          	addi	sp,sp,-64
+80000e64:	02112e23          	sw	ra,60(sp)
+80000e68:	02812c23          	sw	s0,56(sp)
+80000e6c:	04010413          	addi	s0,sp,64
+80000e70:	fca42e23          	sw	a0,-36(s0)
+80000e74:	fcb42c23          	sw	a1,-40(s0)
+80000e78:	fcc42a23          	sw	a2,-44(s0)
+80000e7c:	fcd42823          	sw	a3,-48(s0)
+80000e80:	fce42623          	sw	a4,-52(s0)
+80000e84:	810267b7          	lui	a5,0x81026
+80000e88:	fdc42703          	lw	a4,-36(s0)
+80000e8c:	1ce7a623          	sw	a4,460(a5) # 810261cc <barrier_bool+0xffffcf08>
+80000e90:	810267b7          	lui	a5,0x81026
+80000e94:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
+80000e98:	fd842703          	lw	a4,-40(s0)
+80000e9c:	00e7a223          	sw	a4,4(a5)
+80000ea0:	810267b7          	lui	a5,0x81026
+80000ea4:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
+80000ea8:	fd442703          	lw	a4,-44(s0)
+80000eac:	00e7a423          	sw	a4,8(a5)
+80000eb0:	810267b7          	lui	a5,0x81026
+80000eb4:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
+80000eb8:	fcc42703          	lw	a4,-52(s0)
+80000ebc:	00e7a623          	sw	a4,12(a5)
+80000ec0:	810267b7          	lui	a5,0x81026
+80000ec4:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
+80000ec8:	fd042703          	lw	a4,-48(s0)
+80000ecc:	00e7a823          	sw	a4,16(a5)
+80000ed0:	b28ff0ef          	jal	ra,800001f8 <vx_available_threads>
+80000ed4:	fea42423          	sw	a0,-24(s0)
+80000ed8:	fcc42703          	lw	a4,-52(s0)
+80000edc:	fe842783          	lw	a5,-24(s0)
+80000ee0:	02f757b3          	divu	a5,a4,a5
+80000ee4:	fef42623          	sw	a5,-20(s0)
+80000ee8:	fcc42703          	lw	a4,-52(s0)
+80000eec:	fe842783          	lw	a5,-24(s0)
+80000ef0:	02f777b3          	remu	a5,a4,a5
+80000ef4:	00078863          	beqz	a5,80000f04 <vx_mat_sub+0xa4>
+80000ef8:	fec42783          	lw	a5,-20(s0)
+80000efc:	00178793          	addi	a5,a5,1
+80000f00:	fef42623          	sw	a5,-20(s0)
+80000f04:	810267b7          	lui	a5,0x81026
+80000f08:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
+80000f0c:	fec42703          	lw	a4,-20(s0)
+80000f10:	00e7aa23          	sw	a4,20(a5)
+80000f14:	fcc42703          	lw	a4,-52(s0)
+80000f18:	fe842783          	lw	a5,-24(s0)
+80000f1c:	02f76263          	bltu	a4,a5,80000f40 <vx_mat_sub+0xe0>
+80000f20:	810267b7          	lui	a5,0x81026
+80000f24:	1cc78693          	addi	a3,a5,460 # 810261cc <barrier_bool+0xffffcf08>
+80000f28:	800017b7          	lui	a5,0x80001
+80000f2c:	f9878613          	addi	a2,a5,-104 # 80000f98 <barrier_bool+0xfefd7cd4>
+80000f30:	fe842583          	lw	a1,-24(s0)
+80000f34:	fd042503          	lw	a0,-48(s0)
+80000f38:	d38ff0ef          	jal	ra,80000470 <vx_spawnWarps>
+80000f3c:	0200006f          	j	80000f5c <vx_mat_sub+0xfc>
+80000f40:	810267b7          	lui	a5,0x81026
+80000f44:	1cc78693          	addi	a3,a5,460 # 810261cc <barrier_bool+0xffffcf08>
+80000f48:	800017b7          	lui	a5,0x80001
+80000f4c:	f9878613          	addi	a2,a5,-104 # 80000f98 <barrier_bool+0xfefd7cd4>
+80000f50:	fcc42583          	lw	a1,-52(s0)
+80000f54:	fd042503          	lw	a0,-48(s0)
+80000f58:	d18ff0ef          	jal	ra,80000470 <vx_spawnWarps>
+80000f5c:	a94ff0ef          	jal	ra,800001f0 <vx_available_warps>
+80000f60:	fea42223          	sw	a0,-28(s0)
+80000f64:	fd042703          	lw	a4,-48(s0)
+80000f68:	fe442783          	lw	a5,-28(s0)
+80000f6c:	00e7f863          	bgeu	a5,a4,80000f7c <vx_mat_sub+0x11c>
+80000f70:	fe442503          	lw	a0,-28(s0)
+80000f74:	decff0ef          	jal	ra,80000560 <vx_wait_for_warps>
+80000f78:	00c0006f          	j	80000f84 <vx_mat_sub+0x124>
+80000f7c:	fd042503          	lw	a0,-48(s0)
+80000f80:	de0ff0ef          	jal	ra,80000560 <vx_wait_for_warps>
+80000f84:	00000013          	nop
+80000f88:	03c12083          	lw	ra,60(sp)
+80000f8c:	03812403          	lw	s0,56(sp)
+80000f90:	04010113          	addi	sp,sp,64
+80000f94:	00008067          	ret
 
-80000f9c <_vx_mat_sub>:
-80000f9c:	fb010113          	addi	sp,sp,-80
-80000fa0:	04112623          	sw	ra,76(sp)
-80000fa4:	04812423          	sw	s0,72(sp)
-80000fa8:	05010413          	addi	s0,sp,80
-80000fac:	faa42e23          	sw	a0,-68(s0)
-80000fb0:	fab42c23          	sw	a1,-72(s0)
-80000fb4:	ea0ff0ef          	jal	ra,80000654 <vx_get_arg_struct>
-80000fb8:	fea42023          	sw	a0,-32(s0)
-80000fbc:	fe042783          	lw	a5,-32(s0)
-80000fc0:	0007a783          	lw	a5,0(a5)
-80000fc4:	fcf42e23          	sw	a5,-36(s0)
-80000fc8:	fe042783          	lw	a5,-32(s0)
-80000fcc:	0047a783          	lw	a5,4(a5)
-80000fd0:	fcf42c23          	sw	a5,-40(s0)
-80000fd4:	fe042783          	lw	a5,-32(s0)
-80000fd8:	0087a783          	lw	a5,8(a5)
-80000fdc:	fcf42a23          	sw	a5,-44(s0)
-80000fe0:	fe042783          	lw	a5,-32(s0)
-80000fe4:	0147a783          	lw	a5,20(a5)
-80000fe8:	fef42623          	sw	a5,-20(s0)
-80000fec:	fec42703          	lw	a4,-20(s0)
-80000ff0:	fbc42783          	lw	a5,-68(s0)
-80000ff4:	02f707b3          	mul	a5,a4,a5
-80000ff8:	fef42423          	sw	a5,-24(s0)
-80000ffc:	fec42783          	lw	a5,-20(s0)
-80001000:	00079a63          	bnez	a5,80001014 <_vx_mat_sub+0x78>
-80001004:	00100793          	li	a5,1
-80001008:	fef42623          	sw	a5,-20(s0)
-8000100c:	fbc42783          	lw	a5,-68(s0)
-80001010:	fef42423          	sw	a5,-24(s0)
-80001014:	fe042783          	lw	a5,-32(s0)
-80001018:	00c7a783          	lw	a5,12(a5)
-8000101c:	fcf42823          	sw	a5,-48(s0)
-80001020:	fe042223          	sw	zero,-28(s0)
-80001024:	0c00006f          	j	800010e4 <_vx_mat_sub+0x148>
-80001028:	fb842703          	lw	a4,-72(s0)
-8000102c:	fd042783          	lw	a5,-48(s0)
-80001030:	02f70733          	mul	a4,a4,a5
-80001034:	fe842783          	lw	a5,-24(s0)
-80001038:	00f707b3          	add	a5,a4,a5
-8000103c:	fcf42623          	sw	a5,-52(s0)
-80001040:	fe842703          	lw	a4,-24(s0)
-80001044:	fd042783          	lw	a5,-48(s0)
-80001048:	00f737b3          	sltu	a5,a4,a5
-8000104c:	0ff7f793          	andi	a5,a5,255
-80001050:	fcf42423          	sw	a5,-56(s0)
-80001054:	fc842783          	lw	a5,-56(s0)
-80001058:	0017b793          	seqz	a5,a5
-8000105c:	fcf403a3          	sb	a5,-57(s0)
-80001060:	fc744783          	lbu	a5,-57(s0)
-80001064:	00078f13          	mv	t5,a5
-80001068:	800017b7          	lui	a5,0x80001
-8000106c:	0d078f93          	addi	t6,a5,208 # 800010d0 <barrier_bool+0xfefd7e0c>
-80001070:	000f206b          	0xf206b
-80001074:	01ff707b          	0x1ff707b
-80001078:	fcc42783          	lw	a5,-52(s0)
-8000107c:	00279793          	slli	a5,a5,0x2
-80001080:	fdc42703          	lw	a4,-36(s0)
-80001084:	00f707b3          	add	a5,a4,a5
-80001088:	0007a683          	lw	a3,0(a5)
-8000108c:	fcc42783          	lw	a5,-52(s0)
-80001090:	00279793          	slli	a5,a5,0x2
-80001094:	fd842703          	lw	a4,-40(s0)
-80001098:	00f707b3          	add	a5,a4,a5
-8000109c:	0007a703          	lw	a4,0(a5)
-800010a0:	fcc42783          	lw	a5,-52(s0)
-800010a4:	00279793          	slli	a5,a5,0x2
-800010a8:	fd442603          	lw	a2,-44(s0)
-800010ac:	00f607b3          	add	a5,a2,a5
-800010b0:	40e68733          	sub	a4,a3,a4
-800010b4:	00e7a023          	sw	a4,0(a5)
-800010b8:	fe842783          	lw	a5,-24(s0)
-800010bc:	00178793          	addi	a5,a5,1
-800010c0:	fef42423          	sw	a5,-24(s0)
-800010c4:	800017b7          	lui	a5,0x80001
-800010c8:	0d478e13          	addi	t3,a5,212 # 800010d4 <barrier_bool+0xfefd7e10>
-800010cc:	000e0067          	jr	t3
-800010d0:	00000013          	nop
-800010d4:	0000306b          	0x306b
-800010d8:	fe442783          	lw	a5,-28(s0)
-800010dc:	00178793          	addi	a5,a5,1
-800010e0:	fef42223          	sw	a5,-28(s0)
-800010e4:	fe442783          	lw	a5,-28(s0)
-800010e8:	fec42703          	lw	a4,-20(s0)
-800010ec:	f2e7eee3          	bltu	a5,a4,80001028 <_vx_mat_sub+0x8c>
-800010f0:	00000013          	nop
-800010f4:	04c12083          	lw	ra,76(sp)
-800010f8:	04812403          	lw	s0,72(sp)
-800010fc:	05010113          	addi	sp,sp,80
-80001100:	00008067          	ret
+80000f98 <_vx_mat_sub>:
+80000f98:	fb010113          	addi	sp,sp,-80
+80000f9c:	04112623          	sw	ra,76(sp)
+80000fa0:	04812423          	sw	s0,72(sp)
+80000fa4:	05010413          	addi	s0,sp,80
+80000fa8:	faa42e23          	sw	a0,-68(s0)
+80000fac:	fab42c23          	sw	a1,-72(s0)
+80000fb0:	ea0ff0ef          	jal	ra,80000650 <vx_get_arg_struct>
+80000fb4:	fea42023          	sw	a0,-32(s0)
+80000fb8:	fe042783          	lw	a5,-32(s0)
+80000fbc:	0007a783          	lw	a5,0(a5)
+80000fc0:	fcf42e23          	sw	a5,-36(s0)
+80000fc4:	fe042783          	lw	a5,-32(s0)
+80000fc8:	0047a783          	lw	a5,4(a5)
+80000fcc:	fcf42c23          	sw	a5,-40(s0)
+80000fd0:	fe042783          	lw	a5,-32(s0)
+80000fd4:	0087a783          	lw	a5,8(a5)
+80000fd8:	fcf42a23          	sw	a5,-44(s0)
+80000fdc:	fe042783          	lw	a5,-32(s0)
+80000fe0:	0147a783          	lw	a5,20(a5)
+80000fe4:	fef42623          	sw	a5,-20(s0)
+80000fe8:	fec42703          	lw	a4,-20(s0)
+80000fec:	fbc42783          	lw	a5,-68(s0)
+80000ff0:	02f707b3          	mul	a5,a4,a5
+80000ff4:	fef42423          	sw	a5,-24(s0)
+80000ff8:	fec42783          	lw	a5,-20(s0)
+80000ffc:	00079a63          	bnez	a5,80001010 <_vx_mat_sub+0x78>
+80001000:	00100793          	li	a5,1
+80001004:	fef42623          	sw	a5,-20(s0)
+80001008:	fbc42783          	lw	a5,-68(s0)
+8000100c:	fef42423          	sw	a5,-24(s0)
+80001010:	fe042783          	lw	a5,-32(s0)
+80001014:	00c7a783          	lw	a5,12(a5)
+80001018:	fcf42823          	sw	a5,-48(s0)
+8000101c:	fe042223          	sw	zero,-28(s0)
+80001020:	0c00006f          	j	800010e0 <_vx_mat_sub+0x148>
+80001024:	fb842703          	lw	a4,-72(s0)
+80001028:	fd042783          	lw	a5,-48(s0)
+8000102c:	02f70733          	mul	a4,a4,a5
+80001030:	fe842783          	lw	a5,-24(s0)
+80001034:	00f707b3          	add	a5,a4,a5
+80001038:	fcf42623          	sw	a5,-52(s0)
+8000103c:	fe842703          	lw	a4,-24(s0)
+80001040:	fd042783          	lw	a5,-48(s0)
+80001044:	00f737b3          	sltu	a5,a4,a5
+80001048:	0ff7f793          	andi	a5,a5,255
+8000104c:	fcf42423          	sw	a5,-56(s0)
+80001050:	fc842783          	lw	a5,-56(s0)
+80001054:	0017b793          	seqz	a5,a5
+80001058:	fcf403a3          	sb	a5,-57(s0)
+8000105c:	fc744783          	lbu	a5,-57(s0)
+80001060:	00078f13          	mv	t5,a5
+80001064:	800017b7          	lui	a5,0x80001
+80001068:	0cc78f93          	addi	t6,a5,204 # 800010cc <barrier_bool+0xfefd7e08>
+8000106c:	000f206b          	0xf206b
+80001070:	01ff707b          	0x1ff707b
+80001074:	fcc42783          	lw	a5,-52(s0)
+80001078:	00279793          	slli	a5,a5,0x2
+8000107c:	fdc42703          	lw	a4,-36(s0)
+80001080:	00f707b3          	add	a5,a4,a5
+80001084:	0007a683          	lw	a3,0(a5)
+80001088:	fcc42783          	lw	a5,-52(s0)
+8000108c:	00279793          	slli	a5,a5,0x2
+80001090:	fd842703          	lw	a4,-40(s0)
+80001094:	00f707b3          	add	a5,a4,a5
+80001098:	0007a703          	lw	a4,0(a5)
+8000109c:	fcc42783          	lw	a5,-52(s0)
+800010a0:	00279793          	slli	a5,a5,0x2
+800010a4:	fd442603          	lw	a2,-44(s0)
+800010a8:	00f607b3          	add	a5,a2,a5
+800010ac:	40e68733          	sub	a4,a3,a4
+800010b0:	00e7a023          	sw	a4,0(a5)
+800010b4:	fe842783          	lw	a5,-24(s0)
+800010b8:	00178793          	addi	a5,a5,1
+800010bc:	fef42423          	sw	a5,-24(s0)
+800010c0:	800017b7          	lui	a5,0x80001
+800010c4:	0d078e13          	addi	t3,a5,208 # 800010d0 <barrier_bool+0xfefd7e0c>
+800010c8:	000e0067          	jr	t3
+800010cc:	00000013          	nop
+800010d0:	0000306b          	0x306b
+800010d4:	fe442783          	lw	a5,-28(s0)
+800010d8:	00178793          	addi	a5,a5,1
+800010dc:	fef42223          	sw	a5,-28(s0)
+800010e0:	fe442783          	lw	a5,-28(s0)
+800010e4:	fec42703          	lw	a4,-20(s0)
+800010e8:	f2e7eee3          	bltu	a5,a4,80001024 <_vx_mat_sub+0x8c>
+800010ec:	00000013          	nop
+800010f0:	04c12083          	lw	ra,76(sp)
+800010f4:	04812403          	lw	s0,72(sp)
+800010f8:	05010113          	addi	sp,sp,80
+800010fc:	00008067          	ret
 
-80001104 <vx_e_mat_add>:
-80001104:	fc010113          	addi	sp,sp,-64
-80001108:	02112e23          	sw	ra,60(sp)
-8000110c:	02812c23          	sw	s0,56(sp)
-80001110:	04010413          	addi	s0,sp,64
-80001114:	fca42e23          	sw	a0,-36(s0)
-80001118:	fcb42c23          	sw	a1,-40(s0)
-8000111c:	fcc42a23          	sw	a2,-44(s0)
-80001120:	fcd42823          	sw	a3,-48(s0)
-80001124:	fce42623          	sw	a4,-52(s0)
-80001128:	810267b7          	lui	a5,0x81026
-8000112c:	fdc42703          	lw	a4,-36(s0)
-80001130:	1ee7a223          	sw	a4,484(a5) # 810261e4 <barrier_bool+0xffffcf20>
-80001134:	810267b7          	lui	a5,0x81026
-80001138:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-8000113c:	fd842703          	lw	a4,-40(s0)
-80001140:	00e7a223          	sw	a4,4(a5)
-80001144:	810267b7          	lui	a5,0x81026
-80001148:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-8000114c:	fd442703          	lw	a4,-44(s0)
-80001150:	00e7a423          	sw	a4,8(a5)
-80001154:	810267b7          	lui	a5,0x81026
-80001158:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-8000115c:	fcc42703          	lw	a4,-52(s0)
-80001160:	00e7a623          	sw	a4,12(a5)
-80001164:	810267b7          	lui	a5,0x81026
-80001168:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-8000116c:	fd042703          	lw	a4,-48(s0)
-80001170:	00e7a823          	sw	a4,16(a5)
-80001174:	888ff0ef          	jal	ra,800001fc <vx_available_threads>
-80001178:	fea42423          	sw	a0,-24(s0)
-8000117c:	fcc42703          	lw	a4,-52(s0)
-80001180:	fe842783          	lw	a5,-24(s0)
-80001184:	02f757b3          	divu	a5,a4,a5
-80001188:	fef42623          	sw	a5,-20(s0)
-8000118c:	fcc42703          	lw	a4,-52(s0)
-80001190:	fe842783          	lw	a5,-24(s0)
-80001194:	02f777b3          	remu	a5,a4,a5
-80001198:	00078863          	beqz	a5,800011a8 <vx_e_mat_add+0xa4>
-8000119c:	fec42783          	lw	a5,-20(s0)
-800011a0:	00178793          	addi	a5,a5,1
-800011a4:	fef42623          	sw	a5,-20(s0)
-800011a8:	810267b7          	lui	a5,0x81026
-800011ac:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-800011b0:	fec42703          	lw	a4,-20(s0)
-800011b4:	00e7aa23          	sw	a4,20(a5)
-800011b8:	fcc42703          	lw	a4,-52(s0)
-800011bc:	fe842783          	lw	a5,-24(s0)
-800011c0:	02f76263          	bltu	a4,a5,800011e4 <vx_e_mat_add+0xe0>
-800011c4:	810267b7          	lui	a5,0x81026
-800011c8:	1e478693          	addi	a3,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-800011cc:	800017b7          	lui	a5,0x80001
-800011d0:	23c78613          	addi	a2,a5,572 # 8000123c <barrier_bool+0xfefd7f78>
-800011d4:	fe842583          	lw	a1,-24(s0)
-800011d8:	fd042503          	lw	a0,-48(s0)
-800011dc:	a98ff0ef          	jal	ra,80000474 <vx_spawnWarps>
-800011e0:	0200006f          	j	80001200 <vx_e_mat_add+0xfc>
-800011e4:	810267b7          	lui	a5,0x81026
-800011e8:	1e478693          	addi	a3,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-800011ec:	800017b7          	lui	a5,0x80001
-800011f0:	23c78613          	addi	a2,a5,572 # 8000123c <barrier_bool+0xfefd7f78>
-800011f4:	fcc42583          	lw	a1,-52(s0)
-800011f8:	fd042503          	lw	a0,-48(s0)
-800011fc:	a78ff0ef          	jal	ra,80000474 <vx_spawnWarps>
-80001200:	ff5fe0ef          	jal	ra,800001f4 <vx_available_warps>
-80001204:	fea42223          	sw	a0,-28(s0)
-80001208:	fd042703          	lw	a4,-48(s0)
-8000120c:	fe442783          	lw	a5,-28(s0)
-80001210:	00e7f863          	bgeu	a5,a4,80001220 <vx_e_mat_add+0x11c>
-80001214:	fe442503          	lw	a0,-28(s0)
-80001218:	b4cff0ef          	jal	ra,80000564 <vx_wait_for_warps>
-8000121c:	00c0006f          	j	80001228 <vx_e_mat_add+0x124>
-80001220:	fd042503          	lw	a0,-48(s0)
-80001224:	b40ff0ef          	jal	ra,80000564 <vx_wait_for_warps>
-80001228:	00000013          	nop
-8000122c:	03c12083          	lw	ra,60(sp)
-80001230:	03812403          	lw	s0,56(sp)
-80001234:	04010113          	addi	sp,sp,64
-80001238:	00008067          	ret
+80001100 <vx_e_mat_add>:
+80001100:	fc010113          	addi	sp,sp,-64
+80001104:	02112e23          	sw	ra,60(sp)
+80001108:	02812c23          	sw	s0,56(sp)
+8000110c:	04010413          	addi	s0,sp,64
+80001110:	fca42e23          	sw	a0,-36(s0)
+80001114:	fcb42c23          	sw	a1,-40(s0)
+80001118:	fcc42a23          	sw	a2,-44(s0)
+8000111c:	fcd42823          	sw	a3,-48(s0)
+80001120:	fce42623          	sw	a4,-52(s0)
+80001124:	810267b7          	lui	a5,0x81026
+80001128:	fdc42703          	lw	a4,-36(s0)
+8000112c:	1ee7a223          	sw	a4,484(a5) # 810261e4 <barrier_bool+0xffffcf20>
+80001130:	810267b7          	lui	a5,0x81026
+80001134:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
+80001138:	fd842703          	lw	a4,-40(s0)
+8000113c:	00e7a223          	sw	a4,4(a5)
+80001140:	810267b7          	lui	a5,0x81026
+80001144:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
+80001148:	fd442703          	lw	a4,-44(s0)
+8000114c:	00e7a423          	sw	a4,8(a5)
+80001150:	810267b7          	lui	a5,0x81026
+80001154:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
+80001158:	fcc42703          	lw	a4,-52(s0)
+8000115c:	00e7a623          	sw	a4,12(a5)
+80001160:	810267b7          	lui	a5,0x81026
+80001164:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
+80001168:	fd042703          	lw	a4,-48(s0)
+8000116c:	00e7a823          	sw	a4,16(a5)
+80001170:	888ff0ef          	jal	ra,800001f8 <vx_available_threads>
+80001174:	fea42423          	sw	a0,-24(s0)
+80001178:	fcc42703          	lw	a4,-52(s0)
+8000117c:	fe842783          	lw	a5,-24(s0)
+80001180:	02f757b3          	divu	a5,a4,a5
+80001184:	fef42623          	sw	a5,-20(s0)
+80001188:	fcc42703          	lw	a4,-52(s0)
+8000118c:	fe842783          	lw	a5,-24(s0)
+80001190:	02f777b3          	remu	a5,a4,a5
+80001194:	00078863          	beqz	a5,800011a4 <vx_e_mat_add+0xa4>
+80001198:	fec42783          	lw	a5,-20(s0)
+8000119c:	00178793          	addi	a5,a5,1
+800011a0:	fef42623          	sw	a5,-20(s0)
+800011a4:	810267b7          	lui	a5,0x81026
+800011a8:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
+800011ac:	fec42703          	lw	a4,-20(s0)
+800011b0:	00e7aa23          	sw	a4,20(a5)
+800011b4:	fcc42703          	lw	a4,-52(s0)
+800011b8:	fe842783          	lw	a5,-24(s0)
+800011bc:	02f76263          	bltu	a4,a5,800011e0 <vx_e_mat_add+0xe0>
+800011c0:	810267b7          	lui	a5,0x81026
+800011c4:	1e478693          	addi	a3,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
+800011c8:	800017b7          	lui	a5,0x80001
+800011cc:	23878613          	addi	a2,a5,568 # 80001238 <barrier_bool+0xfefd7f74>
+800011d0:	fe842583          	lw	a1,-24(s0)
+800011d4:	fd042503          	lw	a0,-48(s0)
+800011d8:	a98ff0ef          	jal	ra,80000470 <vx_spawnWarps>
+800011dc:	0200006f          	j	800011fc <vx_e_mat_add+0xfc>
+800011e0:	810267b7          	lui	a5,0x81026
+800011e4:	1e478693          	addi	a3,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
+800011e8:	800017b7          	lui	a5,0x80001
+800011ec:	23878613          	addi	a2,a5,568 # 80001238 <barrier_bool+0xfefd7f74>
+800011f0:	fcc42583          	lw	a1,-52(s0)
+800011f4:	fd042503          	lw	a0,-48(s0)
+800011f8:	a78ff0ef          	jal	ra,80000470 <vx_spawnWarps>
+800011fc:	ff5fe0ef          	jal	ra,800001f0 <vx_available_warps>
+80001200:	fea42223          	sw	a0,-28(s0)
+80001204:	fd042703          	lw	a4,-48(s0)
+80001208:	fe442783          	lw	a5,-28(s0)
+8000120c:	00e7f863          	bgeu	a5,a4,8000121c <vx_e_mat_add+0x11c>
+80001210:	fe442503          	lw	a0,-28(s0)
+80001214:	b4cff0ef          	jal	ra,80000560 <vx_wait_for_warps>
+80001218:	00c0006f          	j	80001224 <vx_e_mat_add+0x124>
+8000121c:	fd042503          	lw	a0,-48(s0)
+80001220:	b40ff0ef          	jal	ra,80000560 <vx_wait_for_warps>
+80001224:	00000013          	nop
+80001228:	03c12083          	lw	ra,60(sp)
+8000122c:	03812403          	lw	s0,56(sp)
+80001230:	04010113          	addi	sp,sp,64
+80001234:	00008067          	ret
 
-8000123c <_vx_e_mat_add>:
-8000123c:	fb010113          	addi	sp,sp,-80
-80001240:	04112623          	sw	ra,76(sp)
-80001244:	04812423          	sw	s0,72(sp)
-80001248:	05010413          	addi	s0,sp,80
-8000124c:	faa42e23          	sw	a0,-68(s0)
-80001250:	fab42c23          	sw	a1,-72(s0)
-80001254:	c00ff0ef          	jal	ra,80000654 <vx_get_arg_struct>
-80001258:	fea42023          	sw	a0,-32(s0)
-8000125c:	fe042783          	lw	a5,-32(s0)
-80001260:	0007a783          	lw	a5,0(a5)
-80001264:	fcf42e23          	sw	a5,-36(s0)
-80001268:	fe042783          	lw	a5,-32(s0)
-8000126c:	0047a783          	lw	a5,4(a5)
-80001270:	0007a783          	lw	a5,0(a5)
-80001274:	fcf42c23          	sw	a5,-40(s0)
-80001278:	fe042783          	lw	a5,-32(s0)
-8000127c:	0087a783          	lw	a5,8(a5)
-80001280:	fcf42a23          	sw	a5,-44(s0)
-80001284:	fe042783          	lw	a5,-32(s0)
-80001288:	0147a783          	lw	a5,20(a5)
-8000128c:	fef42623          	sw	a5,-20(s0)
-80001290:	fec42703          	lw	a4,-20(s0)
-80001294:	fbc42783          	lw	a5,-68(s0)
-80001298:	02f707b3          	mul	a5,a4,a5
-8000129c:	fef42423          	sw	a5,-24(s0)
-800012a0:	fec42783          	lw	a5,-20(s0)
-800012a4:	00079a63          	bnez	a5,800012b8 <_vx_e_mat_add+0x7c>
-800012a8:	00100793          	li	a5,1
-800012ac:	fef42623          	sw	a5,-20(s0)
-800012b0:	fbc42783          	lw	a5,-68(s0)
-800012b4:	fef42423          	sw	a5,-24(s0)
-800012b8:	fe042783          	lw	a5,-32(s0)
-800012bc:	00c7a783          	lw	a5,12(a5)
-800012c0:	fcf42823          	sw	a5,-48(s0)
-800012c4:	fe042223          	sw	zero,-28(s0)
-800012c8:	0b00006f          	j	80001378 <_vx_e_mat_add+0x13c>
-800012cc:	fb842703          	lw	a4,-72(s0)
-800012d0:	fd042783          	lw	a5,-48(s0)
-800012d4:	02f70733          	mul	a4,a4,a5
-800012d8:	fe842783          	lw	a5,-24(s0)
-800012dc:	00f707b3          	add	a5,a4,a5
-800012e0:	fcf42623          	sw	a5,-52(s0)
-800012e4:	fe842703          	lw	a4,-24(s0)
-800012e8:	fd042783          	lw	a5,-48(s0)
-800012ec:	00f737b3          	sltu	a5,a4,a5
-800012f0:	0ff7f793          	andi	a5,a5,255
-800012f4:	fcf42423          	sw	a5,-56(s0)
-800012f8:	fc842783          	lw	a5,-56(s0)
-800012fc:	0017b793          	seqz	a5,a5
-80001300:	fcf403a3          	sb	a5,-57(s0)
-80001304:	fc744783          	lbu	a5,-57(s0)
-80001308:	00078f13          	mv	t5,a5
-8000130c:	800017b7          	lui	a5,0x80001
-80001310:	36478f93          	addi	t6,a5,868 # 80001364 <barrier_bool+0xfefd80a0>
-80001314:	000f206b          	0xf206b
-80001318:	01ff707b          	0x1ff707b
-8000131c:	fcc42783          	lw	a5,-52(s0)
-80001320:	00279793          	slli	a5,a5,0x2
-80001324:	fdc42703          	lw	a4,-36(s0)
-80001328:	00f707b3          	add	a5,a4,a5
-8000132c:	0007a683          	lw	a3,0(a5)
-80001330:	fcc42783          	lw	a5,-52(s0)
-80001334:	00279793          	slli	a5,a5,0x2
-80001338:	fd442703          	lw	a4,-44(s0)
-8000133c:	00f707b3          	add	a5,a4,a5
-80001340:	fd842703          	lw	a4,-40(s0)
-80001344:	00e68733          	add	a4,a3,a4
-80001348:	00e7a023          	sw	a4,0(a5)
-8000134c:	fe842783          	lw	a5,-24(s0)
-80001350:	00178793          	addi	a5,a5,1
-80001354:	fef42423          	sw	a5,-24(s0)
-80001358:	800017b7          	lui	a5,0x80001
-8000135c:	36878e13          	addi	t3,a5,872 # 80001368 <barrier_bool+0xfefd80a4>
-80001360:	000e0067          	jr	t3
-80001364:	00000013          	nop
-80001368:	0000306b          	0x306b
-8000136c:	fe442783          	lw	a5,-28(s0)
-80001370:	00178793          	addi	a5,a5,1
-80001374:	fef42223          	sw	a5,-28(s0)
-80001378:	fe442783          	lw	a5,-28(s0)
-8000137c:	fec42703          	lw	a4,-20(s0)
-80001380:	f4e7e6e3          	bltu	a5,a4,800012cc <_vx_e_mat_add+0x90>
-80001384:	00000013          	nop
-80001388:	04c12083          	lw	ra,76(sp)
-8000138c:	04812403          	lw	s0,72(sp)
-80001390:	05010113          	addi	sp,sp,80
-80001394:	00008067          	ret
+80001238 <_vx_e_mat_add>:
+80001238:	fb010113          	addi	sp,sp,-80
+8000123c:	04112623          	sw	ra,76(sp)
+80001240:	04812423          	sw	s0,72(sp)
+80001244:	05010413          	addi	s0,sp,80
+80001248:	faa42e23          	sw	a0,-68(s0)
+8000124c:	fab42c23          	sw	a1,-72(s0)
+80001250:	c00ff0ef          	jal	ra,80000650 <vx_get_arg_struct>
+80001254:	fea42023          	sw	a0,-32(s0)
+80001258:	fe042783          	lw	a5,-32(s0)
+8000125c:	0007a783          	lw	a5,0(a5)
+80001260:	fcf42e23          	sw	a5,-36(s0)
+80001264:	fe042783          	lw	a5,-32(s0)
+80001268:	0047a783          	lw	a5,4(a5)
+8000126c:	0007a783          	lw	a5,0(a5)
+80001270:	fcf42c23          	sw	a5,-40(s0)
+80001274:	fe042783          	lw	a5,-32(s0)
+80001278:	0087a783          	lw	a5,8(a5)
+8000127c:	fcf42a23          	sw	a5,-44(s0)
+80001280:	fe042783          	lw	a5,-32(s0)
+80001284:	0147a783          	lw	a5,20(a5)
+80001288:	fef42623          	sw	a5,-20(s0)
+8000128c:	fec42703          	lw	a4,-20(s0)
+80001290:	fbc42783          	lw	a5,-68(s0)
+80001294:	02f707b3          	mul	a5,a4,a5
+80001298:	fef42423          	sw	a5,-24(s0)
+8000129c:	fec42783          	lw	a5,-20(s0)
+800012a0:	00079a63          	bnez	a5,800012b4 <_vx_e_mat_add+0x7c>
+800012a4:	00100793          	li	a5,1
+800012a8:	fef42623          	sw	a5,-20(s0)
+800012ac:	fbc42783          	lw	a5,-68(s0)
+800012b0:	fef42423          	sw	a5,-24(s0)
+800012b4:	fe042783          	lw	a5,-32(s0)
+800012b8:	00c7a783          	lw	a5,12(a5)
+800012bc:	fcf42823          	sw	a5,-48(s0)
+800012c0:	fe042223          	sw	zero,-28(s0)
+800012c4:	0b00006f          	j	80001374 <_vx_e_mat_add+0x13c>
+800012c8:	fb842703          	lw	a4,-72(s0)
+800012cc:	fd042783          	lw	a5,-48(s0)
+800012d0:	02f70733          	mul	a4,a4,a5
+800012d4:	fe842783          	lw	a5,-24(s0)
+800012d8:	00f707b3          	add	a5,a4,a5
+800012dc:	fcf42623          	sw	a5,-52(s0)
+800012e0:	fe842703          	lw	a4,-24(s0)
+800012e4:	fd042783          	lw	a5,-48(s0)
+800012e8:	00f737b3          	sltu	a5,a4,a5
+800012ec:	0ff7f793          	andi	a5,a5,255
+800012f0:	fcf42423          	sw	a5,-56(s0)
+800012f4:	fc842783          	lw	a5,-56(s0)
+800012f8:	0017b793          	seqz	a5,a5
+800012fc:	fcf403a3          	sb	a5,-57(s0)
+80001300:	fc744783          	lbu	a5,-57(s0)
+80001304:	00078f13          	mv	t5,a5
+80001308:	800017b7          	lui	a5,0x80001
+8000130c:	36078f93          	addi	t6,a5,864 # 80001360 <barrier_bool+0xfefd809c>
+80001310:	000f206b          	0xf206b
+80001314:	01ff707b          	0x1ff707b
+80001318:	fcc42783          	lw	a5,-52(s0)
+8000131c:	00279793          	slli	a5,a5,0x2
+80001320:	fdc42703          	lw	a4,-36(s0)
+80001324:	00f707b3          	add	a5,a4,a5
+80001328:	0007a683          	lw	a3,0(a5)
+8000132c:	fcc42783          	lw	a5,-52(s0)
+80001330:	00279793          	slli	a5,a5,0x2
+80001334:	fd442703          	lw	a4,-44(s0)
+80001338:	00f707b3          	add	a5,a4,a5
+8000133c:	fd842703          	lw	a4,-40(s0)
+80001340:	00e68733          	add	a4,a3,a4
+80001344:	00e7a023          	sw	a4,0(a5)
+80001348:	fe842783          	lw	a5,-24(s0)
+8000134c:	00178793          	addi	a5,a5,1
+80001350:	fef42423          	sw	a5,-24(s0)
+80001354:	800017b7          	lui	a5,0x80001
+80001358:	36478e13          	addi	t3,a5,868 # 80001364 <barrier_bool+0xfefd80a0>
+8000135c:	000e0067          	jr	t3
+80001360:	00000013          	nop
+80001364:	0000306b          	0x306b
+80001368:	fe442783          	lw	a5,-28(s0)
+8000136c:	00178793          	addi	a5,a5,1
+80001370:	fef42223          	sw	a5,-28(s0)
+80001374:	fe442783          	lw	a5,-28(s0)
+80001378:	fec42703          	lw	a4,-20(s0)
+8000137c:	f4e7e6e3          	bltu	a5,a4,800012c8 <_vx_e_mat_add+0x90>
+80001380:	00000013          	nop
+80001384:	04c12083          	lw	ra,76(sp)
+80001388:	04812403          	lw	s0,72(sp)
+8000138c:	05010113          	addi	sp,sp,80
+80001390:	00008067          	ret
 
-80001398 <vx_e_mat_mult>:
-80001398:	fc010113          	addi	sp,sp,-64
-8000139c:	02112e23          	sw	ra,60(sp)
-800013a0:	02812c23          	sw	s0,56(sp)
-800013a4:	04010413          	addi	s0,sp,64
-800013a8:	fca42e23          	sw	a0,-36(s0)
-800013ac:	fcb42c23          	sw	a1,-40(s0)
-800013b0:	fcc42a23          	sw	a2,-44(s0)
-800013b4:	fcd42823          	sw	a3,-48(s0)
-800013b8:	fce42623          	sw	a4,-52(s0)
-800013bc:	810267b7          	lui	a5,0x81026
-800013c0:	fdc42703          	lw	a4,-36(s0)
-800013c4:	1ee7a223          	sw	a4,484(a5) # 810261e4 <barrier_bool+0xffffcf20>
-800013c8:	810267b7          	lui	a5,0x81026
-800013cc:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-800013d0:	fd842703          	lw	a4,-40(s0)
-800013d4:	00e7a223          	sw	a4,4(a5)
-800013d8:	810267b7          	lui	a5,0x81026
-800013dc:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-800013e0:	fd442703          	lw	a4,-44(s0)
-800013e4:	00e7a423          	sw	a4,8(a5)
-800013e8:	810267b7          	lui	a5,0x81026
-800013ec:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-800013f0:	fcc42703          	lw	a4,-52(s0)
-800013f4:	00e7a623          	sw	a4,12(a5)
-800013f8:	810267b7          	lui	a5,0x81026
-800013fc:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-80001400:	fd042703          	lw	a4,-48(s0)
-80001404:	00e7a823          	sw	a4,16(a5)
-80001408:	df5fe0ef          	jal	ra,800001fc <vx_available_threads>
-8000140c:	fea42423          	sw	a0,-24(s0)
-80001410:	fcc42703          	lw	a4,-52(s0)
-80001414:	fe842783          	lw	a5,-24(s0)
-80001418:	02f757b3          	divu	a5,a4,a5
-8000141c:	fef42623          	sw	a5,-20(s0)
-80001420:	fcc42703          	lw	a4,-52(s0)
-80001424:	fe842783          	lw	a5,-24(s0)
-80001428:	02f777b3          	remu	a5,a4,a5
-8000142c:	00078863          	beqz	a5,8000143c <vx_e_mat_mult+0xa4>
-80001430:	fec42783          	lw	a5,-20(s0)
-80001434:	00178793          	addi	a5,a5,1
-80001438:	fef42623          	sw	a5,-20(s0)
-8000143c:	810267b7          	lui	a5,0x81026
-80001440:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-80001444:	fec42703          	lw	a4,-20(s0)
-80001448:	00e7aa23          	sw	a4,20(a5)
-8000144c:	fcc42703          	lw	a4,-52(s0)
-80001450:	fe842783          	lw	a5,-24(s0)
-80001454:	02f76263          	bltu	a4,a5,80001478 <vx_e_mat_mult+0xe0>
-80001458:	810267b7          	lui	a5,0x81026
-8000145c:	1e478693          	addi	a3,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-80001460:	800017b7          	lui	a5,0x80001
-80001464:	4d078613          	addi	a2,a5,1232 # 800014d0 <barrier_bool+0xfefd820c>
-80001468:	fe842583          	lw	a1,-24(s0)
-8000146c:	fd042503          	lw	a0,-48(s0)
-80001470:	804ff0ef          	jal	ra,80000474 <vx_spawnWarps>
-80001474:	0200006f          	j	80001494 <vx_e_mat_mult+0xfc>
-80001478:	810267b7          	lui	a5,0x81026
-8000147c:	1e478693          	addi	a3,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-80001480:	800017b7          	lui	a5,0x80001
-80001484:	4d078613          	addi	a2,a5,1232 # 800014d0 <barrier_bool+0xfefd820c>
-80001488:	fcc42583          	lw	a1,-52(s0)
-8000148c:	fd042503          	lw	a0,-48(s0)
-80001490:	fe5fe0ef          	jal	ra,80000474 <vx_spawnWarps>
-80001494:	d61fe0ef          	jal	ra,800001f4 <vx_available_warps>
-80001498:	fea42223          	sw	a0,-28(s0)
-8000149c:	fd042703          	lw	a4,-48(s0)
-800014a0:	fe442783          	lw	a5,-28(s0)
-800014a4:	00e7f863          	bgeu	a5,a4,800014b4 <vx_e_mat_mult+0x11c>
-800014a8:	fe442503          	lw	a0,-28(s0)
-800014ac:	8b8ff0ef          	jal	ra,80000564 <vx_wait_for_warps>
-800014b0:	00c0006f          	j	800014bc <vx_e_mat_mult+0x124>
-800014b4:	fd042503          	lw	a0,-48(s0)
-800014b8:	8acff0ef          	jal	ra,80000564 <vx_wait_for_warps>
-800014bc:	00000013          	nop
-800014c0:	03c12083          	lw	ra,60(sp)
-800014c4:	03812403          	lw	s0,56(sp)
-800014c8:	04010113          	addi	sp,sp,64
-800014cc:	00008067          	ret
+80001394 <vx_e_mat_mult>:
+80001394:	fc010113          	addi	sp,sp,-64
+80001398:	02112e23          	sw	ra,60(sp)
+8000139c:	02812c23          	sw	s0,56(sp)
+800013a0:	04010413          	addi	s0,sp,64
+800013a4:	fca42e23          	sw	a0,-36(s0)
+800013a8:	fcb42c23          	sw	a1,-40(s0)
+800013ac:	fcc42a23          	sw	a2,-44(s0)
+800013b0:	fcd42823          	sw	a3,-48(s0)
+800013b4:	fce42623          	sw	a4,-52(s0)
+800013b8:	810267b7          	lui	a5,0x81026
+800013bc:	fdc42703          	lw	a4,-36(s0)
+800013c0:	1ee7a223          	sw	a4,484(a5) # 810261e4 <barrier_bool+0xffffcf20>
+800013c4:	810267b7          	lui	a5,0x81026
+800013c8:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
+800013cc:	fd842703          	lw	a4,-40(s0)
+800013d0:	00e7a223          	sw	a4,4(a5)
+800013d4:	810267b7          	lui	a5,0x81026
+800013d8:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
+800013dc:	fd442703          	lw	a4,-44(s0)
+800013e0:	00e7a423          	sw	a4,8(a5)
+800013e4:	810267b7          	lui	a5,0x81026
+800013e8:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
+800013ec:	fcc42703          	lw	a4,-52(s0)
+800013f0:	00e7a623          	sw	a4,12(a5)
+800013f4:	810267b7          	lui	a5,0x81026
+800013f8:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
+800013fc:	fd042703          	lw	a4,-48(s0)
+80001400:	00e7a823          	sw	a4,16(a5)
+80001404:	df5fe0ef          	jal	ra,800001f8 <vx_available_threads>
+80001408:	fea42423          	sw	a0,-24(s0)
+8000140c:	fcc42703          	lw	a4,-52(s0)
+80001410:	fe842783          	lw	a5,-24(s0)
+80001414:	02f757b3          	divu	a5,a4,a5
+80001418:	fef42623          	sw	a5,-20(s0)
+8000141c:	fcc42703          	lw	a4,-52(s0)
+80001420:	fe842783          	lw	a5,-24(s0)
+80001424:	02f777b3          	remu	a5,a4,a5
+80001428:	00078863          	beqz	a5,80001438 <vx_e_mat_mult+0xa4>
+8000142c:	fec42783          	lw	a5,-20(s0)
+80001430:	00178793          	addi	a5,a5,1
+80001434:	fef42623          	sw	a5,-20(s0)
+80001438:	810267b7          	lui	a5,0x81026
+8000143c:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
+80001440:	fec42703          	lw	a4,-20(s0)
+80001444:	00e7aa23          	sw	a4,20(a5)
+80001448:	fcc42703          	lw	a4,-52(s0)
+8000144c:	fe842783          	lw	a5,-24(s0)
+80001450:	02f76263          	bltu	a4,a5,80001474 <vx_e_mat_mult+0xe0>
+80001454:	810267b7          	lui	a5,0x81026
+80001458:	1e478693          	addi	a3,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
+8000145c:	800017b7          	lui	a5,0x80001
+80001460:	4cc78613          	addi	a2,a5,1228 # 800014cc <barrier_bool+0xfefd8208>
+80001464:	fe842583          	lw	a1,-24(s0)
+80001468:	fd042503          	lw	a0,-48(s0)
+8000146c:	804ff0ef          	jal	ra,80000470 <vx_spawnWarps>
+80001470:	0200006f          	j	80001490 <vx_e_mat_mult+0xfc>
+80001474:	810267b7          	lui	a5,0x81026
+80001478:	1e478693          	addi	a3,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
+8000147c:	800017b7          	lui	a5,0x80001
+80001480:	4cc78613          	addi	a2,a5,1228 # 800014cc <barrier_bool+0xfefd8208>
+80001484:	fcc42583          	lw	a1,-52(s0)
+80001488:	fd042503          	lw	a0,-48(s0)
+8000148c:	fe5fe0ef          	jal	ra,80000470 <vx_spawnWarps>
+80001490:	d61fe0ef          	jal	ra,800001f0 <vx_available_warps>
+80001494:	fea42223          	sw	a0,-28(s0)
+80001498:	fd042703          	lw	a4,-48(s0)
+8000149c:	fe442783          	lw	a5,-28(s0)
+800014a0:	00e7f863          	bgeu	a5,a4,800014b0 <vx_e_mat_mult+0x11c>
+800014a4:	fe442503          	lw	a0,-28(s0)
+800014a8:	8b8ff0ef          	jal	ra,80000560 <vx_wait_for_warps>
+800014ac:	00c0006f          	j	800014b8 <vx_e_mat_mult+0x124>
+800014b0:	fd042503          	lw	a0,-48(s0)
+800014b4:	8acff0ef          	jal	ra,80000560 <vx_wait_for_warps>
+800014b8:	00000013          	nop
+800014bc:	03c12083          	lw	ra,60(sp)
+800014c0:	03812403          	lw	s0,56(sp)
+800014c4:	04010113          	addi	sp,sp,64
+800014c8:	00008067          	ret
 
-800014d0 <_vx_e_mat_mult>:
-800014d0:	fb010113          	addi	sp,sp,-80
-800014d4:	04112623          	sw	ra,76(sp)
-800014d8:	04812423          	sw	s0,72(sp)
-800014dc:	05010413          	addi	s0,sp,80
-800014e0:	faa42e23          	sw	a0,-68(s0)
-800014e4:	fab42c23          	sw	a1,-72(s0)
-800014e8:	96cff0ef          	jal	ra,80000654 <vx_get_arg_struct>
-800014ec:	fea42023          	sw	a0,-32(s0)
-800014f0:	fe042783          	lw	a5,-32(s0)
-800014f4:	0007a783          	lw	a5,0(a5)
-800014f8:	fcf42e23          	sw	a5,-36(s0)
-800014fc:	fe042783          	lw	a5,-32(s0)
-80001500:	0047a783          	lw	a5,4(a5)
-80001504:	0007a783          	lw	a5,0(a5)
-80001508:	fcf42c23          	sw	a5,-40(s0)
-8000150c:	fe042783          	lw	a5,-32(s0)
-80001510:	0087a783          	lw	a5,8(a5)
-80001514:	fcf42a23          	sw	a5,-44(s0)
-80001518:	fe042783          	lw	a5,-32(s0)
-8000151c:	0147a783          	lw	a5,20(a5)
-80001520:	fef42623          	sw	a5,-20(s0)
-80001524:	fec42703          	lw	a4,-20(s0)
-80001528:	fbc42783          	lw	a5,-68(s0)
-8000152c:	02f707b3          	mul	a5,a4,a5
-80001530:	fef42423          	sw	a5,-24(s0)
-80001534:	fec42783          	lw	a5,-20(s0)
-80001538:	00079a63          	bnez	a5,8000154c <_vx_e_mat_mult+0x7c>
-8000153c:	00100793          	li	a5,1
-80001540:	fef42623          	sw	a5,-20(s0)
-80001544:	fbc42783          	lw	a5,-68(s0)
-80001548:	fef42423          	sw	a5,-24(s0)
-8000154c:	fe042783          	lw	a5,-32(s0)
-80001550:	00c7a783          	lw	a5,12(a5)
-80001554:	fcf42823          	sw	a5,-48(s0)
-80001558:	fe042223          	sw	zero,-28(s0)
-8000155c:	0b00006f          	j	8000160c <_vx_e_mat_mult+0x13c>
-80001560:	fb842703          	lw	a4,-72(s0)
-80001564:	fd042783          	lw	a5,-48(s0)
-80001568:	02f70733          	mul	a4,a4,a5
-8000156c:	fe842783          	lw	a5,-24(s0)
-80001570:	00f707b3          	add	a5,a4,a5
-80001574:	fcf42623          	sw	a5,-52(s0)
-80001578:	fe842703          	lw	a4,-24(s0)
-8000157c:	fd042783          	lw	a5,-48(s0)
-80001580:	00f737b3          	sltu	a5,a4,a5
-80001584:	0ff7f793          	andi	a5,a5,255
-80001588:	fcf42423          	sw	a5,-56(s0)
-8000158c:	fc842783          	lw	a5,-56(s0)
-80001590:	0017b793          	seqz	a5,a5
-80001594:	fcf403a3          	sb	a5,-57(s0)
-80001598:	fc744783          	lbu	a5,-57(s0)
-8000159c:	00078f13          	mv	t5,a5
-800015a0:	800017b7          	lui	a5,0x80001
-800015a4:	5f878f93          	addi	t6,a5,1528 # 800015f8 <barrier_bool+0xfefd8334>
-800015a8:	000f206b          	0xf206b
-800015ac:	01ff707b          	0x1ff707b
-800015b0:	fcc42783          	lw	a5,-52(s0)
-800015b4:	00279793          	slli	a5,a5,0x2
-800015b8:	fdc42703          	lw	a4,-36(s0)
-800015bc:	00f707b3          	add	a5,a4,a5
-800015c0:	0007a683          	lw	a3,0(a5)
-800015c4:	fcc42783          	lw	a5,-52(s0)
-800015c8:	00279793          	slli	a5,a5,0x2
-800015cc:	fd442703          	lw	a4,-44(s0)
-800015d0:	00f707b3          	add	a5,a4,a5
-800015d4:	fd842703          	lw	a4,-40(s0)
-800015d8:	02e68733          	mul	a4,a3,a4
-800015dc:	00e7a023          	sw	a4,0(a5)
-800015e0:	fe842783          	lw	a5,-24(s0)
-800015e4:	00178793          	addi	a5,a5,1
-800015e8:	fef42423          	sw	a5,-24(s0)
-800015ec:	800017b7          	lui	a5,0x80001
-800015f0:	5fc78e13          	addi	t3,a5,1532 # 800015fc <barrier_bool+0xfefd8338>
-800015f4:	000e0067          	jr	t3
-800015f8:	00000013          	nop
-800015fc:	0000306b          	0x306b
-80001600:	fe442783          	lw	a5,-28(s0)
-80001604:	00178793          	addi	a5,a5,1
-80001608:	fef42223          	sw	a5,-28(s0)
-8000160c:	fe442783          	lw	a5,-28(s0)
-80001610:	fec42703          	lw	a4,-20(s0)
-80001614:	f4e7e6e3          	bltu	a5,a4,80001560 <_vx_e_mat_mult+0x90>
-80001618:	00000013          	nop
-8000161c:	04c12083          	lw	ra,76(sp)
-80001620:	04812403          	lw	s0,72(sp)
-80001624:	05010113          	addi	sp,sp,80
-80001628:	00008067          	ret
+800014cc <_vx_e_mat_mult>:
+800014cc:	fb010113          	addi	sp,sp,-80
+800014d0:	04112623          	sw	ra,76(sp)
+800014d4:	04812423          	sw	s0,72(sp)
+800014d8:	05010413          	addi	s0,sp,80
+800014dc:	faa42e23          	sw	a0,-68(s0)
+800014e0:	fab42c23          	sw	a1,-72(s0)
+800014e4:	96cff0ef          	jal	ra,80000650 <vx_get_arg_struct>
+800014e8:	fea42023          	sw	a0,-32(s0)
+800014ec:	fe042783          	lw	a5,-32(s0)
+800014f0:	0007a783          	lw	a5,0(a5)
+800014f4:	fcf42e23          	sw	a5,-36(s0)
+800014f8:	fe042783          	lw	a5,-32(s0)
+800014fc:	0047a783          	lw	a5,4(a5)
+80001500:	0007a783          	lw	a5,0(a5)
+80001504:	fcf42c23          	sw	a5,-40(s0)
+80001508:	fe042783          	lw	a5,-32(s0)
+8000150c:	0087a783          	lw	a5,8(a5)
+80001510:	fcf42a23          	sw	a5,-44(s0)
+80001514:	fe042783          	lw	a5,-32(s0)
+80001518:	0147a783          	lw	a5,20(a5)
+8000151c:	fef42623          	sw	a5,-20(s0)
+80001520:	fec42703          	lw	a4,-20(s0)
+80001524:	fbc42783          	lw	a5,-68(s0)
+80001528:	02f707b3          	mul	a5,a4,a5
+8000152c:	fef42423          	sw	a5,-24(s0)
+80001530:	fec42783          	lw	a5,-20(s0)
+80001534:	00079a63          	bnez	a5,80001548 <_vx_e_mat_mult+0x7c>
+80001538:	00100793          	li	a5,1
+8000153c:	fef42623          	sw	a5,-20(s0)
+80001540:	fbc42783          	lw	a5,-68(s0)
+80001544:	fef42423          	sw	a5,-24(s0)
+80001548:	fe042783          	lw	a5,-32(s0)
+8000154c:	00c7a783          	lw	a5,12(a5)
+80001550:	fcf42823          	sw	a5,-48(s0)
+80001554:	fe042223          	sw	zero,-28(s0)
+80001558:	0b00006f          	j	80001608 <_vx_e_mat_mult+0x13c>
+8000155c:	fb842703          	lw	a4,-72(s0)
+80001560:	fd042783          	lw	a5,-48(s0)
+80001564:	02f70733          	mul	a4,a4,a5
+80001568:	fe842783          	lw	a5,-24(s0)
+8000156c:	00f707b3          	add	a5,a4,a5
+80001570:	fcf42623          	sw	a5,-52(s0)
+80001574:	fe842703          	lw	a4,-24(s0)
+80001578:	fd042783          	lw	a5,-48(s0)
+8000157c:	00f737b3          	sltu	a5,a4,a5
+80001580:	0ff7f793          	andi	a5,a5,255
+80001584:	fcf42423          	sw	a5,-56(s0)
+80001588:	fc842783          	lw	a5,-56(s0)
+8000158c:	0017b793          	seqz	a5,a5
+80001590:	fcf403a3          	sb	a5,-57(s0)
+80001594:	fc744783          	lbu	a5,-57(s0)
+80001598:	00078f13          	mv	t5,a5
+8000159c:	800017b7          	lui	a5,0x80001
+800015a0:	5f478f93          	addi	t6,a5,1524 # 800015f4 <barrier_bool+0xfefd8330>
+800015a4:	000f206b          	0xf206b
+800015a8:	01ff707b          	0x1ff707b
+800015ac:	fcc42783          	lw	a5,-52(s0)
+800015b0:	00279793          	slli	a5,a5,0x2
+800015b4:	fdc42703          	lw	a4,-36(s0)
+800015b8:	00f707b3          	add	a5,a4,a5
+800015bc:	0007a683          	lw	a3,0(a5)
+800015c0:	fcc42783          	lw	a5,-52(s0)
+800015c4:	00279793          	slli	a5,a5,0x2
+800015c8:	fd442703          	lw	a4,-44(s0)
+800015cc:	00f707b3          	add	a5,a4,a5
+800015d0:	fd842703          	lw	a4,-40(s0)
+800015d4:	02e68733          	mul	a4,a3,a4
+800015d8:	00e7a023          	sw	a4,0(a5)
+800015dc:	fe842783          	lw	a5,-24(s0)
+800015e0:	00178793          	addi	a5,a5,1
+800015e4:	fef42423          	sw	a5,-24(s0)
+800015e8:	800017b7          	lui	a5,0x80001
+800015ec:	5f878e13          	addi	t3,a5,1528 # 800015f8 <barrier_bool+0xfefd8334>
+800015f0:	000e0067          	jr	t3
+800015f4:	00000013          	nop
+800015f8:	0000306b          	0x306b
+800015fc:	fe442783          	lw	a5,-28(s0)
+80001600:	00178793          	addi	a5,a5,1
+80001604:	fef42223          	sw	a5,-28(s0)
+80001608:	fe442783          	lw	a5,-28(s0)
+8000160c:	fec42703          	lw	a4,-20(s0)
+80001610:	f4e7e6e3          	bltu	a5,a4,8000155c <_vx_e_mat_mult+0x90>
+80001614:	00000013          	nop
+80001618:	04c12083          	lw	ra,76(sp)
+8000161c:	04812403          	lw	s0,72(sp)
+80001620:	05010113          	addi	sp,sp,80
+80001624:	00008067          	ret
 
-8000162c <sleep>:
-8000162c:	fd010113          	addi	sp,sp,-48
-80001630:	02812623          	sw	s0,44(sp)
-80001634:	03010413          	addi	s0,sp,48
-80001638:	fca42e23          	sw	a0,-36(s0)
-8000163c:	fe042623          	sw	zero,-20(s0)
-80001640:	0100006f          	j	80001650 <sleep+0x24>
-80001644:	fec42783          	lw	a5,-20(s0)
-80001648:	00178793          	addi	a5,a5,1
-8000164c:	fef42623          	sw	a5,-20(s0)
-80001650:	fec42703          	lw	a4,-20(s0)
-80001654:	fdc42783          	lw	a5,-36(s0)
-80001658:	fef746e3          	blt	a4,a5,80001644 <sleep+0x18>
-8000165c:	00000013          	nop
-80001660:	02c12403          	lw	s0,44(sp)
-80001664:	03010113          	addi	sp,sp,48
-80001668:	00008067          	ret
+80001628 <sleep>:
+80001628:	fd010113          	addi	sp,sp,-48
+8000162c:	02812623          	sw	s0,44(sp)
+80001630:	03010413          	addi	s0,sp,48
+80001634:	fca42e23          	sw	a0,-36(s0)
+80001638:	fe042623          	sw	zero,-20(s0)
+8000163c:	0100006f          	j	8000164c <sleep+0x24>
+80001640:	fec42783          	lw	a5,-20(s0)
+80001644:	00178793          	addi	a5,a5,1
+80001648:	fef42623          	sw	a5,-20(s0)
+8000164c:	fec42703          	lw	a4,-20(s0)
+80001650:	fdc42783          	lw	a5,-36(s0)
+80001654:	fef746e3          	blt	a4,a5,80001640 <sleep+0x18>
+80001658:	00000013          	nop
+8000165c:	02c12403          	lw	s0,44(sp)
+80001660:	03010113          	addi	sp,sp,48
+80001664:	00008067          	ret
 
-8000166c <barrier>:
-8000166c:	fd010113          	addi	sp,sp,-48
-80001670:	02112623          	sw	ra,44(sp)
-80001674:	02812423          	sw	s0,40(sp)
-80001678:	03010413          	addi	s0,sp,48
-8000167c:	fca42e23          	sw	a0,-36(s0)
-80001680:	fcb42c23          	sw	a1,-40(s0)
-80001684:	810267b7          	lui	a5,0x81026
-80001688:	1fc78713          	addi	a4,a5,508 # 810261fc <barrier_bool+0xffffcf38>
-8000168c:	fdc42783          	lw	a5,-36(s0)
-80001690:	00f707b3          	add	a5,a4,a5
-80001694:	00100713          	li	a4,1
-80001698:	00e78023          	sb	a4,0(a5)
-8000169c:	fdc42783          	lw	a5,-36(s0)
-800016a0:	0c079063          	bnez	a5,80001760 <barrier+0xf4>
-800016a4:	fe0401a3          	sb	zero,-29(s0)
-800016a8:	fe042623          	sw	zero,-20(s0)
-800016ac:	0a80006f          	j	80001754 <barrier+0xe8>
-800016b0:	fe042623          	sw	zero,-20(s0)
-800016b4:	fe042423          	sw	zero,-24(s0)
-800016b8:	0340006f          	j	800016ec <barrier+0x80>
-800016bc:	810267b7          	lui	a5,0x81026
-800016c0:	1fc78713          	addi	a4,a5,508 # 810261fc <barrier_bool+0xffffcf38>
-800016c4:	fe842783          	lw	a5,-24(s0)
-800016c8:	00f707b3          	add	a5,a4,a5
-800016cc:	0007c783          	lbu	a5,0(a5)
-800016d0:	00078863          	beqz	a5,800016e0 <barrier+0x74>
-800016d4:	fec42783          	lw	a5,-20(s0)
-800016d8:	00178793          	addi	a5,a5,1
-800016dc:	fef42623          	sw	a5,-20(s0)
-800016e0:	fe842783          	lw	a5,-24(s0)
-800016e4:	00178793          	addi	a5,a5,1
-800016e8:	fef42423          	sw	a5,-24(s0)
-800016ec:	fe842703          	lw	a4,-24(s0)
-800016f0:	fd842783          	lw	a5,-40(s0)
-800016f4:	fcf744e3          	blt	a4,a5,800016bc <barrier+0x50>
-800016f8:	fec42703          	lw	a4,-20(s0)
-800016fc:	fd842783          	lw	a5,-40(s0)
-80001700:	04f71a63          	bne	a4,a5,80001754 <barrier+0xe8>
-80001704:	fe042223          	sw	zero,-28(s0)
-80001708:	0400006f          	j	80001748 <barrier+0xdc>
-8000170c:	810267b7          	lui	a5,0x81026
-80001710:	1fc78713          	addi	a4,a5,508 # 810261fc <barrier_bool+0xffffcf38>
-80001714:	fe442783          	lw	a5,-28(s0)
-80001718:	00f707b3          	add	a5,a4,a5
-8000171c:	00078023          	sb	zero,0(a5)
-80001720:	810297b7          	lui	a5,0x81029
-80001724:	00100713          	li	a4,1
-80001728:	2ce78223          	sb	a4,708(a5) # 810292c4 <barrier_bool+0x0>
-8000172c:	04600513          	li	a0,70
-80001730:	efdff0ef          	jal	ra,8000162c <sleep>
-80001734:	810297b7          	lui	a5,0x81029
-80001738:	2c078223          	sb	zero,708(a5) # 810292c4 <barrier_bool+0x0>
-8000173c:	fe442783          	lw	a5,-28(s0)
-80001740:	00178793          	addi	a5,a5,1
-80001744:	fef42223          	sw	a5,-28(s0)
-80001748:	fe442703          	lw	a4,-28(s0)
-8000174c:	fd842783          	lw	a5,-40(s0)
-80001750:	faf74ee3          	blt	a4,a5,8000170c <barrier+0xa0>
-80001754:	fe344783          	lbu	a5,-29(s0)
-80001758:	f4079ce3          	bnez	a5,800016b0 <barrier+0x44>
-8000175c:	0240006f          	j	80001780 <barrier+0x114>
-80001760:	00000013          	nop
-80001764:	810297b7          	lui	a5,0x81029
-80001768:	2c47c783          	lbu	a5,708(a5) # 810292c4 <barrier_bool+0x0>
-8000176c:	0017c793          	xori	a5,a5,1
-80001770:	0ff7f793          	andi	a5,a5,255
-80001774:	fe0798e3          	bnez	a5,80001764 <barrier+0xf8>
-80001778:	06400513          	li	a0,100
-8000177c:	eb1ff0ef          	jal	ra,8000162c <sleep>
-80001780:	00000013          	nop
-80001784:	02c12083          	lw	ra,44(sp)
-80001788:	02812403          	lw	s0,40(sp)
-8000178c:	03010113          	addi	sp,sp,48
-80001790:	00008067          	ret
+80001668 <barrier>:
+80001668:	fd010113          	addi	sp,sp,-48
+8000166c:	02112623          	sw	ra,44(sp)
+80001670:	02812423          	sw	s0,40(sp)
+80001674:	03010413          	addi	s0,sp,48
+80001678:	fca42e23          	sw	a0,-36(s0)
+8000167c:	fcb42c23          	sw	a1,-40(s0)
+80001680:	810267b7          	lui	a5,0x81026
+80001684:	1fc78713          	addi	a4,a5,508 # 810261fc <barrier_bool+0xffffcf38>
+80001688:	fdc42783          	lw	a5,-36(s0)
+8000168c:	00f707b3          	add	a5,a4,a5
+80001690:	00100713          	li	a4,1
+80001694:	00e78023          	sb	a4,0(a5)
+80001698:	fdc42783          	lw	a5,-36(s0)
+8000169c:	0c079063          	bnez	a5,8000175c <barrier+0xf4>
+800016a0:	fe0401a3          	sb	zero,-29(s0)
+800016a4:	fe042623          	sw	zero,-20(s0)
+800016a8:	0a80006f          	j	80001750 <barrier+0xe8>
+800016ac:	fe042623          	sw	zero,-20(s0)
+800016b0:	fe042423          	sw	zero,-24(s0)
+800016b4:	0340006f          	j	800016e8 <barrier+0x80>
+800016b8:	810267b7          	lui	a5,0x81026
+800016bc:	1fc78713          	addi	a4,a5,508 # 810261fc <barrier_bool+0xffffcf38>
+800016c0:	fe842783          	lw	a5,-24(s0)
+800016c4:	00f707b3          	add	a5,a4,a5
+800016c8:	0007c783          	lbu	a5,0(a5)
+800016cc:	00078863          	beqz	a5,800016dc <barrier+0x74>
+800016d0:	fec42783          	lw	a5,-20(s0)
+800016d4:	00178793          	addi	a5,a5,1
+800016d8:	fef42623          	sw	a5,-20(s0)
+800016dc:	fe842783          	lw	a5,-24(s0)
+800016e0:	00178793          	addi	a5,a5,1
+800016e4:	fef42423          	sw	a5,-24(s0)
+800016e8:	fe842703          	lw	a4,-24(s0)
+800016ec:	fd842783          	lw	a5,-40(s0)
+800016f0:	fcf744e3          	blt	a4,a5,800016b8 <barrier+0x50>
+800016f4:	fec42703          	lw	a4,-20(s0)
+800016f8:	fd842783          	lw	a5,-40(s0)
+800016fc:	04f71a63          	bne	a4,a5,80001750 <barrier+0xe8>
+80001700:	fe042223          	sw	zero,-28(s0)
+80001704:	0400006f          	j	80001744 <barrier+0xdc>
+80001708:	810267b7          	lui	a5,0x81026
+8000170c:	1fc78713          	addi	a4,a5,508 # 810261fc <barrier_bool+0xffffcf38>
+80001710:	fe442783          	lw	a5,-28(s0)
+80001714:	00f707b3          	add	a5,a4,a5
+80001718:	00078023          	sb	zero,0(a5)
+8000171c:	810297b7          	lui	a5,0x81029
+80001720:	00100713          	li	a4,1
+80001724:	2ce78223          	sb	a4,708(a5) # 810292c4 <barrier_bool+0x0>
+80001728:	04600513          	li	a0,70
+8000172c:	efdff0ef          	jal	ra,80001628 <sleep>
+80001730:	810297b7          	lui	a5,0x81029
+80001734:	2c078223          	sb	zero,708(a5) # 810292c4 <barrier_bool+0x0>
+80001738:	fe442783          	lw	a5,-28(s0)
+8000173c:	00178793          	addi	a5,a5,1
+80001740:	fef42223          	sw	a5,-28(s0)
+80001744:	fe442703          	lw	a4,-28(s0)
+80001748:	fd842783          	lw	a5,-40(s0)
+8000174c:	faf74ee3          	blt	a4,a5,80001708 <barrier+0xa0>
+80001750:	fe344783          	lbu	a5,-29(s0)
+80001754:	f4079ce3          	bnez	a5,800016ac <barrier+0x44>
+80001758:	0240006f          	j	8000177c <barrier+0x114>
+8000175c:	00000013          	nop
+80001760:	810297b7          	lui	a5,0x81029
+80001764:	2c47c783          	lbu	a5,708(a5) # 810292c4 <barrier_bool+0x0>
+80001768:	0017c793          	xori	a5,a5,1
+8000176c:	0ff7f793          	andi	a5,a5,255
+80001770:	fe0798e3          	bnez	a5,80001760 <barrier+0xf8>
+80001774:	06400513          	li	a0,100
+80001778:	eb1ff0ef          	jal	ra,80001628 <sleep>
+8000177c:	00000013          	nop
+80001780:	02c12083          	lw	ra,44(sp)
+80001784:	02812403          	lw	s0,40(sp)
+80001788:	03010113          	addi	sp,sp,48
+8000178c:	00008067          	ret
 
-80001794 <sc_time_stamp>:
-80001794:	ff010113          	addi	sp,sp,-16
-80001798:	00812623          	sw	s0,12(sp)
-8000179c:	01010413          	addi	s0,sp,16
-800017a0:	00000793          	li	a5,0
-800017a4:	00000813          	li	a6,0
-800017a8:	00078513          	mv	a0,a5
-800017ac:	00080593          	mv	a1,a6
-800017b0:	00c12403          	lw	s0,12(sp)
-800017b4:	01010113          	addi	sp,sp,16
-800017b8:	00008067          	ret
+80001790 <sc_time_stamp>:
+80001790:	ff010113          	addi	sp,sp,-16
+80001794:	00812623          	sw	s0,12(sp)
+80001798:	01010413          	addi	s0,sp,16
+8000179c:	00000793          	li	a5,0
+800017a0:	00000813          	li	a6,0
+800017a4:	00078513          	mv	a0,a5
+800017a8:	00080593          	mv	a1,a6
+800017ac:	00c12403          	lw	s0,12(sp)
+800017b0:	01010113          	addi	sp,sp,16
+800017b4:	00008067          	ret
 
-800017bc <initialize_mats>:
-800017bc:	fe010113          	addi	sp,sp,-32
-800017c0:	00812e23          	sw	s0,28(sp)
-800017c4:	02010413          	addi	s0,sp,32
-800017c8:	fe042623          	sw	zero,-20(s0)
-800017cc:	0480006f          	j	80001814 <initialize_mats+0x58>
-800017d0:	810267b7          	lui	a5,0x81026
-800017d4:	fec42703          	lw	a4,-20(s0)
-800017d8:	00271713          	slli	a4,a4,0x2
-800017dc:	21c78793          	addi	a5,a5,540 # 8102621c <barrier_bool+0xffffcf58>
-800017e0:	00f707b3          	add	a5,a4,a5
-800017e4:	00300713          	li	a4,3
-800017e8:	00e7a023          	sw	a4,0(a5)
-800017ec:	810277b7          	lui	a5,0x81027
-800017f0:	fec42703          	lw	a4,-20(s0)
-800017f4:	00271713          	slli	a4,a4,0x2
-800017f8:	21c78793          	addi	a5,a5,540 # 8102721c <barrier_bool+0xffffdf58>
-800017fc:	00f707b3          	add	a5,a4,a5
-80001800:	00200713          	li	a4,2
-80001804:	00e7a023          	sw	a4,0(a5)
-80001808:	fec42783          	lw	a5,-20(s0)
-8000180c:	00178793          	addi	a5,a5,1
-80001810:	fef42623          	sw	a5,-20(s0)
-80001814:	fec42703          	lw	a4,-20(s0)
-80001818:	0ff00793          	li	a5,255
-8000181c:	fae7dae3          	bge	a5,a4,800017d0 <initialize_mats+0x14>
-80001820:	00000013          	nop
-80001824:	01c12403          	lw	s0,28(sp)
-80001828:	02010113          	addi	sp,sp,32
-8000182c:	00008067          	ret
+800017b8 <initialize_mats>:
+800017b8:	fe010113          	addi	sp,sp,-32
+800017bc:	00812e23          	sw	s0,28(sp)
+800017c0:	02010413          	addi	s0,sp,32
+800017c4:	fe042623          	sw	zero,-20(s0)
+800017c8:	0480006f          	j	80001810 <initialize_mats+0x58>
+800017cc:	810267b7          	lui	a5,0x81026
+800017d0:	fec42703          	lw	a4,-20(s0)
+800017d4:	00271713          	slli	a4,a4,0x2
+800017d8:	21c78793          	addi	a5,a5,540 # 8102621c <barrier_bool+0xffffcf58>
+800017dc:	00f707b3          	add	a5,a4,a5
+800017e0:	00300713          	li	a4,3
+800017e4:	00e7a023          	sw	a4,0(a5)
+800017e8:	810277b7          	lui	a5,0x81027
+800017ec:	fec42703          	lw	a4,-20(s0)
+800017f0:	00271713          	slli	a4,a4,0x2
+800017f4:	21c78793          	addi	a5,a5,540 # 8102721c <barrier_bool+0xffffdf58>
+800017f8:	00f707b3          	add	a5,a4,a5
+800017fc:	00200713          	li	a4,2
+80001800:	00e7a023          	sw	a4,0(a5)
+80001804:	fec42783          	lw	a5,-20(s0)
+80001808:	00178793          	addi	a5,a5,1
+8000180c:	fef42623          	sw	a5,-20(s0)
+80001810:	fec42703          	lw	a4,-20(s0)
+80001814:	0ff00793          	li	a5,255
+80001818:	fae7dae3          	bge	a5,a4,800017cc <initialize_mats+0x14>
+8000181c:	00000013          	nop
+80001820:	01c12403          	lw	s0,28(sp)
+80001824:	02010113          	addi	sp,sp,32
+80001828:	00008067          	ret
 
-80001830 <print_matrix>:
-80001830:	fd010113          	addi	sp,sp,-48
-80001834:	02112623          	sw	ra,44(sp)
-80001838:	02812423          	sw	s0,40(sp)
-8000183c:	03010413          	addi	s0,sp,48
-80001840:	fca42e23          	sw	a0,-36(s0)
-80001844:	810007b7          	lui	a5,0x81000
-80001848:	11878513          	addi	a0,a5,280 # 81000118 <barrier_bool+0xfffd6e54>
-8000184c:	f8dfe0ef          	jal	ra,800007d8 <vx_print_str>
-80001850:	fe042623          	sw	zero,-20(s0)
-80001854:	0580006f          	j	800018ac <print_matrix+0x7c>
-80001858:	fec42783          	lw	a5,-20(s0)
-8000185c:	00078e63          	beqz	a5,80001878 <print_matrix+0x48>
-80001860:	fec42783          	lw	a5,-20(s0)
-80001864:	00f7f793          	andi	a5,a5,15
-80001868:	00079863          	bnez	a5,80001878 <print_matrix+0x48>
-8000186c:	810007b7          	lui	a5,0x81000
-80001870:	13c78513          	addi	a0,a5,316 # 8100013c <barrier_bool+0xfffd6e78>
-80001874:	f65fe0ef          	jal	ra,800007d8 <vx_print_str>
-80001878:	fec42783          	lw	a5,-20(s0)
-8000187c:	00279793          	slli	a5,a5,0x2
-80001880:	fdc42703          	lw	a4,-36(s0)
-80001884:	00f707b3          	add	a5,a4,a5
-80001888:	0007a783          	lw	a5,0(a5)
-8000188c:	00078513          	mv	a0,a5
-80001890:	f85fe0ef          	jal	ra,80000814 <vx_print_hex>
-80001894:	810007b7          	lui	a5,0x81000
-80001898:	14078513          	addi	a0,a5,320 # 81000140 <barrier_bool+0xfffd6e7c>
-8000189c:	f3dfe0ef          	jal	ra,800007d8 <vx_print_str>
-800018a0:	fec42783          	lw	a5,-20(s0)
-800018a4:	00178793          	addi	a5,a5,1
-800018a8:	fef42623          	sw	a5,-20(s0)
-800018ac:	fec42703          	lw	a4,-20(s0)
-800018b0:	0ff00793          	li	a5,255
-800018b4:	fae7d2e3          	bge	a5,a4,80001858 <print_matrix+0x28>
-800018b8:	810007b7          	lui	a5,0x81000
-800018bc:	14478513          	addi	a0,a5,324 # 81000144 <barrier_bool+0xfffd6e80>
-800018c0:	f19fe0ef          	jal	ra,800007d8 <vx_print_str>
-800018c4:	00000013          	nop
-800018c8:	02c12083          	lw	ra,44(sp)
-800018cc:	02812403          	lw	s0,40(sp)
-800018d0:	03010113          	addi	sp,sp,48
-800018d4:	00008067          	ret
+8000182c <print_matrix>:
+8000182c:	fd010113          	addi	sp,sp,-48
+80001830:	02112623          	sw	ra,44(sp)
+80001834:	02812423          	sw	s0,40(sp)
+80001838:	03010413          	addi	s0,sp,48
+8000183c:	fca42e23          	sw	a0,-36(s0)
+80001840:	810007b7          	lui	a5,0x81000
+80001844:	11878513          	addi	a0,a5,280 # 81000118 <barrier_bool+0xfffd6e54>
+80001848:	f8dfe0ef          	jal	ra,800007d4 <vx_print_str>
+8000184c:	fe042623          	sw	zero,-20(s0)
+80001850:	0580006f          	j	800018a8 <print_matrix+0x7c>
+80001854:	fec42783          	lw	a5,-20(s0)
+80001858:	00078e63          	beqz	a5,80001874 <print_matrix+0x48>
+8000185c:	fec42783          	lw	a5,-20(s0)
+80001860:	00f7f793          	andi	a5,a5,15
+80001864:	00079863          	bnez	a5,80001874 <print_matrix+0x48>
+80001868:	810007b7          	lui	a5,0x81000
+8000186c:	13c78513          	addi	a0,a5,316 # 8100013c <barrier_bool+0xfffd6e78>
+80001870:	f65fe0ef          	jal	ra,800007d4 <vx_print_str>
+80001874:	fec42783          	lw	a5,-20(s0)
+80001878:	00279793          	slli	a5,a5,0x2
+8000187c:	fdc42703          	lw	a4,-36(s0)
+80001880:	00f707b3          	add	a5,a4,a5
+80001884:	0007a783          	lw	a5,0(a5)
+80001888:	00078513          	mv	a0,a5
+8000188c:	f85fe0ef          	jal	ra,80000810 <vx_print_hex>
+80001890:	810007b7          	lui	a5,0x81000
+80001894:	14078513          	addi	a0,a5,320 # 81000140 <barrier_bool+0xfffd6e7c>
+80001898:	f3dfe0ef          	jal	ra,800007d4 <vx_print_str>
+8000189c:	fec42783          	lw	a5,-20(s0)
+800018a0:	00178793          	addi	a5,a5,1
+800018a4:	fef42623          	sw	a5,-20(s0)
+800018a8:	fec42703          	lw	a4,-20(s0)
+800018ac:	0ff00793          	li	a5,255
+800018b0:	fae7d2e3          	bge	a5,a4,80001854 <print_matrix+0x28>
+800018b4:	810007b7          	lui	a5,0x81000
+800018b8:	14478513          	addi	a0,a5,324 # 81000144 <barrier_bool+0xfffd6e80>
+800018bc:	f19fe0ef          	jal	ra,800007d4 <vx_print_str>
+800018c0:	00000013          	nop
+800018c4:	02c12083          	lw	ra,44(sp)
+800018c8:	02812403          	lw	s0,40(sp)
+800018cc:	03010113          	addi	sp,sp,48
+800018d0:	00008067          	ret
 
-800018d8 <main>:
-800018d8:	ff010113          	addi	sp,sp,-16
-800018dc:	00112623          	sw	ra,12(sp)
-800018e0:	00812423          	sw	s0,8(sp)
-800018e4:	01010413          	addi	s0,sp,16
-800018e8:	ed5ff0ef          	jal	ra,800017bc <initialize_mats>
-800018ec:	810267b7          	lui	a5,0x81026
-800018f0:	21c78513          	addi	a0,a5,540 # 8102621c <barrier_bool+0xffffcf58>
-800018f4:	f3dff0ef          	jal	ra,80001830 <print_matrix>
-800018f8:	00000793          	li	a5,0
-800018fc:	00078513          	mv	a0,a5
-80001900:	00c12083          	lw	ra,12(sp)
-80001904:	00812403          	lw	s0,8(sp)
-80001908:	01010113          	addi	sp,sp,16
-8000190c:	00008067          	ret
+800018d4 <main>:
+800018d4:	ff010113          	addi	sp,sp,-16
+800018d8:	00112623          	sw	ra,12(sp)
+800018dc:	00812423          	sw	s0,8(sp)
+800018e0:	01010413          	addi	s0,sp,16
+800018e4:	ed5ff0ef          	jal	ra,800017b8 <initialize_mats>
+800018e8:	810267b7          	lui	a5,0x81026
+800018ec:	21c78513          	addi	a0,a5,540 # 8102621c <barrier_bool+0xffffcf58>
+800018f0:	f3dff0ef          	jal	ra,8000182c <print_matrix>
+800018f4:	00000793          	li	a5,0
+800018f8:	00078513          	mv	a0,a5
+800018fc:	00c12083          	lw	ra,12(sp)
+80001900:	00812403          	lw	s0,8(sp)
+80001904:	01010113          	addi	sp,sp,16
+80001908:	00008067          	ret
 
 Disassembly of section .rodata:
 
@@ -1733,7 +1732,7 @@ Disassembly of section .rodata:
 8100002a:	0000                	unimp
 8100002c:	0062                	c.slli	zero,0x18
 8100002e:	0000                	unimp
-81000030:	00000063          	beqz	zero,81000030 <main+0xffe758>
+81000030:	00000063          	beqz	zero,81000030 <main+0xffe75c>
 81000034:	0064                	addi	s1,sp,12
 81000036:	0000                	unimp
 81000038:	0065                	c.nop	25
@@ -1770,7 +1769,7 @@ Disassembly of section .rodata:
 8100007e:	0000                	unimp
 81000080:	0062                	c.slli	zero,0x18
 81000082:	0000                	unimp
-81000084:	00000063          	beqz	zero,81000084 <main+0xffe7ac>
+81000084:	00000063          	beqz	zero,81000084 <main+0xffe7b0>
 81000088:	0064                	addi	s1,sp,12
 8100008a:	0000                	unimp
 8100008c:	0065                	c.nop	25
@@ -1801,7 +1800,7 @@ Disassembly of section .rodata:
 810000c2:	0000                	unimp
 810000c4:	0062                	c.slli	zero,0x18
 810000c6:	0000                	unimp
-810000c8:	00000063          	beqz	zero,810000c8 <main+0xffe7f0>
+810000c8:	00000063          	beqz	zero,810000c8 <main+0xffe7f4>
 810000cc:	0064                	addi	s1,sp,12
 810000ce:	0000                	unimp
 810000d0:	0065                	c.nop	25
@@ -1830,7 +1829,7 @@ Disassembly of section .rodata:
 81000102:	0000                	unimp
 81000104:	0062                	c.slli	zero,0x18
 81000106:	0000                	unimp
-81000108:	00000063          	beqz	zero,81000108 <main+0xffe830>
+81000108:	00000063          	beqz	zero,81000108 <main+0xffe834>
 8100010c:	0064                	addi	s1,sp,12
 8100010e:	0000                	unimp
 81000110:	0065                	c.nop	25
diff --git a/kernel/vortex_test.elf b/kernel/vortex_test.elf
index 150ec2eed9a04a63a1e1373e1ef51f16f1a42d43..8a81bd4b8b2a45ba1c3ea12ec86dbf9c60d73324 100755
GIT binary patch
delta 1020
zcmZvZUr19?9LLW&o4ZOgokeSDo0nb12g8OoZ!BttwAtU8L?)68qV_P#%7-#&R|@At
zlyL_25Eaowy##Rsedxh3@I_K<L7<QnJ@gPQlrYNZd+o?Q58apF{rrBv@9*Eq_2>GB
zTZ`O2Lfp^VM#~&UjPT;}H;id~uKWgLm1f#=rkE;x))%0P`O9~ksoANkHP`+)YMjg8
z3OAR}62eAKvjILhQ8nTv#=60*X;xKIHt~^9Z|-8sC!P$d{DA+nn*AvW-~Lb75wL`A
z-dhb}>5A}cHH1M)_{0{*{Hq-o)Bt5l7#(Z*>zYy?3wmkH><KC;x1XmpKa4q~`6-L_
zh$M|=d(a_bHq_3P+!}U1-0Em)BE%poA0=^EUE;&wgv8z89TJ}c$9YR*CiL57S9xc7
z6`S9KA4oh4e!;&t20ZhU*G~yq<Z9E0Py)5;kW)b@>4SGnbhP*ico-*Njb8`1^3b+G
zW)$8&p=xLN@eo5t)KWc#t=mA1sE9uYSCtS$6Y+7_J7vU337&$zC^oY6^WXygw~@sQ
z;Av?p2O}BcEVdI$F+hqDV@@<w!M#pm6a+U|10tRhyc3*<-g*G5LEO?~;5so-0<2dM
zqg(KC@FQ_ND?iQn!ElAA93@_f5|@#Z<mbW-p}ds1*MWPku`hEUSxzaw9h~Pg;ax4s
zwRYAxyqdIc9y}(gzJP}${sE5i_U6EeCFyFL&^uXVAE6#Rx!ztX0=_F<y$!tNwqNB4
zxPBus9*YgPfOCANIqJI9*x9uE5clc>uKtthJ@I|~o}O?W>pXwqXqUODPcrH@Uq(9U
EU(+DUqyPW_

delta 966
zcmYk3O-NKx6vxlI^V!EVGb&A*&2t(jTo}$YI=)cK0b#T<byC_$QAoM44{0E<$Sa9%
zq@pX>A}XSVt0E?_g^N<bMS&TH0|f=v!j)E1E$riehZpa@#XJ1Y`Jewi_uR4mvHn|)
z4qq{m?`iXMud9as7CIbJVfVdd(_xYG-C)xt*&hFSx0Vu1#k!Wt{wyA6+MKvqs%vxE
zC#5?z=2{lM@E-APS2as5i?v8dGzY&xQl(2tt1cy;yySKnB%ZuvrA$iZLsGJeKm5Jn
z!)zphYMmGlzuN6;xgHt%V~f~-udcQ73q)-4EE^QVso-RQc;T?CB|B6e)Y!;Lc*n(3
zBp|IKp3M)VwxmJCDgSBIgjla|8r-397q~&;GvFg486Sv|%W`=qvkK?Hj}(3nej&cb
zb^m828`Ow?iBR>&Scj8%1vCYuQ3lyr^F+zlz+<@7|N1DnNyKXOfhlA&W>-5Svipe}
zsLHO#h?U!kH<<Nj;Id7`%gy=>;$1KC9+T%0uVM<w^ZlQ|>zc*i!HddNHbw*Fc3T1u
z2IytPKbQs~aK=u2&EzUMAnH9P9{}gjFCRb-+$8%kaD_Qg8@RrJc$dj1z!T>3q`sGl
zqlp545iGE+yu}qrx<y~2Dwb1(hiusA7Hc#2p>iwr{otHfNE}RdZ?jZ0$YSFh)_Lzm
z@T}6c0v=WP2e?tR*XpM>l&zKE>~4p(gi7$6BI{Ch;0Maqo534ftyk#;M|TjPFsIlH
wz9SZD8=QT~sBw9p2pEITbZ_VJbEm~Uqs^I!UrZa9vg^icrunij>yByv09q%rMF0Q*

diff --git a/kernel/vortex_test.hex b/kernel/vortex_test.hex
index 057969f3..169d9717 100644
--- a/kernel/vortex_test.hex
+++ b/kernel/vortex_test.hex
@@ -1,405 +1,405 @@
 :0200000480007A
-:10000000373500FF13050530930570002322B50036
-:100010001300000013000000130000000326450039
-:10002000130500006B000500938B0600130D0700FD
-:10003000130F01009303050013051000635C7500A6
-:1000400013010180130305006B5003001305150015
-:100050006FF0DFFE1300000013000000130000002B
-:1000600013000000130000001300000013010F0034
-:1000700013050000930F0600938D0300130000008A
+:1000000037050200930570002322B500130000009D
+:100010001300000013000000032645001305000034
+:100020006B000500938B0600130D0700130F0100F2
+:100030009303050013051000635C75001301018034
+:10004000130305006B500300130515006FF0DFFE6E
+:100050001300000013000000130000001300000054
+:10006000130000001300000013010F00130500002F
+:10007000930F0600938D030013000000130000008F
 :100080001300000013000000130000001300000024
-:10009000130000001300000013000000EBE0BF019C
+:100090001300000013000000EBE0BF01130000009C
 :1000A0001300000013000000130000001300000004
-:1000B0001300000013000000170500001305451B86
-:1000C0006B40050017030000130343F66B000300A9
-:1000D00067800000170200011302C22323200200E0
-:1000E0002322120023242200232632002328420048
-:1000F000232A5200232C6200232E72002320820226
-:10010000232292022324A2022326B2022328C2021F
-:10011000232AD202232CE202232EF20223200205FC
-:1001200023221205232422052326320523284205F3
-:10013000232A5205232C6205232E720523208207D1
-:10014000232292072324A2072326B2072328C207CB
-:10015000232AD207232CE207232EF20713021000D2
-:1001600067800000170200011302C21A0320020078
-:1001700083204200032182008321C2000322020166
-:1001800083224201032382018323C201032402024A
-:1001900083244202032582028325C202032602032E
-:1001A00083264203032782038327C2030328020412
-:1001B00083284204032982048329C204032A0205F6
-:1001C000832A4205032B8205832BC205032C0206DA
-:1001D000832C4206032D8206832DC206032E0207BE
-:1001E000832E4207032F8207832FC20713020000CA
-:1001F00067800000732500026780000073251002ED
-:1002000067800000130101FE232E1100232C8100C2
-:1002100013040102232604FE6F0040030327C4FEDB
-:10022000B7170000938747973307F702B707008196
-:1002300093870741B307F70013850700EF000044D9
-:100240008327C4FE938717002326F4FE0327C4FEEA
-:100250009307F001E3D4E7FC130000008320C10101
-:10026000032481011301010267800000130101FDD5
-:1002700023261102232481022322A1031304010354
-:100280001300000013070D00B7170000938747976E
-:100290003307F702B707008193870741B307F700D9
-:1002A00013850700EF00405093070500638A07029B
-:1002B00013070D00B70700811317270093878726C0
-:1002C000B307F7001307100023A0E70093070D0002
-:1002D00063960700EFF01FE96F00C0057300000090
-:1002E00013070D00B7170000938747973307F702EE
-:1002F000B707008193870741B307F700130784FD11
-:100300009305070013850700EF000040832704FED4
-:10031000138107008327C4FD832584FD032644FE43
-:10032000832684FE0327C4FE13850700EFF0DFCF8A
-:10033000730000008320C10203248102032D4102C7
-:100340001301010367800000130101FB2326110440
-:100350002324810413040105EFF0DFE92324A4FE24
-:1003600093090100930710002326F4FE6F00C008D4
-:100370000327C4FEB7170000938747973307F70298
-:10038000B707008193870741B307F700138507007C
-:10039000EF00804193070500639A07040327C4FE1A
-:1003A000B7170000938747973307F702B707008115
-:1003B00093870741B307F700130704FD9305070070
-:1003C00013850700EF004034832784FD1381070065
-:1003D000832744FD832504FD0326C4FD832604FEF4
-:1003E000032744FE13850700EFF0DFCD8327C4FE0B
-:1003F000938717002326F4FE8327C4FE032784FE79
-:10040000E3E8E7F613810900EFF0DFCC9307020081
-:1004100063880704B707008113850741EF00C038E0
-:1004200093070500639E0702930784FB93850700EB
-:10043000B707008113850741EF00002D832704FCD7
-:10044000138107008327C4FB832584FB032644FC18
-:10045000832684FC0327C4FC13850700EFF0DFBC70
-:10046000130000008320C10403248104130101054B
-:1004700067800000130101FB23261104232481045B
-:1004800013040105232EA4FA232CB4FA232AC4FA58
-:100490002328D4FAEFF01FD7EFF0DFD52322A4FEF4
-:1004A00013090100232604FE232404FE6F00000923
-:1004B000B709FFFF33013101832784FE2326F4FCB3
-:1004C000832784FB2328F4FC93070100232AF4FCF0
-:1004D000832744FB232CF4FC832704FB232EF4FC0A
-:1004E0008327C4FE2320F4FE0327C4FEB7170000B1
-:1004F000938747973307F702B70700819387074130
-:10050000B307F7001307C4FC930507001385070022
-:10051000EF0000198327C4FE938717002326F4FEFB
-:100520008327C4FE032744FE63E4E700232604FE7A
-:10053000832784FE938717002324F4FE032784FE79
-:100540008327C4FBE366F7F613010900EFF0DFDF52
-:10055000130000008320C10403248104130101055A
-:1005600067800000130101FD23261102232481026C
-:1005700013040103232EA4FC8325C4FDB7070081C7
-:1005800013850704EF004035EFF0DFC62320A4FEFB
-:10059000232604FE6F008006930710002326F4FE36
-:1005A000232404FE6F00C003B7070081032784FEE5
-:1005B0001317270093878726B307F70003A70700C1
-:1005C000930710006318F7008327C4FE9387170072
-:1005D0002326F4FE832784FE938717002324F4FE4A
-:1005E000032784FE9307F001E3D0E7FC8325C4FED4
-:1005F000B70700811385C704EF00002E0327C4FE50
-:100600008327C4FDE36AF7F8232204FE6F0080020B
-:10061000B7070081032744FE131727009387872617
-:10062000B307F70023A00700832744FE9387170032
-:100630002322F4FE832744FE032704FEE3EAE7FCBB
-:10064000130000008320C10203248102130101036F
-:1006500067800000130101FF23268100232471011C
-:100660001304010193870B00138507000324C100C5
-:10067000832B8100130101016780000093020500B4
-:10068000130300009303700023A0620023A2620002
-:1006900023A4620023A6720023A8620067800000E2
-:1006A0009302050003A382001303130023A4620036
-:1006B0001383420183AE420093935E0033037300C1
-:1006C00003AE05002320C30103AE45002322C3016E
-:1006D00003AE85002324C30103AEC5002326C30156
-:1006E00003AE05012328C30103AE4501232AC3013C
-:1006F000938E1E00130F20036394EE01930E0000EF
-:1007000023A2D201678000009302050003A38200A8
+:1000B00013000000170500001305451B6B400500E9
+:1000C00017030000130343F66B0003006780000072
+:1000D000170200011302022423200200232212002F
+:1000E000232422002326320023284200232A520000
+:1000F000232C6200232E72002320820223229202EC
+:100100002324A2022326B2022328C202232AD202D7
+:10011000232CE202232EF2022320020523221205C1
+:10012000232422052326320523284205232A5205AB
+:10013000232C6205232E7205232082072322920797
+:100140002324A2072326B2072328C207232AD20783
+:10015000232CE207232EF207130210006780000011
+:10016000170200011302021B032002008320420039
+:10017000032182008321C200032202018322420163
+:10018000032382018323C201032402028324420247
+:10019000032582028325C20203260203832642032B
+:1001A000032782038327C20303280204832842040F
+:1001B000032982048329C204032A0205832A4205F3
+:1001C000032B8205832BC205032C0206832C4206D7
+:1001D000032D8206832DC206032E0207832E4207BB
+:1001E000032F8207832FC2071302000067800000DD
+:1001F00073250002678000007325100267800000ED
+:10020000130101FE232E1100232C8100130401028F
+:10021000232604FE6F0040030327C4FEB717000027
+:10022000938747973307F702B70700819387074102
+:10023000B307F70013850700EF0000448327C4FECF
+:10024000938717002326F4FE0327C4FE9307F001CB
+:10025000E3D4E7FC130000008320C10103248101E3
+:100260001301010267800000130101FD2326110222
+:10027000232481022322A10313040103130000009D
+:1002800013070D00B7170000938747973307F7024E
+:10029000B707008193870741B307F700138507006D
+:1002A000EF00405093070500638A070213070D0013
+:1002B000B70700811317270093878726B307F70036
+:1002C0001307100023A0E70093070D0063960700B3
+:1002D000EFF01FE96F00C0057300000013070D0069
+:1002E000B7170000938747973307F702B7070081D6
+:1002F00093870741B307F700130784FD93050700B1
+:1003000013850700EF000040832704FE13810700D8
+:100310008327C4FD832584FD032644FE832684FEB3
+:100320000327C4FE13850700EFF0DFCF7300000042
+:100330008320C10203248102032D41021301010322
+:1003400067800000130101FB23261104232481048C
+:1003500013040105EFF0DFE92324A4FE9309010053
+:10036000930710002326F4FE6F00C0080327C4FE85
+:10037000B7170000938747973307F702B707008145
+:1003800093870741B307F70013850700EF0080410B
+:1003900093070500639A07040327C4FEB7170000FC
+:1003A000938747973307F702B70700819387074181
+:1003B000B307F700130704FD930507001385070033
+:1003C000EF004034832784FD13810700832744FD19
+:1003D000832504FD0326C4FD832604FE032744FE73
+:1003E00013850700EFF0DFCD8327C4FE9387170046
+:1003F0002326F4FE8327C4FE032784FEE3E8E7F602
+:1004000013810900EFF0DFCC930702006388070433
+:10041000B707008113850741EF00C0389307050037
+:10042000639E0702930784FB93850700B70700814B
+:1004300013850741EF00002D832704FC138107007B
+:100440008327C4FB832584FB032644FC832684FC8A
+:100450000327C4FC13850700EFF0DFBC1300000086
+:100460008320C10403248104130101056780000077
+:10047000130101FB23261104232481041304010525
+:10048000232EA4FA232CB4FA232AC4FA2328D4FA5C
+:10049000EFF01FD7EFF0DFD52322A4FE13090100F0
+:1004A000232604FE232404FE6F000009B709FFFF82
+:1004B00033013101832784FE2326F4FC832784FB48
+:1004C0002328F4FC93070100232AF4FC832744FB30
+:1004D000232CF4FC832704FB232EF4FC8327C4FE87
+:1004E0002320F4FE0327C4FEB71700009387479725
+:1004F0003307F702B707008193870741B307F70077
+:100500001307C4FC9305070013850700EF000019CB
+:100510008327C4FE938717002326F4FE8327C4FE97
+:10052000032744FE63E4E700232604FE832784FEBA
+:10053000938717002324F4FE032784FE8327C4FB3C
+:10054000E366F7F613010900EFF0DFDF13000000A8
+:100550008320C10403248104130101056780000086
+:10056000130101FD23261102232481021304010338
+:10057000232EA4FC8325C4FDB7070081138507043F
+:10058000EF004035EFF0DFC62320A4FE232604FE53
+:100590006F008006930710002326F4FE232404FE38
+:1005A0006F00C003B7070081032784FE13172700DD
+:1005B00093878726B307F70003A707009307100068
+:1005C0006318F7008327C4FE938717002326F4FEE1
+:1005D000832784FE938717002324F4FE032784FED9
+:1005E0009307F001E3D0E7FC8325C4FEB707008141
+:1005F0001385C704EF00002E0327C4FE8327C4FD24
+:10060000E36AF7F8232204FE6F008002B707008137
+:10061000032744FE1317270093878726B307F700A5
+:1006200023A00700832744FE938717002322F4FEAC
+:10063000832744FE032704FEE3EAE7FC13000000DF
+:100640008320C1020324810213010103678000009B
+:10065000130101FF232681002324710113040101EA
+:1006600093870B00138507000324C100832B8100AF
+:1006700013010101678000009302050013030000CD
+:100680009303700023A0620023A2620023A46200EF
+:1006900023A6720023A86200678000009302050071
+:1006A00003A382001303130023A4620013834201F7
+:1006B00083AE420093935E003303730003AE0500E4
+:1006C0002320C30103AE45002322C30103AE8500EE
+:1006D0002324C30103AEC5002326C30103AE0501D5
+:1006E0002328C30103AE4501232AC301938E1E00B4
+:1006F000130F20036394EE01930E000023A2D20196
+:10070000678000009302050003A38200130000002D
 :10071000130000001300000013000000130000008D
-:1007200013000000130000001303F3FF23A4620072
-:100730001383420183AE0200930F2003138F0E0038
-:10074000130F1F006314FF01130F000023A0E20129
-:1007500093935E0033037300032E030023A0C501AF
-:10076000032E430023A2C501032E830023A4C50149
-:10077000032EC30023A6C501032E030123A8C50130
-:10078000032E430123AAC5016780000093020500E0
-:1007900003A3820013050000130E200363146E00F0
-:1007A00013051500678000009302050003A3820073
-:1007B00013050000130E000063146E0013051500EE
-:1007C000678000009302050003A3C20083A3020117
-:1007D00033B5630067800000130141FF232011003F
-:1007E0002322B1008345050063880500EF00C001A6
-:1007F000130515006FF01FFF8320010083254100C2
-:100800001301C10067800000B708010023A0B800F1
-:1008100067800000130101FD2326110223248102B9
-:1008200013040103232EA4FC0327C4FD9307F00047
-:1008300063E4E702B70700810327C4FD131727000D
-:100840009387871AB307F70083A70700138507006C
-:10085000EFF09FF86F004007930700022326F4FE95
-:10086000A30504FE8327C4FE9387C7FF0327C4FDA7
-:10087000B357F70093F7F7002322F4FE832744FED3
-:100880006386070093071000A305F4FE8347B4FEB8
-:1008900063820702B7070081032744FE131727006E
-:1008A0009387871AB307F70083A70700138507000C
-:1008B000EFF09FF28327C4FE9387C7FF2326F4FE41
-:1008C0008327C4FEE340F0FA8320C102032481029F
-:1008D0001301010367800000130101FE232E1100A4
-:1008E000232C8100130401022326A4FE2324B4FE3A
-:1008F0000325C4FEEFF05FEE032584FEEFF09FF1C9
-:10090000B707008113854709EFF01FED13000000C2
-:100910008320C101032481011301010267800000CB
-:10092000130101FD23261102232481021304010374
-:10093000232EA4FC232CB4FC232AC4FC2328D4FC9F
-:10094000B76702810327C4FD23ACE71AB7670281AA
-:100950009387871B032784FD23A2E700B7670281E3
-:100960009387871B032744FD23A4E700B767028111
-:100970009387871B032704FD23A6E700EFF01F885A
-:100980002324A4FE032704FD832784FEB357F70224
-:100990002326F4FE032704FD832784FEB377F702A2
-:1009A000638807008327C4FE938717002326F4FE7D
-:1009B000B76702819387871B0327C4FE23A8E7003C
-:1009C000032704FD832784FE6362F702B767028171
-:1009D0009386871BB7170080138647A4832584FE60
-:1009E000032504FDEFF01FA96F000002B767028125
-:1009F0009386871BB7170080138647A4832504FDC1
-:100A0000032504FDEFF01FA7EFF0CFFE2322A4FE85
-:100A1000032704FD832744FE63F8E700032544FE13
-:100A2000EFF05FB46F00C000032504FDEFF09FB34B
-:100A3000130000008320C10203248102130101037B
-:100A400067800000130101FA232E1104232C810476
-:100A5000130401062326A4FA2324B4FAEFF09FBF5F
-:100A6000232CA4FC832784FD83A70700232AF4FCFE
-:100A7000832784FD83A747002328F4FC832784FD74
-:100A800083A787002326F4FC832784FD83A707011F
-:100A90002326F4FE0327C4FE8327C4FAB307F70214
-:100AA0002324F4FE8327C4FE639A070093071000F3
-:100AB0002326F4FE8327C4FA2324F4FE832784FD2F
-:100AC00083A7C7002324F4FC232204FE6F00800DBB
-:100AD000232004FE232E04FC6F008007032784FAE2
-:100AE000832784FCB307F7020327C4FDB307F7008D
-:100AF0002322F4FC032784FC8327C4FDB307F702F9
-:100B0000032784FEB307F7002320F4FC832744FC6B
-:100B100093972700032744FDB307F70003A70700B7
-:100B2000832704FC93972700832604FDB387F600F0
-:100B300083A70700B307F702032704FEB307F700F4
-:100B40002320F4FE8327C4FD93871700232EF4FC93
-:100B50000327C4FD832784FCE362F7F8032784FAA4
-:100B6000832784FC3307F702832784FEB307F7004B
-:100B7000232EF4FA8327C4FB939727000327C4FC92
-:100B8000B307F700032704FE23A0E700832784FEB2
-:100B9000938717002324F4FE832744FE93871700CE
-:100BA0002322F4FE832744FE0327C4FEE3E2E7F298
-:100BB000130000008320C1050324810513010106F1
-:100BC00067800000130101FC232E1102232C8102F7
-:100BD00013040104232EA4FC232CB4FC232AC4FCFC
-:100BE0002328D4FC2326E4FCB76702810327C4FD35
-:100BF00023A6E71CB76702819387C71C032784FDE0
-:100C000023A2E700B76702819387C71C032744FD2F
-:100C100023A4E700B76702819387C71C0327C4FC9E
-:100C200023A6E700B76702819387C71C032704FD4B
-:100C300023A8E700EFF08FDC2324A4FE0327C4FCE5
-:100C4000832784FEB357F7022326F4FE0327C4FC50
-:100C5000832784FEB377F702638807008327C4FEE7
-:100C6000938717002326F4FEB76702819387C71C7A
-:100C70000327C4FE23AAE7000327C4FC832784FEBE
-:100C80006362F702B76702819386C71CB7170080BB
-:100C90001386C7CF832584FE032504FDEFF08FFD67
-:100CA0006F000002B76702819386C71CB7170080E8
-:100CB0001386C7CF8325C4FC032504FDEFF08FFB0B
-:100CC000EFF04FD32322A4FE032704FD832744FE25
-:100CD00063F8E700032544FEEFF0DF886F00C000F3
-:100CE000032504FDEFF01F88130000008320C103DB
-:100CF000032481031301010467800000130101FB39
-:100D0000232611042324810413040105232EA4FAAD
-:100D1000232CB4FAEFF01F942320A4FE832704FEB3
-:100D200083A70700232EF4FC832704FE83A7470034
-:100D3000232CF4FC832704FE83A78700232AF4FCDA
-:100D4000832704FE83A747012326F4FE0327C4FE5E
-:100D50008327C4FBB307F7022324F4FE8327C4FED2
-:100D6000639A0700930710002326F4FE8327C4FB31
-:100D70002324F4FE832704FE83A7C7002328F4FC62
-:100D8000232204FE6F00000C032784FB832704FD4D
-:100D90003307F702832784FEB307F7002326F4FC0A
-:100DA000032784FE832704FDB337F70093F7F70F7B
-:100DB0002324F4FC832784FC93B71700A303F4FCDB
-:100DC000834774FC138F0700B7170080938F07E3E6
-:100DD0006B200F007B70FF018327C4FC93972700D3
-:100DE0000327C4FDB307F70083A607008327C4FCCD
-:100DF00093972700032784FDB307F70003A7070095
-:100E00008327C4FC93972700032644FDB307F6000D
-:100E10003387E60023A0E700832784FE938717002B
-:100E20002324F4FEB7170080138E47E367000E00FB
-:100E3000130000006B300000832744FE93871700E7
-:100E40002322F4FE832744FE0327C4FEE3EEE7F2E9
-:100E5000130000008320C104032481041301010551
-:100E600067800000130101FC232E1102232C810254
-:100E700013040104232EA4FC232CB4FC232AC4FC59
-:100E80002328D4FC2326E4FCB76702810327C4FD92
-:100E900023A6E71CB76702819387C71C032784FD3D
-:100EA00023A2E700B76702819387C71C032744FD8D
-:100EB00023A4E700B76702819387C71C0327C4FCFC
-:100EC00023A6E700B76702819387C71C032704FDA9
-:100ED00023A8E700EFF08FB22324A4FE0327C4FC6D
-:100EE000832784FEB357F7022326F4FE0327C4FCAE
-:100EF000832784FEB377F702638807008327C4FE45
-:100F0000938717002326F4FEB76702819387C71CD7
-:100F10000327C4FE23AAE7000327C4FC832784FE1B
-:100F20006362F702B76702819386C71CB717008018
-:100F30001386C7F9832584FE032504FDEFF08FD3C4
-:100F40006F000002B76702819386C71CB717008045
-:100F50001386C7F98325C4FC032504FDEFF08FD168
-:100F6000EFF04FA92322A4FE032704FD832744FEAC
-:100F700063F8E700032544FEEFF0CFDE6F00C0000A
-:100F8000032504FDEFF00FDE130000008320C103F2
-:100F9000032481031301010467800000130101FB96
-:100FA000232611042324810413040105232EA4FA0B
-:100FB000232CB4FAEFF00FEA2320A4FE832704FECB
-:100FC00083A70700232EF4FC832704FE83A7470092
-:100FD000232CF4FC832704FE83A78700232AF4FC38
-:100FE000832704FE83A747012326F4FE0327C4FEBC
-:100FF0008327C4FBB307F7022324F4FE8327C4FE30
-:10100000639A0700930710002326F4FE8327C4FB8E
-:101010002324F4FE832704FE83A7C7002328F4FCBF
-:10102000232204FE6F00000C032784FB832704FDAA
-:101030003307F702832784FEB307F7002326F4FC67
-:10104000032784FE832704FDB337F70093F7F70FD8
-:101050002324F4FC832784FC93B71700A303F4FC38
-:10106000834774FC138F0700B7170080938F070D19
-:101070006B200F007B70FF018327C4FC9397270030
-:101080000327C4FDB307F70083A607008327C4FC2A
-:1010900093972700032784FDB307F70003A70700F2
-:1010A0008327C4FC93972700032644FDB307F6006B
-:1010B0003387E64023A0E700832784FE9387170049
-:1010C0002324F4FEB7170080138E470D67000E002F
-:1010D000130000006B300000832744FE9387170045
-:1010E0002322F4FE832744FE0327C4FEE3EEE7F247
-:1010F000130000008320C1040324810413010105AF
-:1011000067800000130101FC232E1102232C8102B1
-:1011100013040104232EA4FC232CB4FC232AC4FCB6
-:101120002328D4FC2326E4FCB76702810327C4FDEF
-:1011300023A2E71EB76702819387471E032784FD1A
-:1011400023A2E700B76702819387471E032744FD68
-:1011500023A4E700B76702819387471E0327C4FCD7
-:1011600023A6E700B76702819387471E032704FD84
-:1011700023A8E700EFF08F882324A4FE0327C4FCF4
-:10118000832784FEB357F7022326F4FE0327C4FC0B
-:10119000832784FEB377F702638807008327C4FEA2
-:1011A000938717002326F4FEB76702819387471EB3
-:1011B0000327C4FE23AAE7000327C4FC832784FE79
-:1011C0006362F702B76702819386471EB7170080F4
-:1011D0001386C723832584FE032504FDEFF08FA922
-:1011E0006F000002B76702819386471EB717008021
-:1011F0001386C7238325C4FC032504FDEFF08FA7C6
-:10120000EFE05FFF2322A4FE032704FD832744FEB3
-:1012100063F8E700032544FEEFF0CFB46F00C00091
-:10122000032504FDEFF00FB4130000008320C10379
-:10123000032481031301010467800000130101FBF3
-:10124000232611042324810413040105232EA4FA68
-:10125000232CB4FAEFF00FC02320A4FE832704FE52
-:1012600083A70700232EF4FC832704FE83A74700EF
-:1012700083A70700232CF4FC832704FE83A78700A1
-:10128000232AF4FC832704FE83A747012326F4FEC8
-:101290000327C4FE8327C4FBB307F7022324F4FE0D
-:1012A0008327C4FE639A0700930710002326F4FEE9
-:1012B0008327C4FB2324F4FE832704FE83A7C700EF
-:1012C0002328F4FC232204FE6F00000B032784FB79
-:1012D000832704FD3307F702832784FEB307F70053
-:1012E0002326F4FC032784FE832704FDB337F7008D
-:1012F00093F7F70F2324F4FC832784FC93B717009C
-:10130000A303F4FC834774FC138F0700B717008016
-:10131000938F47366B200F007B70FF018327C4FC3F
-:10132000939727000327C4FDB307F70083A60700A0
-:101330008327C4FC93972700032744FDB307F700D6
-:10134000032784FD3387E60023A0E700832784FE7C
-:10135000938717002324F4FEB7170080138E873677
-:1013600067000E00130000006B300000832744FE6E
-:10137000938717002322F4FE832744FE0327C4FE2D
-:10138000E3E6E7F4130000008320C1040324810492
-:101390001301010567800000130101FC232E1102D7
-:1013A000232C810213040104232EA4FC232CB4FC5F
-:1013B000232AC4FC2328D4FC2326E4FCB76702813B
-:1013C0000327C4FD23A2E71EB76702819387471E48
-:1013D000032784FD23A2E700B76702819387471E96
-:1013E000032744FD23A4E700B76702819387471EC4
-:1013F0000327C4FC23A6E700B76702819387471E33
-:10140000032704FD23A8E700EFE05FDF2324A4FE09
-:101410000327C4FC832784FEB357F7022326F4FE78
-:101420000327C4FC832784FEB377F7026388070091
-:101430008327C4FE938717002326F4FEB767028133
-:101440009387471E0327C4FE23AAE7000327C4FC93
-:10145000832784FE6362F702B76702819386471E83
-:10146000B71700801386074D832584FE032504FDEE
-:10147000EFF04F806F000002B76702819386471E2E
-:10148000B71700801386074D8325C4FC032504FD90
-:10149000EFE05FFEEFE01FD62322A4FE032704FD4A
-:1014A000832744FE63F8E700032544FEEFF08F8BAB
-:1014B0006F00C000032504FDEFF0CF8A1300000089
-:1014C0008320C1030324810313010104678000000A
-:1014D000130101FB232611042324810413040105B5
-:1014E000232EA4FA232CB4FAEFF0CF962320A4FEE7
-:1014F000832704FE83A70700232EF4FC832704FE22
-:1015000083A7470083A70700232CF4FC832704FE4E
-:1015100083A78700232AF4FC832704FE83A74701BF
-:101520002326F4FE0327C4FE8327C4FBB307F70278
-:101530002324F4FE8327C4FE639A07009307100058
-:101540002326F4FE8327C4FB2324F4FE832704FE12
-:1015500083A7C7002328F4FC232204FE6F00000B9E
-:10156000032784FB832704FD3307F702832784FEC8
-:10157000B307F7002326F4FC032784FE832704FD2A
-:10158000B337F70093F7F70F2324F4FC832784FC89
-:1015900093B71700A303F4FC834774FC138F070071
-:1015A000B7170080938F875F6B200F007B70FF0160
-:1015B0008327C4FC939727000327C4FDB307F700D4
-:1015C00083A607008327C4FC93972700032744FDC5
-:1015D000B307F700032784FD3387E60223A0E70063
-:1015E000832784FE938717002324F4FEB717008017
-:1015F000138EC75F67000E00130000006B30000001
-:10160000832744FE938717002322F4FE832744FE9A
-:101610000327C4FEE3E6E7F4130000008320C104BF
-:10162000032481041301010567800000130101FDFB
-:101630002326810213040103232EA4FC232604FE87
-:101640006F0000018327C4FE938717002326F4FE52
-:101650000327C4FE8327C4FDE346F7FE1300000002
-:101660000324C1021301010367800000130101FD7F
-:10167000232611022324810213040103232EA4FC38
-:10168000232CB4FCB76702811387C71F8327C4FDCF
-:10169000B307F700130710002380E7008327C4FD7A
-:1016A0006390070CA30104FE232604FE6F00800A4A
-:1016B000232604FE232404FE6F004003B767028143
-:1016C0001387C71F832784FEB307F70083C707006C
-:1016D000638807008327C4FE938717002326F4FE40
-:1016E000832784FE938717002324F4FE032784FEB8
-:1016F000832784FDE344F7FC0327C4FE832784FD8E
-:10170000631AF704232204FE6F000004B767028106
-:101710001387C71F832744FEB307F7002380070002
-:10172000B7970281130710002382E72C130560048A
-:10173000EFF0DFEFB79702812382072C832744FE67
-:10174000938717002322F4FE032744FE832784FD9A
-:10175000E34EF7FA834734FEE39C07F46F00400240
-:1017600013000000B797028183C7472C93C7170067
-:1017700093F7F70FE39807FE13054006EFF01FEB12
-:10178000130000008320C10203248102130101031E
-:1017900067800000130101FF23268100130401016B
-:1017A0009307000013080000138507009305080045
-:1017B0000324C1001301010167800000130101FE31
-:1017C000232E810013040102232604FE6F008004EF
-:1017D000B76702810327C4FE131727009387C72129
-:1017E000B307F7001307300023A0E700B7770281A3
-:1017F0000327C4FE131727009387C721B307F700F9
-:101800001307200023A0E7008327C4FE9387170057
-:101810002326F4FE0327C4FE9307F00FE3DAE7FA6A
-:10182000130000000324C1011301010267800000BE
-:10183000130101FD23261102232481021304010355
-:10184000232EA4FCB707008113858711EFE0DFF892
-:10185000232604FE6F0080058327C4FE638E0700E5
-:101860008327C4FE93F7F70063980700B70700814A
-:101870001385C713EFE05FF68327C4FE9397270015
-:101880000327C4FDB307F70083A7070013850700EC
-:10189000EFE05FF8B707008113850714EFE0DFF38F
-:1018A0008327C4FE938717002326F4FE0327C4FE74
-:1018B0009307F00FE3D2E7FAB707008113854714C7
-:1018C000EFE09FF1130000008320C1020324810296
-:1018D0001301010367800000130101FF232611009B
-:1018E0002324810013040101EFF05FEDB76702814B
-:1018F0001385C721EFF0DFF393070000138507007E
-:101900008320C100032481001301010167800000CE
+:10072000130000001303F3FF23A4620013834201AC
+:1007300083AE0200930F2003138F0E00130F1F00D0
+:100740006314FF01130F000023A0E20193935E00E6
+:1007500033037300032E030023A0C501032E4300BF
+:1007600023A2C501032E830023A4C501032EC300C9
+:1007700023A6C501032E030123A8C501032E4301AF
+:1007800023AAC501678000009302050003A382002D
+:1007900013050000130E200363146E0013051500EB
+:1007A000678000009302050003A382001305000088
+:1007B000130E000063146E0013051500678000001F
+:1007C0009302050003A3C20083A3020133B56300B3
+:1007D00067800000130141FF232011002322B10094
+:1007E0008345050063880500EF00C001130515006F
+:1007F0006FF01FFF83200100832541001301C1001A
+:1008000067800000B708010023A0B80067800000DF
+:10081000130101FD23261102232481021304010385
+:10082000232EA4FC0327C4FD9307F00063E4E70232
+:10083000B70700810327C4FD131727009387871A82
+:10084000B307F70083A7070013850700EFF09FF8B1
+:100850006F004007930700022326F4FEA30504FE61
+:100860008327C4FE9387C7FF0327C4FDB357F70050
+:1008700093F7F7002322F4FE832744FE63860700E4
+:1008800093071000A305F4FE8347B4FE63820702BA
+:10089000B7070081032744FE131727009387871AA1
+:1008A000B307F70083A7070013850700EFF09FF257
+:1008B0008327C4FE9387C7FF2326F4FE8327C4FE45
+:1008C000E340F0FA8320C1020324810213010103F3
+:1008D00067800000130101FE232E1100232C8100EC
+:1008E000130401022326A4FE2324B4FE0325C4FE20
+:1008F000EFF05FEE032584FEEFF09FF1B707008174
+:1009000013854709EFF01FED130000008320C1019C
+:10091000032481011301010267800000130101FD1E
+:10092000232611022324810213040103232EA4FC95
+:10093000232CB4FC232AC4FC2328D4FCB7670281EF
+:100940000327C4FD23ACE71AB76702819387871B8F
+:10095000032784FD23A2E700B76702819387871BE3
+:10096000032744FD23A4E700B76702819387871B11
+:10097000032704FD23A6E700EFF01F882324A4FE2D
+:10098000032704FD832784FEB357F7022326F4FED2
+:10099000032704FD832784FEB377F70263880700EB
+:1009A0008327C4FE938717002326F4FEB7670281CE
+:1009B0009387871B0327C4FE23A8E700032704FDB2
+:1009C000832784FE6362F702B76702819386871BE1
+:1009D000B7170080138607A4832584FE032504FD32
+:1009E000EFF01FA96F000002B76702819386871B93
+:1009F000B7170080138607A4832504FD032504FD93
+:100A0000EFF01FA7EFF0CFFE2322A4FE032704FD83
+:100A1000832744FE63F8E700032544FEEFF05FB44C
+:100A20006F00C000032504FDEFF09FB3130000002A
+:100A30008320C102032481021301010367800000A7
+:100A4000130101FA232E1104232C8104130401063F
+:100A50002326A4FA2324B4FAEFF09FBF232CA4FC8E
+:100A6000832784FD83A70700232AF4FC832784FDC2
+:100A700083A747002328F4FC832784FD83A78700EE
+:100A80002326F4FC832784FD83A707012326F4FE95
+:100A90000327C4FE8327C4FAB307F7022324F4FE16
+:100AA0008327C4FE639A0700930710002326F4FEF1
+:100AB0008327C4FA2324F4FE832784FD83A7C70079
+:100AC0002324F4FC232204FE6F00800D232004FE67
+:100AD000232E04FC6F008007032784FA832784FCFD
+:100AE000B307F7020327C4FDB307F7002322F4FC82
+:100AF000032784FC8327C4FDB307F702032784FE82
+:100B0000B307F7002320F4FC832744FC93972700C6
+:100B1000032744FDB307F70003A70700832704FC5E
+:100B200093972700832604FDB387F60083A7070069
+:100B3000B307F702032704FEB307F7002320F4FEF0
+:100B40008327C4FD93871700232EF4FC0327C4FDDD
+:100B5000832784FCE362F7F8032784FA832784FC65
+:100B60003307F702832784FEB307F700232EF4FA36
+:100B70008327C4FB939727000327C4FCB307F70020
+:100B8000032704FE23A0E700832784FE9387170032
+:100B90002324F4FE832744FE938717002322F4FEC8
+:100BA000832744FE0327C4FEE3E2E7F213000000BC
+:100BB0008320C1050324810513010106678000001D
+:100BC000130101FC232E1102232C810213040104C2
+:100BD000232EA4FC232CB4FC232AC4FC2328D4FCFD
+:100BE0002326E4FCB76702810327C4FD23A6E71C84
+:100BF000B76702819387C71C032784FD23A2E70000
+:100C0000B76702819387C71C032744FD23A4E7002D
+:100C1000B76702819387C71C0327C4FC23A6E7009C
+:100C2000B76702819387C71C032704FD23A8E70049
+:100C3000EFF08FDC2324A4FE0327C4FC832784FE6B
+:100C4000B357F7022326F4FE0327C4FC832784FE50
+:100C5000B377F702638807008327C4FE93871700E2
+:100C60002326F4FEB76702819387C71C0327C4FEBF
+:100C700023AAE7000327C4FC832784FE6362F702EC
+:100C8000B76702819386C71CB7170080138687CF8A
+:100C9000832584FE032504FDEFF08FFD6F00000225
+:100CA000B76702819386C71CB7170080138687CF6A
+:100CB0008325C4FC032504FDEFF08FFBEFF04FD339
+:100CC0002322A4FE032704FD832744FE63F8E700E4
+:100CD000032544FEEFF0DF886F00C000032504FD0C
+:100CE000EFF01F88130000008320C1030324810359
+:100CF0001301010467800000130101FB2326110486
+:100D00002324810413040105232EA4FA232CB4FA0E
+:100D1000EFF01F942320A4FE832704FE83A707007F
+:100D2000232EF4FC832704FE83A74700232CF4FC26
+:100D3000832704FE83A78700232AF4FC832704FE6D
+:100D400083A747012326F4FE0327C4FE8327C4FBA1
+:100D5000B307F7022324F4FE8327C4FE639A070037
+:100D6000930710002326F4FE8327C4FB2324F4FEFC
+:100D7000832704FE83A7C7002328F4FC232204FE54
+:100D80006F00000C032784FB832704FD3307F70261
+:100D9000832784FEB307F7002326F4FC032784FE91
+:100DA000832704FDB337F70093F7F70F2324F4FCF0
+:100DB000832784FC93B71700A303F4FC834774FCD8
+:100DC000138F0700B7170080938FC7E26B200F00C7
+:100DD0007B70FF018327C4FC939727000327C4FD82
+:100DE000B307F70083A607008327C4FC9397270067
+:100DF000032784FDB307F70003A707008327C4FC7C
+:100E000093972700032644FDB307F6003387E600D7
+:100E100023A0E700832784FE938717002324F4FE92
+:100E2000B7170080138E07E367000E001300000061
+:100E30006B300000832744FE938717002322F4FEC3
+:100E4000832744FE0327C4FEE3EEE7F2130000000D
+:100E50008320C1040324810413010105678000007D
+:100E6000130101FC232E1102232C8102130401041F
+:100E7000232EA4FC232CB4FC232AC4FC2328D4FC5A
+:100E80002326E4FCB76702810327C4FD23A6E71CE1
+:100E9000B76702819387C71C032784FD23A2E7005D
+:100EA000B76702819387C71C032744FD23A4E7008B
+:100EB000B76702819387C71C0327C4FC23A6E700FA
+:100EC000B76702819387C71C032704FD23A8E700A7
+:100ED000EFF08FB22324A4FE0327C4FC832784FEF3
+:100EE000B357F7022326F4FE0327C4FC832784FEAE
+:100EF000B377F702638807008327C4FE9387170040
+:100F00002326F4FEB76702819387C71C0327C4FE1C
+:100F100023AAE7000327C4FC832784FE6362F70249
+:100F2000B76702819386C71CB7170080138687F9BD
+:100F3000832584FE032504FDEFF08FD36F000002AC
+:100F4000B76702819386C71CB7170080138687F99D
+:100F50008325C4FC032504FDEFF08FD1EFF04FA9EA
+:100F60002322A4FE032704FD832744FE63F8E70041
+:100F7000032544FEEFF0CFDE6F00C000032504FD23
+:100F8000EFF00FDE130000008320C1030324810370
+:100F90001301010467800000130101FB23261104E3
+:100FA0002324810413040105232EA4FA232CB4FA6C
+:100FB000EFF00FEA2320A4FE832704FE83A7070097
+:100FC000232EF4FC832704FE83A74700232CF4FC84
+:100FD000832704FE83A78700232AF4FC832704FECB
+:100FE00083A747012326F4FE0327C4FE8327C4FBFF
+:100FF000B307F7022324F4FE8327C4FE639A070095
+:10100000930710002326F4FE8327C4FB2324F4FE59
+:10101000832704FE83A7C7002328F4FC232204FEB1
+:101020006F00000C032784FB832704FD3307F702BE
+:10103000832784FEB307F7002326F4FC032784FEEE
+:10104000832704FDB337F70093F7F70F2324F4FC4D
+:10105000832784FC93B71700A303F4FC834774FC35
+:10106000138F0700B7170080938FC70C6B200F00FA
+:101070007B70FF018327C4FC939727000327C4FDDF
+:10108000B307F70083A607008327C4FC93972700C4
+:10109000032784FDB307F70003A707008327C4FCD9
+:1010A00093972700032644FDB307F6003387E640F5
+:1010B00023A0E700832784FE938717002324F4FEF0
+:1010C000B7170080138E070D67000E001300000095
+:1010D0006B300000832744FE938717002322F4FE21
+:1010E000832744FE0327C4FEE3EEE7F2130000006B
+:1010F0008320C104032481041301010567800000DB
+:10110000130101FC232E1102232C8102130401047C
+:10111000232EA4FC232CB4FC232AC4FC2328D4FCB7
+:101120002326E4FCB76702810327C4FD23A2E71E40
+:10113000B76702819387471E032784FD23A2E70038
+:10114000B76702819387471E032744FD23A4E70066
+:10115000B76702819387471E0327C4FC23A6E700D5
+:10116000B76702819387471E032704FD23A8E70082
+:10117000EFF08F882324A4FE0327C4FC832784FE7A
+:10118000B357F7022326F4FE0327C4FC832784FE0B
+:10119000B377F702638807008327C4FE938717009D
+:1011A0002326F4FEB76702819387471E0327C4FEF8
+:1011B00023AAE7000327C4FC832784FE6362F702A7
+:1011C000B76702819386471EB7170080138687236F
+:1011D000832584FE032504FDEFF08FA96F00000234
+:1011E000B76702819386471EB7170080138687234F
+:1011F0008325C4FC032504FDEFF08FA7EFE05FFF1C
+:101200002322A4FE032704FD832744FE63F8E7009E
+:10121000032544FEEFF0CFB46F00C000032504FDAA
+:10122000EFF00FB4130000008320C10303248103F7
+:101230001301010467800000130101FB2326110440
+:101240002324810413040105232EA4FA232CB4FAC9
+:10125000EFF00FC02320A4FE832704FE83A707001E
+:10126000232EF4FC832704FE83A7470083A70700EF
+:10127000232CF4FC832704FE83A78700232AF4FC95
+:10128000832704FE83A747012326F4FE0327C4FE19
+:101290008327C4FBB307F7022324F4FE8327C4FE8D
+:1012A000639A0700930710002326F4FE8327C4FBEC
+:1012B0002324F4FE832704FE83A7C7002328F4FC1D
+:1012C000232204FE6F00000B032784FB832704FD09
+:1012D0003307F702832784FEB307F7002326F4FCC5
+:1012E000032784FE832704FDB337F70093F7F70F36
+:1012F0002324F4FC832784FC93B71700A303F4FC96
+:10130000834774FC138F0700B7170080938F07364D
+:101310006B200F007B70FF018327C4FC939727008D
+:101320000327C4FDB307F70083A607008327C4FC87
+:1013300093972700032744FDB307F700032784FD95
+:101340003387E60023A0E700832784FE93871700F6
+:101350002324F4FEB7170080138E473667000E0073
+:10136000130000006B300000832744FE93871700B2
+:101370002322F4FE832744FE0327C4FEE3E6E7F4BA
+:10138000130000008320C10403248104130101051C
+:1013900067800000130101FC232E1102232C81021F
+:1013A00013040104232EA4FC232CB4FC232AC4FC24
+:1013B0002328D4FC2326E4FCB76702810327C4FD5D
+:1013C00023A2E71EB76702819387471E032784FD88
+:1013D00023A2E700B76702819387471E032744FDD6
+:1013E00023A4E700B76702819387471E0327C4FC45
+:1013F00023A6E700B76702819387471E032704FDF2
+:1014000023A8E700EFE05FDF2324A4FE0327C4FC4A
+:10141000832784FEB357F7022326F4FE0327C4FC78
+:10142000832784FEB377F702638807008327C4FE0F
+:10143000938717002326F4FEB76702819387471E20
+:101440000327C4FE23AAE7000327C4FC832784FEE6
+:101450006362F702B76702819386471EB717008061
+:101460001386C74C832584FE032504FDEFF04F80CF
+:101470006F000002B76702819386471EB71700808E
+:101480001386C74C8325C4FC032504FDEFE05FFEF3
+:10149000EFE01FD62322A4FE032704FD832744FE8A
+:1014A00063F8E700032544FEEFF08F8B6F00C00068
+:1014B000032504FDEFF0CF8A130000008320C10351
+:1014C000032481031301010467800000130101FB61
+:1014D000232611042324810413040105232EA4FAD6
+:1014E000232CB4FAEFF0CF962320A4FE832704FE2A
+:1014F00083A70700232EF4FC832704FE83A747005D
+:1015000083A70700232CF4FC832704FE83A787000E
+:10151000232AF4FC832704FE83A747012326F4FE35
+:101520000327C4FE8327C4FBB307F7022324F4FE7A
+:101530008327C4FE639A0700930710002326F4FE56
+:101540008327C4FB2324F4FE832704FE83A7C7005C
+:101550002328F4FC232204FE6F00000B032784FBE6
+:10156000832704FD3307F702832784FEB307F700C0
+:101570002326F4FC032784FE832704FDB337F700FA
+:1015800093F7F70F2324F4FC832784FC93B7170009
+:10159000A303F4FC834774FC138F0700B717008084
+:1015A000938F475F6B200F007B70FF018327C4FC84
+:1015B000939727000327C4FDB307F70083A607000E
+:1015C0008327C4FC93972700032744FDB307F70044
+:1015D000032784FD3387E60223A0E700832784FEE8
+:1015E000938717002324F4FEB7170080138E875FBC
+:1015F00067000E00130000006B300000832744FEDC
+:10160000938717002322F4FE832744FE0327C4FE9A
+:10161000E3E6E7F4130000008320C10403248104FF
+:101620001301010567800000130101FD23268102DB
+:1016300013040103232EA4FC232604FE6F000001E3
+:101640008327C4FE938717002326F4FE0327C4FED6
+:101650008327C4FDE346F7FE130000000324C10204
+:101660001301010367800000130101FD232611020D
+:101670002324810213040103232EA4FC232CB4FC95
+:10168000B76702811387C71F8327C4FDB307F7001D
+:10169000130710002380E7008327C4FD6390070C25
+:1016A000A30104FE232604FE6F00800A232604FE05
+:1016B000232404FE6F004003B76702811387C71F0E
+:1016C000832784FEB307F70083C7070063880700FA
+:1016D0008327C4FE938717002326F4FE832784FE06
+:1016E000938717002324F4FE032784FE832784FDB9
+:1016F000E344F7FC0327C4FE832784FD631AF70441
+:10170000232204FE6F000004B76702811387C71FFE
+:10171000832744FEB307F70023800700B7970281B1
+:10172000130710002382E72C13056004EFF0DFEFAE
+:10173000B79702812382072C832744FE93871700E3
+:101740002322F4FE032744FE832784FDE34EF7FAA9
+:10175000834734FEE39C07F46F004002130000004F
+:10176000B797028183C7472C93C7170093F7F70FEA
+:10177000E39807FE13054006EFF01FEB130000008F
+:101780008320C1020324810213010103678000004A
+:10179000130101FF232681001304010193070000B8
+:1017A0001308000013850700930508000324C100F7
+:1017B0001301010167800000130101FE232E810047
+:1017C00013040102232604FE6F008004B767028120
+:1017D0000327C4FE131727009387C721B307F70019
+:1017E0001307300023A0E700B77702810327C4FE68
+:1017F000131727009387C721B307F70013072000AB
+:1018000023A0E7008327C4FE938717002326F4FE56
+:101810000327C4FE9307F00FE3DAE7FA1300000092
+:101820000324C1011301010267800000130101FDBF
+:10183000232611022324810213040103232EA4FC76
+:10184000B707008113858711EFE0DFF8232604FE38
+:101850006F0080058327C4FE638E07008327C4FEC4
+:1018600093F7F70063980700B70700811385C71344
+:10187000EFE05FF68327C4FE939727000327C4FD9C
+:10188000B307F70083A7070013850700EFE05FF8B1
+:10189000B707008113850714EFE0DFF38327C4FE49
+:1018A000938717002326F4FE0327C4FE9307F00F47
+:1018B000E3D2E7FAB707008113854714EFE09FF101
+:1018C000130000008320C1020324810213010103DD
+:1018D00067800000130101FF2326110023248100EB
+:1018E00013040101EFF05FEDB76702811385C72193
+:1018F000EFF0DFF393070000138507008320C1009A
+:0C19000003248100130101016780000036
 :02000004810079
 :10000000300000003100000032000000330000002A
 :10001000340000003500000036000000370000000A
diff --git a/kernel/vx_os/vx_back/vx_back.s b/kernel/vx_os/vx_back/vx_back.s
index 136d072d..e5be3bb7 100644
--- a/kernel/vx_os/vx_back/vx_back.s
+++ b/kernel/vx_os/vx_back/vx_back.s
@@ -6,7 +6,7 @@
 .type _start, @function
 .global _start
 _start:
-      la a0, 0xFF003300
+      la a0, 0x020000
       li a1, 7
       sw a1, 4(a0)
       nop
diff --git a/rtl/Makefile b/rtl/Makefile
index bc61f385..f7c6050a 100644
--- a/rtl/Makefile
+++ b/rtl/Makefile
@@ -11,18 +11,20 @@ EXE=--exe ./simulate/test_bench.cpp
 
 COMP=--compiler gcc
 
-WNO=-Wno-UNOPTFLAT -Wno-UNDRIVEN --Wno-PINMISSING -Wno-STMTDLY -Wno-WIDTH -Wno-UNSIGNED
+# WNO=-Wno-UNDRIVEN --Wno-PINMISSING -Wno-STMTDLY -Wno-WIDTH -Wno-UNSIGNED
+WNO=
 
-LIGHTW=-Wno-UNOPTFLAT
+LIGHTW=
+# LIGHTW=-Wno-UNOPTFLAT
 # LIB=-LDFLAGS '-L/usr/local/systemc/'
 LIB=
 
 CF=-CFLAGS '-std=c++11 -O3'
 
-DEB=--prof-cfuncs -DVL_DEBUG=1 --coverage --trace 
+DEB=--trace --prof-cfuncs -DVL_DEBUG=1 
 
 
-MAKECPP=(cd obj_dir && make -j -f VVortex.mk)
+MAKECPP=(cd obj_dir && make -j -f VVortex.mk OPT='-DVL_DEBUG' VL_DEBUG=1 DVL_DEBUG=1)
 
 # -LDFLAGS '-lsystemc'
 VERILATOR:
@@ -35,7 +37,7 @@ VERILATORnoWarnings:
 
 compdebug:
 	echo "#define VCD_OUTPUT" > simulate/tb_debug.h
-	verilator $(COMP) -cc $(FILE) $(INCLUDE) $(EXE) $(LIB) -CFLAGS '-std=c++11 -DVL_DEBUG' $(WNO)  $(DEB)
+	verilator_bin_dbg $(COMP) -cc $(FILE) $(INCLUDE) $(EXE) $(LIB) -CFLAGS '-std=c++11 -DVL_DEBUG' $(WNO)  $(DEB)
 
 RUNFILE: VERILATOR
 	$(MAKECPP)
diff --git a/rtl/VX_back_end.v b/rtl/VX_back_end.v
index c5f635b2..8b6f2b59 100644
--- a/rtl/VX_back_end.v
+++ b/rtl/VX_back_end.v
@@ -72,7 +72,8 @@ VX_gpr_stage VX_gpr_stage(
 
 
 VX_lsu load_store_unit(
-	// .clk          (clk),
+	.clk          (clk),
+	.reset        (reset),
 	.VX_lsu_req   (VX_lsu_req),
 	.VX_mem_wb    (VX_mem_wb),
 	.VX_dcache_rsp(VX_dcache_rsp),
diff --git a/rtl/VX_define.v b/rtl/VX_define.v
index 5e4fc370..92da0c32 100644
--- a/rtl/VX_define.v
+++ b/rtl/VX_define.v
@@ -11,6 +11,7 @@
 
 // `define SYN 1
 
+`define CACHE_NUM_BANKS 8
 
 `define NUMBER_BANKS 8
 `define NUM_WORDS_PER_BLOCK 4
diff --git a/rtl/VX_dmem_controller.v b/rtl/VX_dmem_controller.v
index 207c7d25..414e1c17 100644
--- a/rtl/VX_dmem_controller.v
+++ b/rtl/VX_dmem_controller.v
@@ -17,9 +17,7 @@ module VX_dmem_controller (
 	wire[`NT_M1:0]       sm_driver_in_valid     = VX_dcache_req.out_cache_driver_in_valid & {`NT{to_shm}};
 	wire[`NT_M1:0]       cache_driver_in_valid  = VX_dcache_req.out_cache_driver_in_valid & {`NT{~to_shm}};
 	
-	// Cache don't understand
-	wire initial_request = (|cache_driver_in_valid);
-	wire read_or_write   = (VX_dcache_req.out_cache_driver_in_mem_write != `NO_MEM_WRITE);
+	wire read_or_write   = (VX_dcache_req.out_cache_driver_in_mem_write != `NO_MEM_WRITE) && (|cache_driver_in_valid);
 
 
 
@@ -58,7 +56,8 @@ module VX_dmem_controller (
 		.i_p_read_or_write  (read_or_write),
 		.o_p_readdata       (cache_driver_out_data),
 		.o_p_delay          (cache_delay),
-		.o_m_addr           (VX_dram_req_rsp.o_m_addr),
+		.o_m_evict_addr     (VX_dram_req_rsp.o_m_evict_addr),
+		.o_m_read_addr      (VX_dram_req_rsp.o_m_read_addr),
 		.o_m_valid          (VX_dram_req_rsp.o_m_valid),
 		.o_m_writedata      (VX_dram_req_rsp.o_m_writedata),
 		.o_m_read_or_write  (VX_dram_req_rsp.o_m_read_or_write),
@@ -68,8 +67,7 @@ module VX_dmem_controller (
 
 
 	assign VX_dcache_rsp.in_cache_driver_out_data = to_shm ? sm_driver_out_data : cache_driver_out_data;
-	// assign VX_dcache_rsp.delay                    = sm_delay;
-	assign VX_dcache_rsp.delay                    = sm_delay || (!cache_delay);
+	assign VX_dcache_rsp.delay                    = sm_delay || cache_delay;
 
 
 endmodule
\ No newline at end of file
diff --git a/rtl/VX_front_end.v b/rtl/VX_front_end.v
index e11a18a9..7780dce5 100644
--- a/rtl/VX_front_end.v
+++ b/rtl/VX_front_end.v
@@ -25,10 +25,6 @@ VX_inst_meta_inter        fe_inst_meta_fd();
 VX_frE_to_bckE_req_inter VX_frE_to_bckE_req();
 VX_inst_meta_inter       fd_inst_meta_de();
 
-// From decode
-wire           decode_branch_stall;
-
-
 wire total_freeze = schedule_delay;
 
 /* verilator lint_off UNUSED */
diff --git a/rtl/VX_lsu.v b/rtl/VX_lsu.v
index bd6874b4..70955a4b 100644
--- a/rtl/VX_lsu.v
+++ b/rtl/VX_lsu.v
@@ -3,7 +3,8 @@
 
 
 module VX_lsu (
-		// input wire               clk,
+		input wire               clk,
+		input wire               reset,
 		VX_lsu_req_inter         VX_lsu_req,
 
 		// Write back to GPR
@@ -14,7 +15,7 @@ module VX_lsu (
 		output wire              out_delay
 	);
 
-	// VX_inst_mem_wb_inter VX_mem_wb_temp();
+	VX_inst_mem_wb_inter VX_mem_wb_temp();
 
 	assign out_delay = VX_dcache_rsp.delay;
 
@@ -33,32 +34,32 @@ module VX_lsu (
 	for (index = 0; index <= `NT_M1; index = index + 1) begin
 		assign VX_dcache_req.out_cache_driver_in_address[index]   = address[index];
 		assign VX_dcache_req.out_cache_driver_in_data[index]      = VX_lsu_req.store_data[index];
-		assign VX_dcache_req.out_cache_driver_in_valid[index]     = (VX_lsu_req.valid[index] && !VX_dcache_rsp.delay);
+		assign VX_dcache_req.out_cache_driver_in_valid[index]     = (VX_lsu_req.valid[index]);
 
-		assign VX_mem_wb.loaded_data[index]                       = VX_dcache_rsp.in_cache_driver_out_data[index];
+		assign VX_mem_wb_temp.loaded_data[index]                       = VX_dcache_rsp.in_cache_driver_out_data[index];
 	end
 
 		assign VX_dcache_req.out_cache_driver_in_mem_read  = VX_lsu_req.mem_read;
 		assign VX_dcache_req.out_cache_driver_in_mem_write = VX_lsu_req.mem_write;
 
 
-		assign VX_mem_wb.rd          = VX_lsu_req.rd;
-		assign VX_mem_wb.wb          = VX_lsu_req.wb;
-		assign VX_mem_wb.wb_valid    = VX_lsu_req.valid;
-		assign VX_mem_wb.wb_warp_num = VX_lsu_req.warp_num;
+		assign VX_mem_wb_temp.rd          = VX_lsu_req.rd;
+		assign VX_mem_wb_temp.wb          = VX_lsu_req.wb;
+		assign VX_mem_wb_temp.wb_valid    = VX_lsu_req.valid;
+		assign VX_mem_wb_temp.wb_warp_num = VX_lsu_req.warp_num;
 
 
 
-	// wire zero_temp = 0;
-	// VX_generic_register #(.N(256)) register_wb_data 
-	// (
-	// 	.clk  (clk),
-	// 	.reset(zero_temp),
-	// 	.stall(zero_temp),
-	// 	.flush(zero_temp),
-	// 	.in   ({VX_mem_wb_temp.loaded_data, VX_mem_wb_temp.rd, VX_mem_wb_temp.wb, VX_mem_wb_temp.wb_valid, VX_mem_wb_temp.wb_warp_num}),
-	// 	.out  ({VX_mem_wb.loaded_data     , VX_mem_wb.rd     , VX_mem_wb.wb     , VX_mem_wb.wb_valid     , VX_mem_wb.wb_warp_num     })
-	// );
+	wire zero_temp = 0;
+	VX_generic_register #(.N(142)) register_wb_data 
+	(
+		.clk  (clk),
+		.reset(reset),
+		.stall(zero_temp),
+		.flush(out_delay),
+		.in   ({VX_mem_wb_temp.loaded_data, VX_mem_wb_temp.rd, VX_mem_wb_temp.wb, VX_mem_wb_temp.wb_valid, VX_mem_wb_temp.wb_warp_num}),
+		.out  ({VX_mem_wb.loaded_data     , VX_mem_wb.rd     , VX_mem_wb.wb     , VX_mem_wb.wb_valid     , VX_mem_wb.wb_warp_num     })
+	);
 
 
 endmodule // Memory
diff --git a/rtl/VX_priority_encoder_w_mask.v b/rtl/VX_priority_encoder_w_mask.v
index 365df62f..e5e2c7b9 100644
--- a/rtl/VX_priority_encoder_w_mask.v
+++ b/rtl/VX_priority_encoder_w_mask.v
@@ -10,16 +10,15 @@ module VX_priority_encoder_w_mask
   );
 
 	integer i;
-	always @(*) begin
+	always @(valids) begin
 		index = 0;
 		found = 0;
 		mask  = 0;
-		for (i = 0; i < N; i=i+1) 
-		begin
-			if (!found && valids[i]) begin
+		for (i = 0; i < N; i=i+1) begin
+			if (valids[i]) begin
 				index = i[$clog2(N)-1:0];
 				found = 1;
-				mask[i[$clog2(N)-1:0]] = 1;
+				mask[i[$clog2(N)-1:0]] = 1 << i;
 			end
 		end
 	end
diff --git a/rtl/Vortex.v b/rtl/Vortex.v
index 86f9e8ae..359cbbce 100644
--- a/rtl/Vortex.v
+++ b/rtl/Vortex.v
@@ -8,7 +8,8 @@ module Vortex(
 	input  wire[31:0] icache_response_instruction,
 	output wire[31:0] icache_request_pc_address,
 	// Req
-    output reg [31:0]  o_m_addr,
+    output reg [31:0]  o_m_read_addr,
+    output reg [31:0]  o_m_evict_addr,
     output reg         o_m_valid,
     output reg [31:0]  o_m_writedata[`NUMBER_BANKS - 1:0][`NUM_WORDS_PER_BLOCK-1:0],
     output reg         o_m_read_or_write,
@@ -16,32 +17,9 @@ module Vortex(
     // Rsp
     input  wire [31:0] i_m_readdata[`NUMBER_BANKS - 1:0][`NUM_WORDS_PER_BLOCK-1:0],
     input  wire        i_m_ready,
-	// Remove Start
-	input  wire[31:0]     in_cache_driver_out_data[`NT_M1:0],
-	output wire[31:0]     out_cache_driver_in_address[`NT_M1:0],
-	output wire[2:0]      out_cache_driver_in_mem_read,
-	output wire[2:0]      out_cache_driver_in_mem_write,
-	output wire           out_cache_driver_in_valid[`NT_M1:0],
-	output wire[31:0]     out_cache_driver_in_data[`NT_M1:0],
-	// Remove end
-	output wire           out_ebreak
+	output wire        out_ebreak
 	);
 
-// assign out_cache_driver_in_address   = 0;
-assign out_cache_driver_in_mem_read  = `NO_MEM_READ;
-assign out_cache_driver_in_mem_write = `NO_MEM_WRITE;
-// assign out_cache_driver_in_valid     = 0;
-// assign out_cache_driver_in_data      = 0;
-
-// assign out_cache_driver_in_address   = VX_dcache_req.out_cache_driver_in_address;
-// assign out_cache_driver_in_mem_read  = VX_dcache_req.out_cache_driver_in_mem_read;
-// assign out_cache_driver_in_mem_write = VX_dcache_req.out_cache_driver_in_mem_write;
-// assign out_cache_driver_in_valid     = VX_dcache_req.out_cache_driver_in_valid;
-// assign out_cache_driver_in_data      = VX_dcache_req.out_cache_driver_in_data;
-
-// assign VX_dcache_rsp.in_cache_driver_out_data = in_cache_driver_out_data;
-
-
 // Dcache Interface
 
 VX_dcache_response_inter VX_dcache_rsp();
@@ -50,7 +28,8 @@ VX_dcache_request_inter  VX_dcache_req();
 
 VX_dram_req_rsp_inter    VX_dram_req_rsp();
 
-assign o_m_addr          = VX_dram_req_rsp.o_m_addr;
+assign o_m_read_addr     = VX_dram_req_rsp.o_m_read_addr;
+assign o_m_evict_addr    = VX_dram_req_rsp.o_m_evict_addr;
 assign o_m_valid         = VX_dram_req_rsp.o_m_valid;
 assign o_m_read_or_write = VX_dram_req_rsp.o_m_read_or_write;
 
@@ -61,7 +40,6 @@ genvar curr_word;
 for (curr_bank = 0; curr_bank < `NUMBER_BANKS; curr_bank = curr_bank + 1) begin
 
 	for (curr_word = 0; curr_word < `NUM_WORDS_PER_BLOCK; curr_word = curr_word + 1) begin
-
 		assign o_m_writedata[curr_bank][curr_word]                = VX_dram_req_rsp.o_m_writedata[curr_bank][curr_word];
 		assign VX_dram_req_rsp.i_m_readdata[curr_bank][curr_word] = i_m_readdata[curr_bank][curr_word];
 
diff --git a/rtl/cache/VX_Cache_Bank.v b/rtl/cache/VX_Cache_Bank.v
index 894bc593..9668c4d7 100644
--- a/rtl/cache/VX_Cache_Bank.v
+++ b/rtl/cache/VX_Cache_Bank.v
@@ -46,7 +46,7 @@ module VX_Cache_Bank
     // Inputs
     input wire clk;
     input wire [3:0] state;
-    //input wire write_from_mem;
+//input wire write_from_mem;
 
       // Reading Data
     input wire[$clog2(NUMBER_INDEXES)-1:0] actual_index;
@@ -118,7 +118,6 @@ module VX_Cache_Bank
         .evict     (write_from_mem),
         .data_write(data_write),
         .tag_write (o_tag),
-
         // Outputs
         .tag_use   (tag_use),
         .data_use  (data_use),
diff --git a/rtl/cache/VX_d_cache.v b/rtl/cache/VX_d_cache.v
index 8c9bae39..4feb4c86 100644
--- a/rtl/cache/VX_d_cache.v
+++ b/rtl/cache/VX_d_cache.v
@@ -10,7 +10,7 @@
 
 `include "../VX_define.v"
 //`include "VX_priority_encoder.v"
-`include "VX_Cache_Bank.v"
+// `include "VX_Cache_Bank.v"
 //`include "cache_set.v"
 
 
@@ -102,7 +102,6 @@ module VX_d_cache(clk,
 
 
 
-    reg[`NT_M1:0] threads_serviced_Qual;
 
     VX_cache_bank_valid #(.NUMBER_BANKS(NUMBER_BANKS)) multip_banks(
       .i_p_valid         (use_valid),
@@ -111,38 +110,52 @@ module VX_d_cache(clk,
       );
 
 
-    reg detect_bank_conflict;
-    genvar bank_ind;
-    for (bank_ind = 0; bank_ind < NUMBER_BANKS; bank_ind=bank_ind+1)
-    begin
-      assign detect_bank_conflict = detect_bank_conflict | ($countones(thread_track_banks[bank_ind]) > 1);
-    
-      VX_priority_encoder_w_mask #(.N(`NT)) choose_thread(
-        .valids(thread_track_banks[bank_ind]),
-        .mask  (use_mask_per_bank[bank_ind]),
-        .index (index_per_bank[bank_ind]),
-        .found (valid_per_bank[bank_ind])
-        );
+    reg[`NT_M1:0] threads_serviced_Qual;
+    // reg           detect_bank_conflict;
+    // genvar bank_ind;
+    // always @(*) begin
+    //   for (bank_ind = 0; bank_ind < NUMBER_BANKS; bank_ind=bank_ind+1)
+    //   begin
+    //     detect_bank_conflict = detect_bank_conflict | ($countones(thread_track_banks[bank_ind]) > 1);
 
-      ////////////////
-
-      assign new_final_data_read[index_per_bank[bank_ind]] = hit_per_bank[bank_ind] ? readdata_per_bank[bank_ind] : 0;
-
-      assign threads_serviced_per_bank[bank_ind] = use_mask_per_bank[bank_ind] & {`NT{hit_per_bank[bank_ind]}};
-
-    end
+    //   end
+    // end
 
     genvar bid;
     for (bid = 0; bid < NUMBER_BANKS; bid=bid+1)
     begin
-      assign threads_serviced_Qual = threads_serviced_Qual | threads_serviced_per_bank[bid];
+      wire[`NT_M1:0] use_threads_track_banks = thread_track_banks[bid];
+        VX_priority_encoder_w_mask #(.N(`NT)) choose_thread(
+          .valids(use_threads_track_banks),
+          .mask  (use_mask_per_bank[bid]),
+          .index (index_per_bank[bid]),
+          .found (valid_per_bank[bid])
+          );
+
+        assign new_final_data_read[index_per_bank[bid]] = hit_per_bank[bid] ? readdata_per_bank[bid] : 0;
+
+        assign threads_serviced_per_bank[bid] = use_mask_per_bank[bid] & {`NT{hit_per_bank[bid]}};
     end
 
 
-    wire[NUMBER_BANKS - 1 : 0] detect_bank_miss = (valid_per_bank & ~hit_per_bank);
+    // genvar tid;
+
+    assign threads_serviced_Qual = threads_serviced_per_bank[0] | threads_serviced_per_bank[1] | threads_serviced_per_bank[2] | threads_serviced_per_bank[3] | threads_serviced_per_bank[4] | threads_serviced_per_bank[5] | threads_serviced_per_bank[6] | threads_serviced_per_bank[7];
+    // for(tid = 0; tid )
+    wire[NUMBER_BANKS - 1 : 0] detect_bank_miss;
+    // genvar bbid;
+    // always @(*) begin
+    //   for (bbid = 0; bbid < NUMBER_BANKS; bbid=bbid+1)
+    //   begin
+    //     assign threads_serviced_Qual = threads_serviced_Qual | threads_serviced_per_bank[bbid];
+    //   end
+    // end
+
+
+    assign detect_bank_miss = (valid_per_bank & ~hit_per_bank);
 
     wire   delay;
-    assign delay = (new_stored_valid != 0); // add other states
+    assign delay = (new_stored_valid != 0) || (state != CACHE_IDLE); // add other states
 
     assign o_p_delay = delay;
 
@@ -173,7 +186,7 @@ module VX_d_cache(clk,
   always @(posedge clk) begin
     state           <= new_state;
 
-    if (state == CACHE_IDLE) stored_valid    <= new_stored_valid;
+    stored_valid    <= new_stored_valid;
 
     if (miss_found) begin
       miss_addr   <= i_p_addr[send_index_to_bank[miss_bank_index]];
@@ -220,10 +233,10 @@ module VX_d_cache(clk,
           .readdata         (readdata_per_bank[bank_id]),          // Data read
           .eviction_addr    (eviction_addr_per_bank[bank_id]), 
           .data_evicted     (o_m_writedata[bank_id]),
-          .eviction_wb      (eviction_wb[bank_ind]),       // Something needs to be written back
+          .eviction_wb      (eviction_wb[bank_id]),       // Something needs to be written back
 
 
-          .fetched_writedata(i_m_readdata[bank_ind]) // Data From memory
+          .fetched_writedata(i_m_readdata[bank_id]) // Data From memory
         );
 
       end
diff --git a/rtl/cache/VX_d_cache_old.v b/rtl/cache/VX_d_cache_old.v
deleted file mode 100644
index e8361055..00000000
--- a/rtl/cache/VX_d_cache_old.v
+++ /dev/null
@@ -1,568 +0,0 @@
-// Cache Memory (8way 4word)               //
-// i_  means input port                    //
-// o_  means output port                   //
-// _p_  means data exchange with processor //
-// _m_  means data exchange with memory    //
-
-
-// TO DO:
-//   - Send in a response from memory of what the data is from the test bench
-
-`include "VX_define.v"
-//`include "VX_priority_encoder.v"
-`include "VX_Cache_Bank.v"
-//`include "cache_set.v"
-
-
-module VX_d_cache(clk,
-               rst,
-               i_p_initial_request,
-               i_p_addr,
-               //i_p_byte_en,
-               i_p_writedata,
-               i_p_read_or_write, // 0 = Read | 1 = Write
-               i_p_valid,
-               //i_p_write,
-               o_p_readdata,
-               o_p_readdata_valid,
-               o_p_waitrequest, // 0 = all threads done | 1 = Still threads that need to 
-
-               o_m_addr,
-               //o_m_byte_en,
-               o_m_writedata,
-               
-               o_m_read_or_write, // 0 = Read | 1 = Write
-               o_m_valid,
-               //o_m_write,
-               i_m_readdata,
-
-               //i_m_readdata_ready,
-               //i_m_waitrequest,
-               i_m_ready
-
-               //cnt_r,
-               //cnt_w,
-               //cnt_hit_r,
-               //cnt_hit_w
-               //cnt_wb_r,
-               //cnt_wb_w
-     );
-
-    parameter NUMBER_BANKS = 8;
-
-    localparam CACHE_IDLE = 0; // Idle
-    localparam SORT_BY_BANK = 1; // Determines the bank each thread will access
-    localparam INITIAL_ACCESS = 2; // Accesses the bank and checks if it is a hit or miss
-    localparam INITIAL_PROCESSING = 3; // Check to see if there were misses 
-    localparam CONTINUED_PROCESSING = 4; // Keep checking status of banks that need to be written back or fetched
-    localparam DIRTY_EVICT_GRAB_BLOCK = 5; // Grab the full block of dirty data
-    localparam DIRTY_EVICT_WB = 6; // Write back this block into memory
-    localparam FETCH_FROM_MEM = 7; // Send a request to mem looking for read data
-    localparam FETCH2 = 8; // Stall until memory gets back with the data
-    localparam UPDATE_CACHE  = 9; // Update the cache with the data read from mem
-    localparam RE_ACCESS = 10; // Access the cache after the block has been fetched from memory
-    localparam RE_ACCESS_PROCESSING = 11; // Access the cache after the block has been fetched from memory
-   
-    
-    //parameter cache_entry = 9;
-    input wire         clk, rst;
-    input wire [`NT_M1:0] i_p_valid;
-    //input wire [`NT_M1:0][24:0]  i_p_addr; // FIXME
-    input wire  [`NT_M1:0][31:0] i_p_addr; // FIXME
-    input wire         i_p_initial_request;
-    //input wire [3:0]   i_p_byte_en;
-    input wire [`NT_M1:0][31:0]  i_p_writedata;
-    input wire         i_p_read_or_write; //, i_p_write;
-    output reg [`NT_M1:0][31:0]  o_p_readdata;
-    output reg [`NT_M1:0]        o_p_readdata_valid;
-    output wire        o_p_waitrequest;
-    //output reg [24:0]  o_m_addr; // Only one address is sent out at a time to memory -- FIXME
-    output reg [31:0]  o_m_addr; // Address is xxxxxxxxxxoooobbbyy
-    output reg         o_m_valid;
-    //output wire [255:0][31:0]         evicted_data;
-    //output wire [3:0]  o_m_byte_en;
-    //output reg [(NUMBER_BANKS * 32) - 1:0] o_m_writedata;
-    output reg[NUMBER_BANKS - 1:0][`NUM_WORDS_PER_BLOCK-1:0][31:0] o_m_writedata;
-    output reg         o_m_read_or_write; //, o_m_write;
-    //input wire [(NUMBER_BANKS * 32) - 1:0] i_m_readdata;  // Read Data that is passed from the memory module back to the controller
-    input wire[NUMBER_BANKS - 1:0][`NUM_WORDS_PER_BLOCK-1:0][31:0] i_m_readdata;
-    //input wire         i_m_readdata_ready;
-    //input wire         i_m_waitrequest;
-    input wire i_m_ready;
-
-    //output reg [31:0]  cnt_r;
-    //output reg [31:0]  cnt_w;
-    //output reg [31:0]  cnt_hit_r;
-    //output reg [31:0]  cnt_hit_w;
-    //output reg [31:0]  cnt_wb_r;
-    //output reg [31:0]  cnt_wb_w;        
-  
-    //wire [1:0] tag [`NT_M1:0];
-    //wire [3:0] index [`NT_M1:0];
-    //wire [2:0] bank [`NT_M1:0];
-    //wire all_done;
-
-    //integer i;
-    reg [`NT_M1:0] thread_done; // Maybe should have "thread_serviced" and "thread_done", serviced==checked cache
-    //reg [`NT_M1:0] thread_serviced; // Maybe should have "thread_serviced" and "thread_done", serviced==checked cache
-    reg [NUMBER_BANKS - 1:0] banks_ready;
-    //reg [NUMBER_BANKS - 1:0] banks_missed;
-    reg [NUMBER_BANKS - 1:0] banks_to_service;
-    reg [NUMBER_BANKS - 1:0] banks_wb_needed;
-    reg [NUMBER_BANKS - 1:0][31:0] banks_wb_addr;
-    //reg [NUMBER_BANKS - 1:0] bank_states;
-    //reg [NUMBER_BANKS - 1:0][31:0] banks_wb_data;
-    //reg [NUMBER_BANKS - 1:0][13:0] banks_in_addr;
-    
-
-    reg [3:0] state;
-    reg [NUMBER_BANKS - 1:0][31:0] data_from_bank;
-    //reg got_valid_data;
-    //reg [31:0] data_to_write;
-
-
-    //reg [`NT_M1:0] thread_track_bank_0;
-    //reg [`NT_M1:0] thread_track_bank_1;
-    //reg [`NT_M1:0] thread_track_bank_2;
-    //reg [`NT_M1:0] thread_track_bank_3;
-    //reg [`NT_M1:0] thread_track_bank_4;
-    //reg [`NT_M1:0] thread_track_bank_5;
-    //reg [`NT_M1:0] thread_track_bank_6;
-    //reg [`NT_M1:0] thread_track_bank_7;
-    reg [NUMBER_BANKS - 1 : 0][`NT_M1:0] thread_track_banks;
-    reg [NUMBER_BANKS - 1 : 0] bank_has_access;  // Will track if a bank has been accessed in this cycle
-    reg [NUMBER_BANKS - 1 : 0][31:0] bank_access_addr;
-    reg [NUMBER_BANKS - 1 : 0][31:0] bank_access_data;
-    reg [NUMBER_BANKS - 1 : 0][1:0] threads_in_banks;
-
-
-    //reg [1:0] thread_in_memory; // keeps track of threadID which is in memory
-    reg rd_or_wr;
-    //reg did_miss, needs_service; Commented out Oct 21
-
-    integer bnk;
-    integer found;
-    integer t_id;
-    //integer num_misses;
-    //integer num_evictions_to_wb;
-    integer i;    //reg [1:0] correct_tag;
-    integer index;
-    //reg [3:0] correct_index;
-
-    //assign tag = i_p_addr[13:12];
-
-    assign o_p_waitrequest =  (thread_done == 4'hF) ? 1'b0 : 1'b1; // change thread_done to be generic
-    //assign did_miss = (banks_missed != 8'h0) ?  1'b1 : 1'b0;
-    //assign needs_service = ((banks_to_service != 8'b0 || banks_to_service_temp != 8'b0)) ? 1'b1 : 1'b0; // added banks_to_service temp
-    //assign w_Test1 = r_Check  ? 1'b1  : 1'b0;
-    //for ( i = 0;i < `NT_M1;i = i + 1) begin
-     // assign tag[i] = i_p_addr[i][13:12];
-
-     // Fares
-//     wire no_bank_misses;
-//     assign no_bank_misses = banks_to_service != 8'b0;
-
-     reg[NUMBER_BANKS - 1:0] banks_to_service_temp;
-     reg[NUMBER_BANKS - 1:0] banks_to_wb;
-     reg[NUMBER_BANKS - 1:0] banks_to_wb_temp;
-     reg[NUMBER_BANKS - 1:0] banks_all_help;
-    
-
-    always @(posedge clk) begin 
-      if (rst) begin 
-        state <= CACHE_IDLE;
-        //banks_ready <= 8'b0;
-        //cnt_r <= 0;
-        //cnt_w <= 0;
-        //cnt_hit_r <= 0;
-        //cnt_hit_w <= 0;
-        //cnt_wb_r <= 0;
-        //cnt_wb_w <= 0;
-
-      end else begin
-        // Change Logic of which state the cache is in
-        case (state)
-          CACHE_IDLE:begin
-            if (i_p_initial_request == 1'b1) begin 
-              state <= SORT_BY_BANK;
-            end
-          end
-          SORT_BY_BANK:begin
-            state <= INITIAL_ACCESS;
-          end
-          INITIAL_ACCESS:begin 
-            if (thread_done == 4'hF) begin
-              state <= CACHE_IDLE;
-            end else begin
-              state <= INITIAL_PROCESSING;
-            end
-          end
-          INITIAL_PROCESSING:begin 
-            //if (bank_has_access == banks_ready ) begin // if all hits
-            if (thread_done == 4'hF) begin
-              state <= INITIAL_ACCESS;
-            end else begin
-              state <= CONTINUED_PROCESSING;
-            end
-
-          end          
-          CONTINUED_PROCESSING:begin
-            if (banks_to_wb == 8'b0 && banks_to_service == 8'b0) begin // If all threads are done, then the cache can go back into idle state (not currently fetching any requests)
-            //if (banks_to_wb_temp == 8'b0 && banks_to_service_temp == 8'b0) begin
-              state <= INITIAL_ACCESS;
-            //end else if (num_misses > 0) begin
-            end else if ((banks_to_wb != 8'b0)) begin // change 1pm
-            //end else if ((banks_to_wb_temp != 8'b0)) begin // change 1pm
-              state <= DIRTY_EVICT_GRAB_BLOCK;
-            //end else if (did_miss == 1'b1 || needs_service == 1'b1) begin
-            end else if(banks_to_service != 8'b0) begin
-            //end else if(banks_to_service_temp != 8'b0) begin
-              state <= FETCH_FROM_MEM;
-           // end else if (did_miss == 1'b0 && num_evictions_to_wb > 0) begin
-            //end else if (needs_service == 1'b0 && did_miss == 1'b0 && (banks_to_wb != 8'b0)) begin
-            //end else if (did_miss == 1'b0 && needs_service == 1'b0) begin
-              //state <= INITIAL_ACCESS;
-            end            
-          end
-          FETCH_FROM_MEM:begin
-            state <= FETCH2;
-          end
-          FETCH2:begin
-            if (i_m_ready == 1'b1) begin
-              state <= UPDATE_CACHE; // Not sure about this one !!!!!! Check
-            end else begin
-              state <= FETCH2;
-            end
-          end
-          UPDATE_CACHE:begin
-            state <= RE_ACCESS;
-          end
-          RE_ACCESS:begin
-            state <= CONTINUED_PROCESSING;
-          end
-          RE_ACCESS_PROCESSING: begin
-            state <= CONTINUED_PROCESSING;
-          end
-          DIRTY_EVICT_GRAB_BLOCK:begin
-            state <= DIRTY_EVICT_WB;
-          end
-          DIRTY_EVICT_WB:begin
-            state <= CONTINUED_PROCESSING;
-          end
-        endcase
-      end
-
-      //tag[`NT_M1:0] <= i_p_addr[`NT_M1:0][13:12]; 
-    end
-
-    // Change values which will be fed into the cache
-    always @(*) begin
-        case (state)
-          CACHE_IDLE:begin
-            thread_done = 0;
-            o_m_read_or_write = 0;
-            o_m_valid = 0;
-            o_m_writedata = 0;
-            o_p_readdata = 0;
-            o_p_readdata_valid = 0;
-            bank_has_access = 8'b0;
-            //bank_states = CACHE_IDLE;
-            //thread_track_bank_0 = 4'b0;
-            //thread_track_bank_1 = 4'b0;
-            //thread_track_bank_2 = 4'b0;
-            //thread_track_bank_3 = 4'b0;
-            //thread_track_bank_4 = 4'b0;
-            //thread_track_bank_5 = 4'b0;
-            //thread_track_bank_6 = 4'b0;
-            //thread_track_bank_7 = 4'b0;
-            for (bnk = 0; bnk < NUMBER_BANKS; bnk = bnk + 1) begin
-              thread_track_banks[bnk] = 4'b0;
-            end
-          end
-          SORT_BY_BANK:begin
-            //bank_states = SORT_BY_BANK;
-            rd_or_wr = i_p_read_or_write;
-            for (t_id = 0; t_id <= `NT_M1; t_id = t_id + 1) begin
-              //t_id = {1'b0,t_id};
-              if (i_p_valid[t_id] == 1'b0) begin
-                thread_done[t_id] = 1'b1;
-              end
-               //if (i_p_valid[t_id] == 1'b1 && thread_done[t_id] == 1'b0) begin // Need logic for thread done
-              else  if (i_p_addr[t_id][4:2] == 3'b000) begin
-                  //banks_in_addr[0] = i_p_addr[t_id]; // WIll need to do this later
-                  //thread_track_bank_0[t_id] = 1'b1;
-                  thread_track_banks[0][t_id] = 1'b1;
-              end
-              else if (i_p_addr[t_id][4:2] == 3'b001) begin // !!!!!!!
-                  //banks_in_addr[0] = i_p_addr[t_id]; // WIll need to do this later
-                  //thread_track_bank_1[t_id] = 1'b1;
-                  thread_track_banks[1][t_id] = 1'b1;
-              end
-              else if (i_p_addr[t_id][4:2] == 3'b010) begin
-                  //banks_in_addr[0] = i_p_addr[t_id]; // WIll need to do this later
-                  //thread_track_bank_2[t_id] = 1'b1;
-                  thread_track_banks[2][t_id] = 1'b1;
-              end
-              else if (i_p_addr[t_id][4:2] == 3'b011) begin
-                  //banks_in_addr[0] = i_p_addr[t_id]; // WIll need to do this later
-                  //thread_track_bank_3[t_id] = 1'b1;
-                  thread_track_banks[3][t_id] = 1'b1;
-              end
-              else if (i_p_addr[t_id][4:2] == 3'b100) begin
-                  //banks_in_addr[0] = i_p_addr[t_id]; // WIll need to do this later
-                  //thread_track_bank_4[t_id] = 1'b1;
-                  thread_track_banks[4][t_id] = 1'b1;
-              end
-              else if (i_p_addr[t_id][4:2] == 3'b101) begin
-                  //banks_in_addr[0] = i_p_addr[t_id]; // WIll need to do this later
-                  //thread_track_bank_5[t_id] = 1'b1;
-                  thread_track_banks[5][t_id] = 1'b1;
-              end
-              else if (i_p_addr[t_id][4:2] == 3'b110) begin
-                  //banks_in_addr[0] = i_p_addr[t_id]; // WIll need to do this later
-                  //thread_track_bank_6[t_id] = 1'b1;
-                  thread_track_banks[6][t_id] = 1'b1;
-            end
-              else if (i_p_addr[t_id][4:2] == 3'b111) begin
-                  //banks_in_addr[0] = i_p_addr[t_id]; // WIll need to do this later
-                  //thread_track_bank_7[t_id] = 1'b1;
-                  thread_track_banks[7][t_id] = 1'b1;
-              end
-            end
-          end
-          INITIAL_ACCESS:begin
-            //bank_states = INITIAL_ACCESS;
-            o_m_valid = 1'b0;
-
-            // Before Access
-//            if (no_bank_misses) begin
-              // Dont do anything, next clock cycle it will switch back to (Fetch from mem)
-//            end else begin // Do logic to send requests to each bank (look through thread_track_bank regs)
-            bank_has_access = 8'b0;
-            for (t_id = 0; t_id <= `NT_M1; t_id = t_id + 1) begin
-              for (bnk = 0; bnk < NUMBER_BANKS; bnk = bnk + 1) begin
-                if(thread_track_banks[bnk][t_id] == 1'b1 && bank_has_access[bnk] == 1'b0) begin
-                  bank_has_access[bnk] = 1'b1;
-                  bank_access_data[bnk] = i_p_writedata[t_id];
-                  bank_access_addr[bnk] = i_p_addr[t_id];
-                  threads_in_banks[bnk] = t_id[1:0];
-                end
-              end 
-                //if (banks_wb_needed[bnk]) begin // need to fix this for multiple misses
-                  //o_m_read_or_write = 1'b0;
-                  //o_m_addr = banks_wb_addr[bnk];
-                  //o_m_valid = 1'b1;
-                  //o_m_writedata = {banks_wb_data[bnk], 96'b0};
-                //end
-                //if(thread_track_bank_0[t_id] == 1'b1 && bank_has_access[0] == 1'b0) begin
-                  //bank_has_access[0] = 1'b1;
-                  //bank_access_data[0] = i_p_writedata[t_id];
-                  //bank_access_addr[0] = i_p_addr[t_id];
-                  //threads_in_banks[0] = t_id;
-                //end
-                // NEED TO UPDATE HITS (STORE IN THREADS_DONE)
-            end 
-              //num_misses = {28'b0, $countones(banks_missed)};
-              //did_miss = (banks_missed == 4'hF);
-              
-//            end
-
-
-          end
-          INITIAL_PROCESSING:begin
-            for (bnk = 0; bnk < NUMBER_BANKS; bnk = bnk + 1) begin
-                if(banks_ready[bnk]) begin // FIX to handle hits
-                  thread_done[threads_in_banks[bnk]] = 1'b1;
-                  o_p_readdata[threads_in_banks[bnk]] = data_from_bank[bnk];
-                  if(i_p_read_or_write == 1'b0) begin
-                    o_p_readdata_valid[threads_in_banks[bnk]] = 1'b1;
-                  end
-                  thread_track_banks[bnk][threads_in_banks[bnk]] = 1'b0; // Update that this thread does not need to be serviced again
-                end
-            end             
-            //banks_to_service_temp = !banks_ready; // These are clean misses
-            for (bnk = 0; bnk < NUMBER_BANKS; bnk = bnk + 1) begin
-              assign banks_to_service_temp[bnk] = (banks_ready[bnk] || (bank_has_access[bnk] == 0)) ? 1'b0 : 1'b1;
-              assign banks_to_wb_temp[bnk] = (banks_wb_needed[bnk]);
-              assign banks_all_help[bnk] = banks_to_service_temp[bnk] || banks_to_wb_temp[bnk];
-            end 
-            //bank_has_access = 8'b0; // Oct 23
-          end
-          CONTINUED_PROCESSING:begin
-            //for (i = `NW-1; i >= 0; i = i - 1) begin
-            //  if (thread_done[threads_in_banks[bnk]] == 1'b1) begin // Not sure about this logic
-            //    //index = i[`NW_M1:0];
-            //    banks_to_service_temp[i] = 1'b0;
-            //    banks_to_wb_temp[i] = 1'b0; 
-            // end
-            //end
-            
-            for (bnk = 0; bnk < NUMBER_BANKS; bnk = bnk + 1) begin
-                if(banks_ready[bnk]) begin // FIX to handle hits
-                  thread_done[threads_in_banks[bnk]] = 1'b1;
-                  o_p_readdata[threads_in_banks[bnk]] = data_from_bank[bnk];
-                  if(i_p_read_or_write == 1'b0) begin
-                    o_p_readdata_valid[threads_in_banks[bnk]] = 1'b1;
-                  end
-                  thread_track_banks[bnk][threads_in_banks[bnk]] = 1'b0; // Update that this thread does not need to be serviced again
-                  // Added Oct 21
-                  banks_to_service_temp[bnk] = 1'b0;
-                  banks_to_wb_temp[bnk] = 1'b0;
-                end
-            end 
-            bank_has_access = 8'b0; // Oct 23
-          end
-          FETCH_FROM_MEM:begin 
-            // NEED TO ADD LOGIC TO SEE IF MISSES GO TO SAME BLOCK
-            index = 0;
-            found = 0;
-            for (i = `NW-1; i >= 0; i = i - 1) begin
-              if (banks_to_service[i]) begin // Not sure about this logic
-                //index = i[`NW_M1:0];
-                index = i;
-                found = 1;  
-              end
-            end
-            if (found == 1) begin
-              //banks_missed[index] = 0;
-              //thread_done
-              
-              //thread_in_memory = threads_in_banks[index];
-              //o_m_writedata = bank_access_data[index];
-              banks_to_service_temp[index] = 0;
-              o_m_addr = bank_access_addr[index];
-              o_m_valid = 1'b1;
-              o_m_read_or_write = 1'b0;
-            end
-            //bank_states = FETCH_FROM_MEM;
-          end
-          FETCH2:begin
-            o_m_valid = 1'b0;
-          end
-          UPDATE_CACHE:begin
-            for (bnk = 0; bnk < NUMBER_BANKS; bnk = bnk + 1) begin
-              //if(thread_track_banks[bnk][t_id] == 1'b1 && bank_has_access[bnk] == 1'b0) begin
-                bank_has_access[bnk] = 1'b1;
-                //bank_access_data[bnk] = i_m_readdata[(bnk+1)*32 - 1:bnk*32];
-                bank_access_addr[bnk] = o_m_addr;
-                threads_in_banks[bnk] = t_id[1:0];
-              //end
-            end 
-            //bank_access_data = i_m_readdata;
-            rd_or_wr = 1'b1;
-            //thread_done[thread_in_memory] = 1'b1;   // Removed, new cache style - Oct 21
-            //o_p_readdata[thread_in_memory] = i_m_readdata[i_p_addr[thread_in_memory][9:5]]; // Removed, new cache style
-          end
-          DIRTY_EVICT_WB:begin       // this begininng logic should be added to dirty evict grab block     
-
-            //thread_done[thread_in_memory] = 1'b1;
-            bank_has_access = 8'b0;
-            o_m_valid = 1'b1;
-          end
-          DIRTY_EVICT_GRAB_BLOCK:begin
-            index = 0;
-            found = 0;
-            for (i = `NW-1; i >= 0; i = i - 1) begin
-              if (banks_to_wb_temp[i]) begin
-                //index = i[`NW_M1:0];
-                index = i;
-                found = 1;
-              end
-            end
-            if (found == 1) begin
-              banks_to_wb_temp[index] = 0;
-              for (i = `NW-1; i >= 0; i = i - 1) begin
-                if (banks_to_wb_temp[i] && banks_wb_addr[index][31:7] == banks_wb_addr[i][31:7]) begin
-                  //index = i[`NW_M1:0];
-                  banks_to_wb_temp[i] = 0;
-                end
-              end
-              //thread_done
-              //thread_in_memory = threads_in_banks[index];
-              //o_m_writedata[(bnk+1)*32 - 1:bnk*32] = banks_wb_data[index];
-              o_m_addr = banks_wb_addr[index];
-              o_m_read_or_write = 1'b1;
-            end
-            //for (bnk = 0; bnk < NUMBER_BANKS; bnk = bnk + 1) begin
-              //o_m_writedata[(bnk+1)*32 - 1:bnk*32] = banks_wb_data[index];
-            //end 
-            // NEXT LINE CONTAINS DATA TO WB !!!! Think need to just change this to be read data and can remove banks_wb_data
-            //o_m_writedata = {banks_wb_data[7],banks_wb_data[6],banks_wb_data[5],banks_wb_data[4],banks_wb_data[3],banks_wb_data[2],banks_wb_data[1],banks_wb_data[0]};
-            //num_evictions_to_wb = {28'b0, $countones(banks_wb_needed)};
-            rd_or_wr = 1'b0;
-            for (bnk = 0; bnk < NUMBER_BANKS; bnk = bnk + 1) begin
-              //if(thread_track_banks[bnk][t_id] == 1'b1 && bank_has_access[bnk] == 1'b0) begin
-                bank_has_access[bnk] = 1'b1;
-                bank_access_addr[bnk] = o_m_addr;
-              //end
-            end             
-          end
-          RE_ACCESS:begin
-            //bank_states = INITIAL_ACCESS;
-            o_m_valid = 1'b0;
-
-            // Before Access
-//            if (no_bank_misses) begin
-              // Dont do anything, next clock cycle it will switch back to (Fetch from mem)
-//            end else begin // Do logic to send requests to each bank (look through thread_track_bank regs)
-            //bank_has_access = banks_all_help & !(banks_to_wb) & !(banks_to_service);
-            for (t_id = 0; t_id <= `NT_M1; t_id = t_id + 1) begin
-              for (bnk = 0; bnk < NUMBER_BANKS; bnk = bnk + 1) begin
-                //bank_has_access[bnk] = banks_all_help[bnk] && !thread_done[threads_in_banks[bnk]]; // Not sure
-                bank_has_access[bnk] = banks_all_help[bnk] && !thread_done[t_id]; // Not sure
-                if(thread_track_banks[bnk][t_id] == 1'b1 && bank_has_access[bnk] == 1'b1) begin
-                  //bank_has_access[bnk] = 1'b1;
-                  bank_access_data[bnk] = i_p_writedata[t_id];
-                  bank_access_addr[bnk] = i_p_addr[t_id];
-                  threads_in_banks[bnk] = t_id[1:0];
-                end
-              end 
-            end 
-
-
-
-          end
-          RE_ACCESS_PROCESSING:begin
-            // After Access
-
-          end
-
-        endcase      
-    end
-
-    always @(posedge clk) begin
-      banks_to_service <= banks_to_service_temp;
-      banks_to_wb <= banks_to_wb_temp;
-    end
-
-
-  genvar bank_id;
-  generate
-    for (bank_id = 0; bank_id < NUMBER_BANKS; bank_id = bank_id + 1)
-      begin
-        VX_Cache_Bank bank_structure (
-          .clk                        (clk),
-          .state                      (state),
-          .read_or_write              (rd_or_wr),
-          .valid_in                   (bank_has_access[bank_id]),
-          .actual_index               (bank_access_addr[bank_id][14:7]), // fix when size changes
-          .o_tag                      (bank_access_addr[bank_id][31:15]), // fix when size changes
-          .block_offset               (bank_access_addr[bank_id][6:5]),
-          .writedata                  (bank_access_data[bank_id]),
-          //.fetched_writedata         (i_m_readdata[(bank_id+1)*32-1 -: 32]),
-          .fetched_writedata         (i_m_readdata[bank_id[3:0]]),
-          .readdata                   (data_from_bank[bank_id]),
-          .hit                        (banks_ready[bank_id]),
-          //.miss                       (banks_missed[bank_id]),
-          .eviction_wb                (banks_wb_needed[bank_id]),
-          .eviction_addr              (banks_wb_addr[bank_id]),
-          //.data_evicted               (o_m_writedata[(bank_id+1)*32-1 -: 32])
-          .data_evicted               (o_m_writedata[bank_id[3:0]])
-        );
-
-      end
-  endgenerate
-
-    //end
-
-endmodule
\ No newline at end of file
diff --git a/rtl/interfaces/VX_dram_req_rsp_inter.v b/rtl/interfaces/VX_dram_req_rsp_inter.v
index c415cc12..a9de1f14 100644
--- a/rtl/interfaces/VX_dram_req_rsp_inter.v
+++ b/rtl/interfaces/VX_dram_req_rsp_inter.v
@@ -8,7 +8,8 @@
 interface VX_dram_req_rsp_inter ();
 
 	// Req
-    wire [31:0]                                              o_m_addr;
+	wire [31:0]                                              o_m_evict_addr;
+    wire [31:0]                                              o_m_read_addr;
     wire                                                     o_m_valid;
     wire[`NUMBER_BANKS - 1:0][`NUM_WORDS_PER_BLOCK-1:0][31:0] o_m_writedata;
     wire                                                     o_m_read_or_write;
diff --git a/rtl/simulate/VX_define.h b/rtl/simulate/VX_define.h
index 8b20e1c6..df9c3af0 100644
--- a/rtl/simulate/VX_define.h
+++ b/rtl/simulate/VX_define.h
@@ -3,6 +3,8 @@
 
 #define NW 8
 
+#define CACHE_NUM_BANKS 8
+#define CACHE_WORDS_PER_BLOCK 4
 
 #define R_INST 51
 #define L_INST 3
diff --git a/rtl/simulate/test_bench.cpp b/rtl/simulate/test_bench.cpp
index 0d187aef..1e0a6a0c 100644
--- a/rtl/simulate/test_bench.cpp
+++ b/rtl/simulate/test_bench.cpp
@@ -5,11 +5,12 @@
 int main(int argc, char **argv)
 {
 
+	Verilated::debug(1);
+
 	Verilated::commandArgs(argc, argv);
 
 	Verilated::traceEverOn(true);
 
-	// Verilated::debug(1);
 
 
  //    bool passed = true;
diff --git a/rtl/simulate/test_bench.h b/rtl/simulate/test_bench.h
index 5f70ed31..9e595384 100644
--- a/rtl/simulate/test_bench.h
+++ b/rtl/simulate/test_bench.h
@@ -45,6 +45,8 @@ class Vortex
         VVortex * vortex;
 
         unsigned start_pc;
+        bool     refill;
+        unsigned refill_addr;
         long int curr_cycle;
         bool stop;
         bool unit_test;
@@ -190,120 +192,196 @@ bool Vortex::ibus_driver()
 
 bool Vortex::dbus_driver()
 {
-    uint32_t data_read;
-    uint32_t data_write;
-    uint32_t addr;
-    // std::cout << "DBUS DRIVER\n" << std::endl;
-    ////////////////////// DBUS //////////////////////
 
-    bool did = false;
 
-    for (unsigned curr_th = 0; curr_th < NT; curr_th++)
+
+    if (this->refill)
     {
-        if ((vortex->out_cache_driver_in_mem_write != NO_MEM_WRITE) && vortex->out_cache_driver_in_valid[curr_th])
+        this->refill = false;
+        unsigned unordered_mem[32];
+        int num_iter = 0;
+        for (int i = 0; i < CACHE_WORDS_PER_BLOCK; i++)
         {
-                did = true;
-                data_write = (uint32_t) vortex->out_cache_driver_in_data[curr_th];
-                addr       = (uint32_t) vortex->out_cache_driver_in_address[curr_th];
-
-                if (addr == 0x00010000)
-                {
-                  std::cerr << (char) data_write;
-                }
-
-                // if ((addr >= 0x810002cc) && (addr < 0x810002d0))
-                // {
-                //     int index = (addr - 0x810002cc) / 4;
-                //     // std::cerr << GREEN << "1done[" << index << "] = " << data_write << DEFAULT << "\n";
-                // }
-
-                // if ((addr >= 0x810059f4) && (addr < 0x810059f4))
-                // {
-                //     int index = (addr - 0x810059f4) / 4;
-                //     // std::cerr << RED << "2done[" << index << "] = " << data_write << DEFAULT << "\n";
-                // }
-
-                if (vortex->out_cache_driver_in_mem_write == SB_MEM_WRITE)
-                {
-                    data_write = ( data_write) & 0xFF;
-                    ram.writeByte( addr, &data_write);
-
-                } else if (vortex->out_cache_driver_in_mem_write == SH_MEM_WRITE)
-                {
-                    data_write = ( data_write) & 0xFFFF;
-                    ram.writeHalf( addr, &data_write);
-                } else if (vortex->out_cache_driver_in_mem_write == SW_MEM_WRITE)
-                {
-                    // printf("STORING %x in %x \n", data_write, addr);
-                    data_write = data_write;
-                    ram.writeWord( addr, &data_write);
-                }
-
-        }
-
-    }
-
-
-
-
-    // printf("----\n");
-    for (unsigned curr_th = 0; curr_th < NT; curr_th++)
-    {
-
-        if ((vortex->out_cache_driver_in_mem_read != NO_MEM_READ) && vortex->out_cache_driver_in_valid[curr_th])
-        {
-                did = true;
-                addr = (uint32_t) vortex->out_cache_driver_in_address[curr_th];
+            for (int j = 0; j < (CACHE_NUM_BANKS*8); j+=8)
+            {
+                unsigned addr = this->refill_addr + (4*num_iter);
+                unsigned data_read;
                 ram.getWord(addr, &data_read);
-
-                if (vortex->out_cache_driver_in_mem_read == LB_MEM_READ)
-                {
-
-                    vortex->in_cache_driver_out_data[curr_th] = (data_read & 0x80) ? (data_read | 0xFFFFFF00) : (data_read & 0xFF);
-
-                } else if (vortex->out_cache_driver_in_mem_read == LH_MEM_READ)
-                {
-
-                    vortex->in_cache_driver_out_data[curr_th] = (data_read & 0x8000) ? (data_read | 0xFFFF0000) : (data_read & 0xFFFF);
-
-                } else if (vortex->out_cache_driver_in_mem_read == LW_MEM_READ)
-                {
-                    // printf("Reading mem - Addr: %x = %x\n", addr, data_read);
-                    // std::cout << "READING - Addr: " << std::hex << addr << " = " << data_read << "\n";
-                    // std::cout << std::dec;
-                    vortex->in_cache_driver_out_data[curr_th] = data_read;
-
-                } else if (vortex->out_cache_driver_in_mem_read == LBU_MEM_READ)
-                {
-
-                    vortex->in_cache_driver_out_data[curr_th] = (data_read & 0xFF);
-
-                } else if (vortex->out_cache_driver_in_mem_read == LHU_MEM_READ)
-                {
-
-                    vortex->in_cache_driver_out_data[curr_th] = (data_read & 0xFFFF);
-
-                }
-                else
-                {
-                    vortex->in_cache_driver_out_data[curr_th] = 0xbabebabe;
-                }
+                unordered_mem[i+j] = data_read;
+                num_iter++;
+            }
         }
-        else
+
+        vortex->i_m_ready = 1;
+        for (int i = 0; i < CACHE_NUM_BANKS; i++)
         {
-            vortex->in_cache_driver_out_data[curr_th] = 0xbabebabe;
+            for (int j = 0; j < CACHE_WORDS_PER_BLOCK; j++)
+            {
+                vortex->i_m_readdata[i][j] = unordered_mem[(i*CACHE_WORDS_PER_BLOCK)+j];
+
+            }
         }
-
     }
-
-    if (did && (NW > 1))
+    else
     {
-
-        if (NW < NT)
+        if (vortex->o_m_valid)
         {
-            this->stats_total_cycles += NT % (NW -1);
+            if (vortex->o_m_read_or_write)
+            {
+                unsigned ordered_mem[32];
+
+                // Create unordered mem
+                unsigned unordered_mem[32];
+                for (int i = 0; i < CACHE_NUM_BANKS; i++)
+                {
+                    for (int j = 0; j < CACHE_WORDS_PER_BLOCK; j++)
+                    {
+                        unordered_mem[(i*CACHE_WORDS_PER_BLOCK)+j] = vortex->o_m_writedata[i][j];
+                    }
+                }
+
+                // Order the memory
+                int num_iter = 0;
+                for (int i = 0; i < CACHE_NUM_BANKS; i++)
+                {
+                    for (int j = 0; j < (CACHE_NUM_BANKS*CACHE_WORDS_PER_BLOCK); j+=CACHE_WORDS_PER_BLOCK)
+                    {
+                        printf("i: %d, j: %d, num_iter: %d\n", i, j, num_iter);
+                        ordered_mem[i+j] = unordered_mem[num_iter];
+                        num_iter++;
+                    }
+                }
+
+                // Save the memory
+                for (int i = 0; i < (CACHE_WORDS_PER_BLOCK * CACHE_NUM_BANKS); i++)
+                {
+                    unsigned addr        = (vortex->o_m_evict_addr) + (4*i);
+                    unsigned * data_addr = ordered_mem + i;
+                    ram.writeWord( addr, data_addr);
+                }
+                
+            }
+
+            // Respond next cycle
+            this->refill = true;
+            this->refill_addr = vortex->o_m_read_addr;
         }
     }
+
+    // uint32_t data_read;
+    // uint32_t data_write;
+    // uint32_t addr;
+    // // std::cout << "DBUS DRIVER\n" << std::endl;
+    // ////////////////////// DBUS //////////////////////
+
+    // bool did = false;
+
+    // for (unsigned curr_th = 0; curr_th < NT; curr_th++)
+    // {
+    //     if ((vortex->out_cache_driver_in_mem_write != NO_MEM_WRITE) && vortex->out_cache_driver_in_valid[curr_th])
+    //     {
+    //             did = true;
+    //             data_write = (uint32_t) vortex->out_cache_driver_in_data[curr_th];
+    //             addr       = (uint32_t) vortex->out_cache_driver_in_address[curr_th];
+
+    //             if (addr == 0x00010000)
+    //             {
+    //               std::cerr << (char) data_write;
+    //             }
+
+    //             // if ((addr >= 0x810002cc) && (addr < 0x810002d0))
+    //             // {
+    //             //     int index = (addr - 0x810002cc) / 4;
+    //             //     // std::cerr << GREEN << "1done[" << index << "] = " << data_write << DEFAULT << "\n";
+    //             // }
+
+    //             // if ((addr >= 0x810059f4) && (addr < 0x810059f4))
+    //             // {
+    //             //     int index = (addr - 0x810059f4) / 4;
+    //             //     // std::cerr << RED << "2done[" << index << "] = " << data_write << DEFAULT << "\n";
+    //             // }
+
+    //             if (vortex->out_cache_driver_in_mem_write == SB_MEM_WRITE)
+    //             {
+    //                 data_write = ( data_write) & 0xFF;
+    //                 ram.writeByte( addr, &data_write);
+
+    //             } else if (vortex->out_cache_driver_in_mem_write == SH_MEM_WRITE)
+    //             {
+    //                 data_write = ( data_write) & 0xFFFF;
+    //                 ram.writeHalf( addr, &data_write);
+    //             } else if (vortex->out_cache_driver_in_mem_write == SW_MEM_WRITE)
+    //             {
+    //                 // printf("STORING %x in %x \n", data_write, addr);
+    //                 data_write = data_write;
+    //                 ram.writeWord( addr, &data_write);
+    //             }
+
+    //     }
+
+    // }
+
+
+
+
+    // // printf("----\n");
+    // for (unsigned curr_th = 0; curr_th < NT; curr_th++)
+    // {
+
+    //     if ((vortex->out_cache_driver_in_mem_read != NO_MEM_READ) && vortex->out_cache_driver_in_valid[curr_th])
+    //     {
+    //             did = true;
+    //             addr = (uint32_t) vortex->out_cache_driver_in_address[curr_th];
+    //             ram.getWord(addr, &data_read);
+
+    //             if (vortex->out_cache_driver_in_mem_read == LB_MEM_READ)
+    //             {
+
+    //                 vortex->in_cache_driver_out_data[curr_th] = (data_read & 0x80) ? (data_read | 0xFFFFFF00) : (data_read & 0xFF);
+
+    //             } else if (vortex->out_cache_driver_in_mem_read == LH_MEM_READ)
+    //             {
+
+    //                 vortex->in_cache_driver_out_data[curr_th] = (data_read & 0x8000) ? (data_read | 0xFFFF0000) : (data_read & 0xFFFF);
+
+    //             } else if (vortex->out_cache_driver_in_mem_read == LW_MEM_READ)
+    //             {
+    //                 // printf("Reading mem - Addr: %x = %x\n", addr, data_read);
+    //                 // std::cout << "READING - Addr: " << std::hex << addr << " = " << data_read << "\n";
+    //                 // std::cout << std::dec;
+    //                 vortex->in_cache_driver_out_data[curr_th] = data_read;
+
+    //             } else if (vortex->out_cache_driver_in_mem_read == LBU_MEM_READ)
+    //             {
+
+    //                 vortex->in_cache_driver_out_data[curr_th] = (data_read & 0xFF);
+
+    //             } else if (vortex->out_cache_driver_in_mem_read == LHU_MEM_READ)
+    //             {
+
+    //                 vortex->in_cache_driver_out_data[curr_th] = (data_read & 0xFFFF);
+
+    //             }
+    //             else
+    //             {
+    //                 vortex->in_cache_driver_out_data[curr_th] = 0xbabebabe;
+    //             }
+    //     }
+    //     else
+    //     {
+    //         vortex->in_cache_driver_out_data[curr_th] = 0xbabebabe;
+    //     }
+
+    // }
+
+    // if (did && (NW > 1))
+    // {
+
+    //     if (NW < NT)
+    //     {
+    //         this->stats_total_cycles += NT % (NW -1);
+    //     }
+    // }
     // printf("******\n");
 
 
@@ -376,15 +454,17 @@ bool Vortex::simulate(std::string file_to_simulate)
     vortex->reset = 1;
     vortex->clk   = 0;
     vortex->eval();
+    // m_trace->dump(10);
     vortex->reset = 1;
     vortex->clk   = 1;
     vortex->eval();
+    // m_trace->dump(11);
     vortex->reset = 0;
     vortex->clk   = 0;
 
     // unsigned cycles;
     counter = 0;
-    this->stats_total_cycles = 10;
+    this->stats_total_cycles = 12;
     while (this->stop && ((counter < 2)))
     // while (this->stats_total_cycles < 10)
     {