new fpu implementation

2020-07-24 00:00:37 -04:00
parent f83521b7c6
commit 1f63f9da25
30 changed files with 318 additions and 258 deletions
--- a/hw/rtl/VX_mul_unit.v
+++ b/hw/rtl/VX_mul_unit.v
@@ -75,7 +75,7 @@ module VX_mul_unit #(
                default:    alu_result[i] = alu_in1[i] + alu_in2[i]; // ADD, LUI, AUIPC, FENCE
            endcase
        end       
-    end  
+    end 

    wire stall;