diff --git a/hw/rtl/VX_lsu_unit.v b/hw/rtl/VX_lsu_unit.v
index d3a96ade..79059f30 100644
--- a/hw/rtl/VX_lsu_unit.v
+++ b/hw/rtl/VX_lsu_unit.v
@@ -44,10 +44,6 @@ module VX_lsu_unit #(
     end    
     wire is_dup_load = lsu_req_if.wb && lsu_req_if.tmask[0] && (& addr_matches);
     
-`IGNORE_WARNINGS_BEGIN
-    reg [`LSUQ_SIZE-1:0][`DCORE_TAG_ID_BITS-1:0] pending_tags;
-`IGNORE_WARNINGS_END
-
     wire ready_in;
     wire stall_in = ~ready_in && req_valid; 
 
@@ -79,7 +75,7 @@ module VX_lsu_unit #(
     wire [`NUM_THREADS-1:0] rsp_tmask;
 
     reg [`NUM_THREADS-1:0] req_sent_mask;
-    wire sent_all_ready;
+    wire req_ready_all;
 
     wire [`DCORE_TAG_ID_BITS-1:0] mbuf_waddr, mbuf_raddr;
     wire mbuf_full;
@@ -118,7 +114,7 @@ module VX_lsu_unit #(
         `UNUSED_PIN (empty)
     );
 
-    assign sent_all_ready = &(dcache_req_if.ready | req_sent_mask);
+    assign req_ready_all = &(dcache_req_if.ready | req_sent_mask | ~req_tmask);
 
     wire [`NUM_THREADS-1:0] req_sent_dup = {{(`NUM_THREADS-1){dcache_req_fire[0] && req_is_dup}}, 1'b0};
 
@@ -126,19 +122,20 @@ module VX_lsu_unit #(
         if (reset) begin
             req_sent_mask <= 0;
         end else begin
-            if (sent_all_ready)
+            if (req_ready_all)
                 req_sent_mask <= 0;
             else
                 req_sent_mask <= req_sent_mask | dcache_req_fire | req_sent_dup;
         end
     end
 
+    wire is_req_start = (0 == req_sent_mask);
+
     // need to hold the acquired tag index until the full request is submitted
     reg [`DCORE_TAG_ID_BITS-1:0] req_tag_hold;
-    wire [`DCORE_TAG_ID_BITS-1:0] req_tag = (0 == req_sent_mask) ? mbuf_waddr : req_tag_hold;
+    wire [`DCORE_TAG_ID_BITS-1:0] req_tag = is_req_start ? mbuf_waddr : req_tag_hold;
     always @(posedge clk) begin
         if (mbuf_push) begin            
-            pending_tags[mbuf_waddr] <= req_tag;
             req_tag_hold <= mbuf_waddr;
         end
     end
@@ -156,7 +153,8 @@ module VX_lsu_unit #(
         end
     end
 
-    wire req_ready_dep = (req_wb && ~mbuf_full) 
+    // ensure all dependencies for the requests are resolved
+    wire req_dep_ready = (req_wb && (~mbuf_full || ~is_req_start)) 
                       || (~req_wb && st_commit_if.ready);
 
     // DCache Request
@@ -189,7 +187,7 @@ module VX_lsu_unit #(
         end
     end
 
-    assign dcache_req_if.valid  = {`NUM_THREADS{req_valid && req_ready_dep}} & req_tmask_dup & ~req_sent_mask;
+    assign dcache_req_if.valid  = {`NUM_THREADS{req_valid && req_dep_ready}} & req_tmask_dup & ~req_sent_mask;
     assign dcache_req_if.rw     = {`NUM_THREADS{~req_wb}};
     assign dcache_req_if.addr   = mem_req_addr;
     assign dcache_req_if.byteen = mem_req_byteen;
@@ -201,11 +199,11 @@ module VX_lsu_unit #(
     assign dcache_req_if.tag = {`NUM_THREADS{req_tag}};
 `endif
     
-    assign ready_in = req_ready_dep && sent_all_ready;
+    assign ready_in = req_dep_ready && req_ready_all;
 
     // send store commit
 
-    wire is_store_rsp = req_valid && ~req_wb && sent_all_ready;
+    wire is_store_rsp = req_valid && ~req_wb && req_ready_all;
 
     assign st_commit_if.valid = is_store_rsp;
     assign st_commit_if.wid   = req_wid;
@@ -276,23 +274,46 @@ module VX_lsu_unit #(
     `SCOPE_ASSIGN (dcache_rsp_tag,   mbuf_raddr);
     
 `ifdef DBG_PRINT_CORE_DCACHE
+`IGNORE_WARNINGS_BEGIN
+    reg [`LSUQ_SIZE-1:0][`DCORE_TAG_WIDTH:0] pending_reqs;
+`IGNORE_WARNINGS_END
+
+    always @(posedge clk) begin
+        if (reset) begin
+            pending_reqs <= '0;
+        end else if (mbuf_push) begin            
+            pending_reqs[mbuf_waddr] <= {dcache_req_if.tag[0], 1'b1};
+        end else if (mbuf_pop) begin            
+            pending_reqs[mbuf_raddr] <= '0;
+        end
+    end
+
    always @(posedge clk) begin        
         if ((| dcache_req_fire)) begin
-            if ((| dcache_req_if.rw))
-                $display("%t: D$%0d Wr Req: wid=%0d, PC=%0h, tmask=%b, addr=%0h, tag=%0h, byteen=%0h, data=%0h", 
-                    $time, CORE_ID, req_wid, req_pc, dcache_req_fire, req_addr, dcache_req_if.tag, dcache_req_if.byteen, dcache_req_if.data);
-            else
-                $display("%t: D$%0d Rd Req: wid=%0d, PC=%0h, tmask=%b, addr=%0h, tag=%0h, byteen=%0h, rd=%0d, is_dup=%b", 
-                    $time, CORE_ID, req_wid, req_pc, dcache_req_fire, req_addr, dcache_req_if.tag, dcache_req_if.byteen, req_rd, req_is_dup);
+            if (dcache_req_if.rw[0]) begin
+                $write("%t: D$%0d Wr Req: wid=%0d, PC=%0h, tmask=%b, addr=", $time, CORE_ID, req_wid, req_pc, dcache_req_fire);
+                `PRINT_ARRAY1D(req_addr, `NUM_THREADS);
+                 $write(", tag=%0h, byteen=%0h, data=", dcache_req_if.tag[0], dcache_req_if.byteen);
+                 `PRINT_ARRAY1D(dcache_req_if.data, `NUM_THREADS);
+                 $write("\n");
+            end else begin
+                 $write("%t: D$%0d Rd Req: wid=%0d, PC=%0h, tmask=%b, addr=", $time, CORE_ID, req_wid, req_pc, dcache_req_fire);
+                `PRINT_ARRAY1D(req_addr, `NUM_THREADS);
+                 $write(", tag=%0h, byteen=%0h, rd=%0d, is_dup=%b\n", dcache_req_if.tag[0], dcache_req_if.byteen, req_rd, req_is_dup);
+            end
         end
         if (dcache_rsp_fire) begin
-            $display("%t: D$%0d Rsp: valid=%b, wid=%0d, PC=%0h, tag=%0h, rd=%0d, data=%0h, is_dup=%b", 
-                    $time, CORE_ID, dcache_rsp_if.valid, rsp_wid, rsp_pc, dcache_rsp_if.tag, rsp_rd, dcache_rsp_if.data, rsp_is_dup);
+            $write("%t: D$%0d Rsp: valid=%b, wid=%0d, PC=%0h, tag=%0h, rd=%0d, data=", 
+                $time, CORE_ID, dcache_rsp_if.valid, rsp_wid, rsp_pc, dcache_rsp_if.tag, rsp_rd);
+            `PRINT_ARRAY1D(dcache_rsp_if.data, `NUM_THREADS);
+            $write("is_dup=%b\n", rsp_is_dup);
         end
         if (mbuf_full) begin
-            $write("%t: D$%0d queue-full:", $time, CORE_ID);
+            $write("%t: *** D$%0d queue-full:", $time, CORE_ID);
             for (integer j = 0; j < `LSUQ_SIZE; j++) begin
-                $write(" tag%0d=%0h", j, pending_tags[j]);
+                if (pending_reqs[j][0]) begin
+                    $write(" %0d->%0h", j, pending_reqs[j][1 +: `DCORE_TAG_WIDTH]);
+                end
             end            
             $write("\n");
         end