merged fpu_port branch
This commit is contained in:
Blaise Tine
@@ -3,100 +3,162 @@
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#include <fstream>
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#include <iomanip>
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int main(int argc, char *argv[])
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{
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if(argc == 1) {
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bool passed = true;
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int main(int argc, char **argv) {
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if (argc == 1) {
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#define ALL_TESTS
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#ifdef ALL_TESTS
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bool passed = true;
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std::string tests[] = {
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"../../../benchmarks/riscv_tests/rv32ui-p-add.hex",
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"../../../benchmarks/riscv_tests/rv32ui-p-addi.hex",
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"../../../benchmarks/riscv_tests/rv32ui-p-and.hex",
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"../../../benchmarks/riscv_tests/rv32ui-p-andi.hex",
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"../../../benchmarks/riscv_tests/rv32ui-p-auipc.hex",
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"../../../benchmarks/riscv_tests/rv32ui-p-beq.hex",
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"../../../benchmarks/riscv_tests/rv32ui-p-bge.hex",
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"../../../benchmarks/riscv_tests/rv32ui-p-bgeu.hex",
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"../../../benchmarks/riscv_tests/rv32ui-p-blt.hex",
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"../../../benchmarks/riscv_tests/rv32ui-p-bltu.hex",
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"../../../benchmarks/riscv_tests/rv32ui-p-bne.hex",
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"../../../benchmarks/riscv_tests/rv32ui-p-jal.hex",
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"../../../benchmarks/riscv_tests/rv32ui-p-jalr.hex",
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"../../../benchmarks/riscv_tests/rv32ui-p-lb.hex",
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"../../../benchmarks/riscv_tests/rv32ui-p-lbu.hex",
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"../../../benchmarks/riscv_tests/rv32ui-p-lh.hex",
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"../../../benchmarks/riscv_tests/rv32ui-p-lhu.hex",
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"../../../benchmarks/riscv_tests/rv32ui-p-lui.hex",
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"../../../benchmarks/riscv_tests/rv32ui-p-lw.hex",
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"../../../benchmarks/riscv_tests/rv32ui-p-or.hex",
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"../../../benchmarks/riscv_tests/rv32ui-p-ori.hex",
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"../../../benchmarks/riscv_tests/rv32ui-p-sb.hex",
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"../../../benchmarks/riscv_tests/rv32ui-p-sh.hex",
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"../../../benchmarks/riscv_tests/rv32ui-p-simple.hex",
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"../../../benchmarks/riscv_tests/rv32ui-p-sll.hex",
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"../../../benchmarks/riscv_tests/rv32ui-p-slli.hex",
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"../../../benchmarks/riscv_tests/rv32ui-p-slt.hex",
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"../../../benchmarks/riscv_tests/rv32ui-p-slti.hex",
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"../../../benchmarks/riscv_tests/rv32ui-p-sltiu.hex",
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"../../../benchmarks/riscv_tests/rv32ui-p-sltu.hex",
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"../../../benchmarks/riscv_tests/rv32ui-p-sra.hex",
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"../../../benchmarks/riscv_tests/rv32ui-p-srai.hex",
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"../../../benchmarks/riscv_tests/rv32ui-p-srl.hex",
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"../../../benchmarks/riscv_tests/rv32ui-p-srli.hex",
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"../../../benchmarks/riscv_tests/rv32ui-p-sub.hex",
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"../../../benchmarks/riscv_tests/rv32ui-p-sw.hex",
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"../../../benchmarks/riscv_tests/rv32ui-p-xor.hex",
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"../../../benchmarks/riscv_tests/rv32ui-p-xori.hex",
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"../../../benchmarks/riscv_tests/rv32um-p-div.hex",
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"../../../benchmarks/riscv_tests/rv32um-p-divu.hex",
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"../../../benchmarks/riscv_tests/rv32um-p-mul.hex",
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"../../../benchmarks/riscv_tests/rv32um-p-mulh.hex",
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"../../../benchmarks/riscv_tests/rv32um-p-mulhsu.hex",
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"../../../benchmarks/riscv_tests/rv32um-p-mulhu.hex",
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"../../../benchmarks/riscv_tests/rv32um-p-rem.hex",
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"../../../benchmarks/riscv_tests/rv32um-p-remu.hex"
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};
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std::string tests[] = {
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"../../../benchmarks/riscv_tests/isa/rv32ui-p-add.hex",
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"../../../benchmarks/riscv_tests/isa/rv32ui-p-addi.hex",
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"../../../benchmarks/riscv_tests/isa/rv32ui-p-and.hex",
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"../../../benchmarks/riscv_tests/isa/rv32ui-p-andi.hex",
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"../../../benchmarks/riscv_tests/isa/rv32ui-p-auipc.hex",
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"../../../benchmarks/riscv_tests/isa/rv32ui-p-beq.hex",
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"../../../benchmarks/riscv_tests/isa/rv32ui-p-bge.hex",
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"../../../benchmarks/riscv_tests/isa/rv32ui-p-bgeu.hex",
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"../../../benchmarks/riscv_tests/isa/rv32ui-p-blt.hex",
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"../../../benchmarks/riscv_tests/isa/rv32ui-p-bltu.hex",
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"../../../benchmarks/riscv_tests/isa/rv32ui-p-bne.hex",
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"../../../benchmarks/riscv_tests/isa/rv32ui-p-jal.hex",
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"../../../benchmarks/riscv_tests/isa/rv32ui-p-jalr.hex",
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"../../../benchmarks/riscv_tests/isa/rv32ui-p-lb.hex",
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"../../../benchmarks/riscv_tests/isa/rv32ui-p-lbu.hex",
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"../../../benchmarks/riscv_tests/isa/rv32ui-p-lh.hex",
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"../../../benchmarks/riscv_tests/isa/rv32ui-p-lhu.hex",
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"../../../benchmarks/riscv_tests/isa/rv32ui-p-lui.hex",
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"../../../benchmarks/riscv_tests/isa/rv32ui-p-lw.hex",
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"../../../benchmarks/riscv_tests/isa/rv32ui-p-or.hex",
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"../../../benchmarks/riscv_tests/isa/rv32ui-p-ori.hex",
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"../../../benchmarks/riscv_tests/isa/rv32ui-p-sb.hex",
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"../../../benchmarks/riscv_tests/isa/rv32ui-p-sh.hex",
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"../../../benchmarks/riscv_tests/isa/rv32ui-p-simple.hex",
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"../../../benchmarks/riscv_tests/isa/rv32ui-p-sll.hex",
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"../../../benchmarks/riscv_tests/isa/rv32ui-p-slli.hex",
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"../../../benchmarks/riscv_tests/isa/rv32ui-p-slt.hex",
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"../../../benchmarks/riscv_tests/isa/rv32ui-p-slti.hex",
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"../../../benchmarks/riscv_tests/isa/rv32ui-p-sltiu.hex",
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"../../../benchmarks/riscv_tests/isa/rv32ui-p-sltu.hex",
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"../../../benchmarks/riscv_tests/isa/rv32ui-p-sra.hex",
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"../../../benchmarks/riscv_tests/isa/rv32ui-p-srai.hex",
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"../../../benchmarks/riscv_tests/isa/rv32ui-p-srl.hex",
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"../../../benchmarks/riscv_tests/isa/rv32ui-p-srli.hex",
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"../../../benchmarks/riscv_tests/isa/rv32ui-p-sub.hex",
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"../../../benchmarks/riscv_tests/isa/rv32ui-p-sw.hex",
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"../../../benchmarks/riscv_tests/isa/rv32ui-p-xor.hex",
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"../../../benchmarks/riscv_tests/isa/rv32ui-p-xori.hex",
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#ifdef EXT_M_ENABLE
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"../../../benchmarks/riscv_tests/isa/rv32um-p-div.hex",
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"../../../benchmarks/riscv_tests/isa/rv32um-p-divu.hex",
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"../../../benchmarks/riscv_tests/isa/rv32um-p-mul.hex",
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"../../../benchmarks/riscv_tests/isa/rv32um-p-mulh.hex",
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"../../../benchmarks/riscv_tests/isa/rv32um-p-mulhsu.hex",
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"../../../benchmarks/riscv_tests/isa/rv32um-p-mulhu.hex",
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"../../../benchmarks/riscv_tests/isa/rv32um-p-rem.hex",
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"../../../benchmarks/riscv_tests/isa/rv32um-p-remu.hex",
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#endif
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};
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for (std::string test : tests) {
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std::cerr << DEFAULT << "\n---------------------------------------\n";
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std::string tests_fp[] = {
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#ifdef EXT_F_ENABLE
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"../../../benchmarks/riscv_tests/isa/rv32uf-p-fadd.hex",
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"../../../benchmarks/riscv_tests/isa/rv32uf-p-fdiv.hex",
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"../../../benchmarks/riscv_tests/isa/rv32uf-p-fmadd.hex",
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"../../../benchmarks/riscv_tests/isa/rv32uf-p-fmin.hex",
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"../../../benchmarks/riscv_tests/isa/rv32uf-p-fcmp.hex",
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"../../../benchmarks/riscv_tests/isa/rv32uf-p-ldst.hex",
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"../../../benchmarks/riscv_tests/isa/rv32uf-p-fcvt.hex",
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"../../../benchmarks/riscv_tests/isa/rv32uf-p-fcvt_w.hex",
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"../../../benchmarks/riscv_tests/isa/rv32uf-p-fclass.hex",
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"../../../benchmarks/riscv_tests/isa/rv32uf-p-move.hex",
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"../../../benchmarks/riscv_tests/isa/rv32uf-p-recoding.hex",
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#endif
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};
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std::cerr << test << std::endl;
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for (std::string test : tests) {
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std::cerr << DEFAULT << "\n---------------------------------------\n";
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RAM ram;
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Simulator simulator;
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simulator.attach_ram(&ram);
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simulator.load_ihex(test.c_str());
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bool curr = simulator.run();
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std::cerr << test << std::endl;
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if (curr) std::cerr << GREEN << "Test Passed: " << test << std::endl;
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if (!curr) std::cerr << RED << "Test Failed: " << test << std::endl;
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std::cerr << DEFAULT;
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passed = passed && curr;
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}
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RAM ram;
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Simulator simulator;
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simulator.attach_ram(&ram);
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simulator.load_ihex(test.c_str());
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simulator.run();
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std::cerr << DEFAULT << "\n***************************************\n";
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bool status = (1 == simulator.get_last_wb_value(3));
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if (passed) std::cerr << DEFAULT << "PASSED ALL TESTS\n";
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if (!passed) std::cerr << DEFAULT << "Failed one or more tests\n";
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return !passed;
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if (status) std::cerr << GREEN << "Test Passed: " << test << std::endl;
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if (!status) std::cerr << RED << "Test Failed: " << test << std::endl;
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std::cerr << DEFAULT;
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passed = passed && status;
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if (!passed)
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break;
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}
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else {
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char* test = argv[2];
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for (std::string test : tests_fp) {
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std::cerr << DEFAULT << "\n---------------------------------------\n";
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std::cerr << test << std::endl;
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RAM ram;
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Simulator simulator;
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simulator.attach_ram(&ram);
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simulator.load_ihex(test.c_str());
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simulator.run();
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bool status = (1 == simulator.get_last_wb_value(3));
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if (status) std::cerr << GREEN << "Test Passed: " << test << std::endl;
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if (!status) std::cerr << RED << "Test Failed: " << test << std::endl;
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std::cerr << DEFAULT;
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passed = passed && status;
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if (!passed)
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break;
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}
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std::cerr << DEFAULT << "\n***************************************\n";
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if (passed) std::cerr << DEFAULT << "PASSED ALL TESTS\n";
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if (!passed) std::cerr << DEFAULT << "Failed one or more tests\n";
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return !passed;
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#else
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char test[] = "../../../runtime/tests/simple/vx_simple.hex";
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std::cerr << test << std::endl;
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RAM ram;
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Simulator simulator;
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simulator.attach_ram(&ram);
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simulator.load_ihex(test);
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simulator.run();
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bool status = (1 == simulator.get_last_wb_value(3));
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if (status) std::cerr << GREEN << "Test Passed: " << test << std::endl;
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if (!status) std::cerr << RED << "Test Failed: " << test << std::endl;
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return !status;
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#endif
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} else {
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char* test = argv[2];
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std::cerr << test << std::endl;
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std::cerr << test << std::endl;
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RAM ram;
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Simulator simulator;
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simulator.attach_ram(&ram);
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simulator.load_ihex(test);
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bool curr = simulator.run();
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if (curr) std::cerr << GREEN << "Test Passed: " << test << std::endl;
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if (!curr) std::cerr << RED << "Test Failed: " << test << std::endl;
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return !curr;
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}
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RAM ram;
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Simulator simulator;
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simulator.attach_ram(&ram);
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simulator.load_ihex(test);
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simulator.run();
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return 0;
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}
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}
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