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scope refactoring: adding modules definitions to VCD trace

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This commit is contained in:
Blaise Tine
2020-10-12 23:26:02 -04:00
parent 309dd48fc6
commit 32da50816f
43 changed files with 1162 additions and 850 deletions
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6
hw/rtl/VX_fetch.v
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@@ -3,7 +3,7 @@
module VX_fetch #(
parameter CORE_ID = 0
) (
`SCOPE_SIGNALS_ISTAGE_IO
`SCOPE_IO_VX_fetch
input wire clk,
input wire reset,
@@ -29,6 +29,8 @@ module VX_fetch #(
VX_warp_sched #(
.CORE_ID(CORE_ID)
) warp_sched (
`SCOPE_BIND_VX_fetch_warp_sched()
.clk (clk),
.reset (reset),
.warp_ctl_if (warp_ctl_if),
@@ -43,7 +45,7 @@ module VX_fetch #(
VX_icache_stage #(
.CORE_ID(CORE_ID)
) icache_stage (
`SCOPE_SIGNALS_ISTAGE_BIND
`SCOPE_BIND_VX_fetch_icache_stage()
.clk (clk),
.reset (reset),