rtl gpr multicore fix
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@@ -87,11 +87,6 @@
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`define DWORD_SIZE 4
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`endif
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// Number of Word requests per cycle {1, 2, 4, 8, ...}
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`ifndef DNUM_REQUESTS
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`define DNUM_REQUESTS `NUM_THREADS
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`endif
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// Number of cycles to complete stage 1 (read from memory)
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`ifndef DSTAGE_1_CYCLES
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`define DSTAGE_1_CYCLES 1
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@@ -178,11 +173,6 @@
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`define IWORD_SIZE 4
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`endif
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// Number of Word requests per cycle {1, 2, 4, 8, ...}
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`ifndef INUM_REQUESTS
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`define INUM_REQUESTS 1
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`endif
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// Number of cycles to complete stage 1 (read from memory)
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`ifndef ISTAGE_1_CYCLES
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`define ISTAGE_1_CYCLES 1
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@@ -269,11 +259,6 @@
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`define SWORD_SIZE 4
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`endif
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// Number of Word requests per cycle {1, 2, 4, 8, ...}
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`ifndef SNUM_REQUESTS
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`define SNUM_REQUESTS `NUM_THREADS
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`endif
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// Number of cycles to complete stage 1 (read from memory)
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`ifndef SSTAGE_1_CYCLES
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`define SSTAGE_1_CYCLES 1
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@@ -360,11 +345,6 @@
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`define L2WORD_SIZE `L2BANK_LINE_SIZE
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`endif
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// Number of Word requests per cycle {1, 2, 4, 8, ...}
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`ifndef L2NUM_REQUESTS
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`define L2NUM_REQUESTS (2*`NUM_CORES)
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`endif
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// Number of cycles to complete stage 1 (read from memory)
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`ifndef L2STAGE_1_CYCLES
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`define L2STAGE_1_CYCLES 1
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@@ -451,11 +431,6 @@
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`define L3WORD_SIZE `L3BANK_LINE_SIZE
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`endif
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// Number of Word requests per cycle {1, 2, 4, 8, ...}
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`ifndef L3NUM_REQUESTS
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`define L3NUM_REQUESTS `NUM_CLUSTERS
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`endif
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// Number of cycles to complete stage 1 (read from memory)
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`ifndef L3STAGE_1_CYCLES
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`define L3STAGE_1_CYCLES 1
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