From 372c81d90c5936dbd597a9fad16e4983d9bb5984 Mon Sep 17 00:00:00 2001
From: felsabbagh3 <felsabbagh3@gatech.edu>
Date: Sat, 26 Oct 2019 19:35:21 -0400
Subject: [PATCH] Generate VCD with ModelSim

---
 rtl/modelsim/Makefile    | 16 +++++++++++++---
 rtl/modelsim/vortex_tb.v | 17 +++++++++--------
 2 files changed, 22 insertions(+), 11 deletions(-)

diff --git a/rtl/modelsim/Makefile b/rtl/modelsim/Makefile
index a097b6f9..046ea027 100644
--- a/rtl/modelsim/Makefile
+++ b/rtl/modelsim/Makefile
@@ -91,7 +91,17 @@ SRC = \
 
 CMD= \
 -do "vcd file vortex.vcd; \
-run"
+	 vcd add -r vortex_tb; \
+	 run; \
+	 quit -f"
+
+
+OPT=-sv -sv12compat
+
+LIB = vortex_lib
+
+# LOG=-logfile vortex_tb.log
+LOG=
 
 # ../shared_memory/VX_set_bit.v \
 # ../cache/bank.v \
@@ -112,11 +122,11 @@ run"
 #           vlib 
 
 comp:
-	vlog -sv -sv12compat -work vortex_lib $(SRC)
+	vlog $(OPT) -work $(LIB) $(SRC)
 
 
 sim: comp
-	vsim vortex_tb -logfile vortex_tb.log -c -lib vortex_lib $(CMD)
+	vsim vortex_tb $(LOG) -c -lib $(LIB) $(CMD)
 
 
 
diff --git a/rtl/modelsim/vortex_tb.v b/rtl/modelsim/vortex_tb.v
index fa7cc9ac..4da50bf4 100644
--- a/rtl/modelsim/vortex_tb.v
+++ b/rtl/modelsim/vortex_tb.v
@@ -28,18 +28,19 @@ module vortex_tb (
 
 	integer temp;
 	initial begin
-
+		// $dumpfile("vortex2.vcd");
+		$dumpvars(0, vortex);
 		for (temp = 0; temp < 10; temp=temp+1)
 		begin
 
-			icache_response_instruction = 32'h0;
-			$display("SIMULATING");
+			if (temp == 0) begin
+				icache_response_instruction = 32'h00000513;
+				$display("Cycle 1");
+			end if (temp == 1) begin
+				$display("Cycle 2",);
+				icache_response_instruction = 32'h0005006b;
+			end
 		end
-
-		// while (!out_ebreak) begin
-		// 	icache_response_instruction = 0;
-		// end
-
 	end
 
 	Vortex vortex(