diff --git a/hw/rtl/VX_define.vh b/hw/rtl/VX_define.vh
index 149d8ad3..2c6c1093 100644
--- a/hw/rtl/VX_define.vh
+++ b/hw/rtl/VX_define.vh
@@ -298,8 +298,8 @@
 `define DCORE_TAG_WIDTH         (`DBG_CACHE_REQ_MDATAW + `LSUQ_ADDR_BITS)
 `endif
 
-// DRAM request data bits
-`define DDRAM_LINE_WIDTH        (`DCACHE_LINE_SIZE * 8)
+// Memory request data bits
+`define DMEM_LINE_WIDTH         (`DCACHE_LINE_SIZE * 8)
 
 // Memory request address bits
 `define DMEM_ADDR_WIDTH         (32 - `CLOG2(`DCACHE_LINE_SIZE))
diff --git a/hw/rtl/VX_lsu_unit.v b/hw/rtl/VX_lsu_unit.v
index 594d58a7..25f28ac8 100644
--- a/hw/rtl/VX_lsu_unit.v
+++ b/hw/rtl/VX_lsu_unit.v
@@ -132,8 +132,8 @@ module VX_lsu_unit #(
     wire is_req_start = (0 == req_sent_mask);
 
     // need to hold the acquired tag index until the full request is submitted
-    reg [`DCORE_TAG_ID_BITS-1:0] req_tag_hold;
-    wire [`DCORE_TAG_ID_BITS-1:0] req_tag = is_req_start ? mbuf_waddr : req_tag_hold;
+    reg [`LSUQ_ADDR_BITS-1:0] req_tag_hold;
+    wire [`LSUQ_ADDR_BITS-1:0] req_tag = is_req_start ? mbuf_waddr : req_tag_hold;
     always @(posedge clk) begin
         if (mbuf_push) begin            
             req_tag_hold <= mbuf_waddr;
diff --git a/hw/rtl/interfaces/VX_cache_mem_req_if.v b/hw/rtl/interfaces/VX_cache_mem_req_if.v
index b761b61f..08b1c4ef 100644
--- a/hw/rtl/interfaces/VX_cache_mem_req_if.v
+++ b/hw/rtl/interfaces/VX_cache_mem_req_if.v
@@ -1,7 +1,7 @@
 `ifndef VX_CACHE_MEM_REQ_IF
 `define VX_CACHE_MEM_REQ_IF
 
-`include "../cache/VX_cache_config.vh"
+`include "../cache/VX_cache_define.vh"
 
 interface VX_cache_mem_req_if #(
     parameter MEM_LINE_WIDTH = 1,
diff --git a/hw/rtl/interfaces/VX_cache_mem_rsp_if.v b/hw/rtl/interfaces/VX_cache_mem_rsp_if.v
index eb4abf26..06cd6eed 100644
--- a/hw/rtl/interfaces/VX_cache_mem_rsp_if.v
+++ b/hw/rtl/interfaces/VX_cache_mem_rsp_if.v
@@ -1,7 +1,7 @@
 `ifndef VX_CACHE_MEM_RSP_IF
 `define VX_CACHE_MEM_RSP_IF
 
-`include "../cache/VX_cache_config.vh"
+`include "../cache/VX_cache_define.vh"
 
 interface VX_cache_mem_rsp_if #(
     parameter MEM_LINE_WIDTH = 1,