wu-arch/vortex
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

minor updates

Browse Source
This commit is contained in:
Blaise Tine
2021-01-12 20:16:59 -08:00
parent f18ac24675
commit 464c4f4bd8
8 changed files with 16 additions and 13 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
hw/rtl/afu/vortex_afu.sv
View File

@@ -934,6 +934,8 @@ Vortex #() vortex (
`ifdef SCOPE
`SCOPE_ASSIGN (cmd_type, cmd_type);
`SCOPE_ASSIGN (state, state);
`SCOPE_ASSIGN (ccip_sRxPort_c0_mmioRdValid, cp2af_sRxPort.c0.mmioRdValid);
`SCOPE_ASSIGN (ccip_sRxPort_c0_mmioWrValid, cp2af_sRxPort.c0.mmioWrValid);
`SCOPE_ASSIGN (mmio_hdr_address, mmio_hdr.address);
@@ -966,10 +968,10 @@ Vortex #() vortex (
wire scope_changed = `SCOPE_TRIGGER;
VX_scope #(
.DATAW ($bits({`SCOPE_DATA_LIST,`SCOPE_UPDATE_LIST})),
.BUSW (64),
.SIZE (`SCOPE_SIZE),
.UPDW ($bits({`SCOPE_UPDATE_LIST}))
.DATAW ($bits({`SCOPE_DATA_LIST,`SCOPE_UPDATE_LIST})),
.BUSW (64),
.SIZE (`SCOPE_SIZE),
.UPDW ($bits({`SCOPE_UPDATE_LIST}))
) scope (
.clk (clk),
.reset (reset),

7
hw/rtl/cache/VX_bank.v vendored
View File

@@ -237,13 +237,12 @@ module VX_bank #(
wire is_mshr_miss_st1 = valid_st1 && is_mshr_st1 && (miss_st1 || force_miss_st1);
// determine which queue to pop next in piority order
wire mshr_pop_unqual = mshr_valid;
// determine which queue to pop next in piority order
wire mshr_pop_unqual = mshr_valid && !is_mshr_miss_st1;
wire drsq_pop_unqual = !mshr_pop_unqual && !drsq_empty;
wire creq_pop_unqual = !mshr_pop_unqual && !drsq_pop_unqual && !creq_empty && !mshr_almost_full && !dreq_almost_full;
assign mshr_pop = mshr_pop_unqual && !pipeline_stall
&& !is_mshr_miss_st1; // stop if previous request was a miss
assign mshr_pop = mshr_pop_unqual && !pipeline_stall;
assign drsq_pop = drsq_pop_unqual && !pipeline_stall;
assign creq_pop = creq_pop_unqual && !pipeline_stall;