rtlsim driver works with Vortex!
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@@ -1,7 +1,7 @@
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#CFLAGS += -std=c++11 -O3 -Wall -Wextra -pedantic -Wfatal-errors
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#CFLAGS += -std=c++11 -O3 -Wall -Wextra -pedantic -Wfatal-errors
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CFLAGS += -std=c++11 -g -O0 -Wall -Wextra -pedantic -Wfatal-errors
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CFLAGS += -std=c++11 -g -O0 -Wall -Wextra -pedantic -Wfatal-errors
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USE_MULTICORE=1
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#USE_MULTICORE=1
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CFLAGS += -I../../include -I../../../../rtl/simulate
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CFLAGS += -I../../include -I../../../../rtl/simulate
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@@ -30,8 +30,8 @@ VL_FLAGS += -Wno-UNOPTFLAT -Wno-WIDTH
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VL_FLAGS += -Wno-UNDRIVEN --Wno-PINMISSING -Wno-STMTDLY -Wno-WIDTH -Wno-UNSIGNED -Wno-UNOPTFLAT -Wno-LITENDIAN
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VL_FLAGS += -Wno-UNDRIVEN --Wno-PINMISSING -Wno-STMTDLY -Wno-WIDTH -Wno-UNSIGNED -Wno-UNOPTFLAT -Wno-LITENDIAN
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# Debugigng
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# Debugigng
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VL_FLAGS += --trace -DVL_DEBUG=1
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#VL_FLAGS += --trace -DVL_DEBUG=1
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CFLAGS += -DVCD_OUTPUT
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#CFLAGS += -DVCD_OUTPUT
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PROJECT = libvortex.so
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PROJECT = libvortex.so
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@@ -78,6 +78,7 @@ public:
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: is_done_(false)
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: is_done_(false)
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, mem_allocation_(VX_ALLOC_BASE_ADDR)
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, mem_allocation_(VX_ALLOC_BASE_ADDR)
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, vortex_(&ram_) {
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, vortex_(&ram_) {
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vortex_.reset();
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thread_ = new std::thread(__thread_proc__, this);
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thread_ = new std::thread(__thread_proc__, this);
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}
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}
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@@ -298,7 +298,7 @@ module VX_warp_scheduler (
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assign global_stall = (stall || wstall_this_cycle || hazard || !real_schedule || is_join);
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assign global_stall = (stall || wstall_this_cycle || hazard || !real_schedule || is_join);
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assign scheduled_warp = !(wstall_this_cycle || hazard || !real_schedule || is_join);
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assign scheduled_warp = !(wstall_this_cycle || hazard || !real_schedule || is_join) && !reset;
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wire real_use_wspawn = use_wsapwn[warp_to_schedule];
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wire real_use_wspawn = use_wsapwn[warp_to_schedule];
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