generic_register reset network optimization

This commit is contained in:
Blaise Tine
2020-11-29 18:41:36 -08:00
parent def6a35693
commit 5758ef9ebf
21 changed files with 84 additions and 48 deletions

View File

@@ -150,7 +150,8 @@ module VX_fpu_unit #(
wire stall_out = ~fpu_commit_if.ready && fpu_commit_if.valid;
VX_generic_register #(
.N(1 + `NW_BITS + `NUM_THREADS + 32 + `NR_BITS + 1 + (`NUM_THREADS * 32) + 1 + `FFG_BITS)
.N(1 + `NW_BITS + `NUM_THREADS + 32 + `NR_BITS + 1 + (`NUM_THREADS * 32) + 1 + `FFG_BITS),
.R(1)
) pipe_reg (
.clk (clk),
.reset (reset),