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Before evict_wb_old removal

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This commit is contained in:
felsabbagh3
2019-11-07 13:27:38 -05:00
parent 3372baea87
commit 58a9140f08
28 changed files with 344 additions and 331 deletions
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emulator/harptool
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1
emulator/instruction.cpp
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@@ -487,6 +487,7 @@ void Instruction::executeOn(Warp &c) {
// //std::cout << "FUNC3: " << func3 << "\n"; // //std::cout << "FUNC3: " << func3 << "\n";
if ((memAddr == 0x00010000) && (t == 0)) if ((memAddr == 0x00010000) && (t == 0))
{ {
unsigned num = reg[rsrc[1]];
fprintf(stderr, "%c", (char) reg[rsrc[1]]); fprintf(stderr, "%c", (char) reg[rsrc[1]]);
break; break;
} }

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emulator/instruction.o
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emulator/libharplib.a
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emulator/libharplib.so
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13
rtl/VX_define.v
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@@ -115,20 +115,24 @@
// `define PARAM // `define PARAM
//Cache configurations //Cache configurations
`define DCACHE_SIZE 4096 //Bytes //Bytes
`define DCACHE_SIZE 4096
`ifdef SYN `ifdef SYN
`define DCACHE_WAYS 1 `define DCACHE_WAYS 1
`else `else
`define DCACHE_WAYS 2 `define DCACHE_WAYS 2
`endif `endif
`define DCACHE_BLOCK 128 //Bytes
//Bytes
`define DCACHE_BLOCK 128
`define DCACHE_BANKS 8 `define DCACHE_BANKS 8
`define DCACHE_LOG_NUM_BANKS $clog2(`DCACHE_BANKS) `define DCACHE_LOG_NUM_BANKS $clog2(`DCACHE_BANKS)
`define DCACHE_NUM_WORDS_PER_BLOCK 4 `define DCACHE_NUM_WORDS_PER_BLOCK 4
`define DCACHE_NUM_REQ `NT `define DCACHE_NUM_REQ `NT
`define DCACHE_LOG_NUM_REQ $clog2(`DCACHE_NUM_REQ) `define DCACHE_LOG_NUM_REQ $clog2(`DCACHE_NUM_REQ)
`define DCACHE_WAY_INDEX $clog2(`DCACHE_WAYS) //set this to 1 if CACHE_WAYS is 1 //set this to 1 if CACHE_WAYS is 1
`define DCACHE_WAY_INDEX $clog2(`DCACHE_WAYS)
//`define DCACHE_WAY_INDEX 1 //`define DCACHE_WAY_INDEX 1
`define DCACHE_BLOCK_PER_BANK (`DCACHE_BLOCK / `DCACHE_BANKS) `define DCACHE_BLOCK_PER_BANK (`DCACHE_BLOCK / `DCACHE_BANKS)
@@ -167,6 +171,7 @@
`define DCACHE_ADDR_TAG_END 31 `define DCACHE_ADDR_TAG_END 31
// Mask
`define DCACHE_MEM_REQ_ADDR_MASK (32'hffffffff - (`DCACHE_BLOCK-1))

3
rtl/VX_dmem_controller.v
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@@ -73,7 +73,8 @@ module VX_dmem_controller (
.ADDR_OFFSET_START (`DCACHE_ADDR_OFFSET_ST), .ADDR_OFFSET_START (`DCACHE_ADDR_OFFSET_ST),
.ADDR_OFFSET_END (`DCACHE_ADDR_OFFSET_ED), .ADDR_OFFSET_END (`DCACHE_ADDR_OFFSET_ED),
.ADDR_IND_START (`DCACHE_IND_ST), .ADDR_IND_START (`DCACHE_IND_ST),
.ADDR_IND_END (`DCACHE_IND_ED) .ADDR_IND_END (`DCACHE_IND_ED),
.MEM_ADDR_REQ_MASK (`DCACHE_MEM_REQ_ADDR_MASK)
) )
dcache dcache
( (

1
rtl/VX_execute_unit.v
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@@ -102,6 +102,7 @@ module VX_execute_unit (
assign VX_inst_exec_wb.wb_warp_num = VX_exec_unit_req.warp_num; assign VX_inst_exec_wb.wb_warp_num = VX_exec_unit_req.warp_num;
assign VX_inst_exec_wb.alu_result = VX_exec_unit_req.jal ? duplicate_PC_data : alu_result; assign VX_inst_exec_wb.alu_result = VX_exec_unit_req.jal ? duplicate_PC_data : alu_result;
assign VX_inst_exec_wb.exec_wb_pc = in_curr_PC;
// Jal rsp // Jal rsp
assign VX_jal_rsp.jal = in_jal; assign VX_jal_rsp.jal = in_jal;
assign VX_jal_rsp.jal_dest = $signed(in_a_reg_data[jal_branch_use_index]) + $signed(in_jal_offset); assign VX_jal_rsp.jal_dest = $signed(in_a_reg_data[jal_branch_use_index]) + $signed(in_jal_offset);

12
rtl/VX_gpr_stage.v
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@@ -133,13 +133,13 @@ module VX_gpr_stage (
assign VX_lsu_req.base_address = (delayed_lsu_last_cycle) ? temp_base_address : real_base_address; assign VX_lsu_req.base_address = (delayed_lsu_last_cycle) ? temp_base_address : real_base_address;
VX_generic_register #(.N(52)) lsu_reg( VX_generic_register #(.N(84)) lsu_reg(
.clk (clk), .clk (clk),
.reset(reset), .reset(reset),
.stall(stall_lsu), .stall(stall_lsu),
.flush(flush_lsu), .flush(flush_lsu),
.in ({VX_lsu_req_temp.valid, VX_lsu_req_temp.warp_num, VX_lsu_req_temp.offset, VX_lsu_req_temp.mem_read, VX_lsu_req_temp.mem_write, VX_lsu_req_temp.rd, VX_lsu_req_temp.wb}), .in ({VX_lsu_req_temp.valid, VX_lsu_req_temp.lsu_pc, VX_lsu_req_temp.warp_num, VX_lsu_req_temp.offset, VX_lsu_req_temp.mem_read, VX_lsu_req_temp.mem_write, VX_lsu_req_temp.rd, VX_lsu_req_temp.wb}),
.out ({VX_lsu_req.valid , VX_lsu_req.warp_num , VX_lsu_req.offset , VX_lsu_req.mem_read , VX_lsu_req.mem_write , VX_lsu_req.rd , VX_lsu_req.wb }) .out ({VX_lsu_req.valid , VX_lsu_req.lsu_pc ,VX_lsu_req.warp_num , VX_lsu_req.offset , VX_lsu_req.mem_read , VX_lsu_req.mem_write , VX_lsu_req.rd , VX_lsu_req.wb })
); );
VX_generic_register #(.N(231)) exec_unit_reg( VX_generic_register #(.N(231)) exec_unit_reg(
@@ -180,13 +180,13 @@ module VX_gpr_stage (
`else `else
VX_generic_register #(.N(308)) lsu_reg( VX_generic_register #(.N(340)) lsu_reg(
.clk (clk), .clk (clk),
.reset(reset), .reset(reset),
.stall(stall_lsu), .stall(stall_lsu),
.flush(flush_lsu), .flush(flush_lsu),
.in ({VX_lsu_req_temp.valid, VX_lsu_req_temp.warp_num, VX_lsu_req_temp.store_data, VX_lsu_req_temp.base_address, VX_lsu_req_temp.offset, VX_lsu_req_temp.mem_read, VX_lsu_req_temp.mem_write, VX_lsu_req_temp.rd, VX_lsu_req_temp.wb}), .in ({VX_lsu_req_temp.valid, VX_lsu_req_temp.lsu_pc, VX_lsu_req_temp.warp_num, VX_lsu_req_temp.store_data, VX_lsu_req_temp.base_address, VX_lsu_req_temp.offset, VX_lsu_req_temp.mem_read, VX_lsu_req_temp.mem_write, VX_lsu_req_temp.rd, VX_lsu_req_temp.wb}),
.out ({VX_lsu_req.valid , VX_lsu_req.warp_num , VX_lsu_req.store_data , VX_lsu_req.base_address , VX_lsu_req.offset , VX_lsu_req.mem_read , VX_lsu_req.mem_write , VX_lsu_req.rd , VX_lsu_req.wb }) .out ({VX_lsu_req.valid , VX_lsu_req.lsu_pc , VX_lsu_req.warp_num , VX_lsu_req.store_data , VX_lsu_req.base_address , VX_lsu_req.offset , VX_lsu_req.mem_read , VX_lsu_req.mem_write , VX_lsu_req.rd , VX_lsu_req.wb })
); );
VX_generic_register #(.N(487)) exec_unit_reg( VX_generic_register #(.N(487)) exec_unit_reg(

1
rtl/VX_inst_multiplex.v
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@@ -40,6 +40,7 @@ module VX_inst_multiplex (
assign VX_lsu_req.mem_write = VX_bckE_req.mem_write; assign VX_lsu_req.mem_write = VX_bckE_req.mem_write;
assign VX_lsu_req.rd = VX_bckE_req.rd; assign VX_lsu_req.rd = VX_bckE_req.rd;
assign VX_lsu_req.wb = VX_bckE_req.wb; assign VX_lsu_req.wb = VX_bckE_req.wb;
assign VX_lsu_req.lsu_pc = VX_bckE_req.curr_PC;
// Execute Unit // Execute Unit

1
rtl/VX_lsu.v
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@@ -49,6 +49,7 @@ module VX_lsu (
assign VX_mem_wb.wb_valid = VX_lsu_req.valid; assign VX_mem_wb.wb_valid = VX_lsu_req.valid;
assign VX_mem_wb.wb_warp_num = VX_lsu_req.warp_num; assign VX_mem_wb.wb_warp_num = VX_lsu_req.warp_num;
assign VX_mem_wb.mem_wb_pc = VX_lsu_req.lsu_pc;
integer curr_t; integer curr_t;
always @(negedge clk) begin always @(negedge clk) begin

6
rtl/VX_writeback.v
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@@ -51,4 +51,10 @@ module VX_writeback (
0; 0;
assign VX_writeback_inter.wb_pc = exec_wb ? VX_inst_exec_wb.exec_wb_pc :
csr_wb ? 32'hdeadbeef :
mem_wb ? VX_mem_wb.mem_wb_pc :
32'hdeadbeef;
endmodule // VX_writeback endmodule // VX_writeback

2
rtl/cache/VX_cache_bank_valid.v vendored
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@@ -9,7 +9,7 @@ module VX_cache_bank_valid
( (
input wire [NUM_REQ-1:0] i_p_valid, input wire [NUM_REQ-1:0] i_p_valid,
input wire [NUM_REQ-1:0][31:0] i_p_addr, input wire [NUM_REQ-1:0][31:0] i_p_addr,
output reg [NUMBER_BANKS - 1 : 0][`NT_M1:0] thread_track_banks output reg [NUMBER_BANKS - 1 : 0][NUM_REQ-1:0] thread_track_banks
); );
generate generate

2
rtl/cache/VX_cache_data_per_index.v vendored
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@@ -93,7 +93,7 @@ module VX_cache_data_per_index
genvar ways; genvar ways;
for(ways=0; ways < CACHE_WAYS; ways = ways + 1) begin for(ways=0; ways < CACHE_WAYS; ways = ways + 1) begin : each_way
assign hit_per_way[ways] = ((valid_use_per_way[ways] == 1'b1) && (tag_use_per_way[ways] == tag_write)) ? 1'b1 : 0; assign hit_per_way[ways] = ((valid_use_per_way[ways] == 1'b1) && (tag_use_per_way[ways] == tag_write)) ? 1'b1 : 0;
assign we_per_way[ways] = (evict == 1'b1) || (update == 1'b1) ? ((ways == way_to_update) ? (we) : 0) : 0; assign we_per_way[ways] = (evict == 1'b1) || (update == 1'b1) ? ((ways == way_to_update) ? (we) : 0) : 0;

7
rtl/cache/VX_d_cache.v vendored
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@@ -36,7 +36,8 @@ module VX_d_cache
parameter ADDR_OFFSET_START = 5, parameter ADDR_OFFSET_START = 5,
parameter ADDR_OFFSET_END = 6, parameter ADDR_OFFSET_END = 6,
parameter ADDR_IND_START = 7, parameter ADDR_IND_START = 7,
parameter ADDR_IND_END = 14 parameter ADDR_IND_END = 14,
parameter MEM_ADDR_REQ_MASK = 32'hffffffc0
) )
( (
clk, clk,
@@ -353,8 +354,8 @@ module VX_d_cache
// Mem Rsp // Mem Rsp
// Req to mem: // Req to mem:
assign o_m_evict_addr = evict_addr & 32'hffffffc0; assign o_m_evict_addr = evict_addr & MEM_ADDR_REQ_MASK;
assign o_m_read_addr = miss_addr & 32'hffffffc0; assign o_m_read_addr = miss_addr & MEM_ADDR_REQ_MASK;
assign o_m_valid = (state == SEND_MEM_REQ); assign o_m_valid = (state == SEND_MEM_REQ);
assign o_m_read_or_write = (state == SEND_MEM_REQ) && (|eviction_wb_old); assign o_m_read_or_write = (state == SEND_MEM_REQ) && (|eviction_wb_old);
//end //end

1
rtl/interfaces/VX_inst_exec_wb_inter.v
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@@ -8,6 +8,7 @@
interface VX_inst_exec_wb_inter (); interface VX_inst_exec_wb_inter ();
wire[`NT_M1:0][31:0] alu_result; wire[`NT_M1:0][31:0] alu_result;
wire[31:0] exec_wb_pc;
wire[4:0] rd; wire[4:0] rd;
wire[1:0] wb; wire[1:0] wb;
wire[`NT_M1:0] wb_valid; wire[`NT_M1:0] wb_valid;

1
rtl/interfaces/VX_inst_mem_wb_inter.v
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@@ -8,6 +8,7 @@
interface VX_inst_mem_wb_inter (); interface VX_inst_mem_wb_inter ();
wire[`NT_M1:0][31:0] loaded_data; wire[`NT_M1:0][31:0] loaded_data;
wire[31:0] mem_wb_pc;
wire[4:0] rd; wire[4:0] rd;
wire[1:0] wb; wire[1:0] wb;
wire[`NT_M1:0] wb_valid; wire[`NT_M1:0] wb_valid;

1
rtl/interfaces/VX_lsu_req_inter.v
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@@ -8,6 +8,7 @@
interface VX_lsu_req_inter (); interface VX_lsu_req_inter ();
wire[`NT_M1:0] valid; wire[`NT_M1:0] valid;
wire[31:0] lsu_pc;
wire[`NW_M1:0] warp_num; wire[`NW_M1:0] warp_num;
wire[`NT_M1:0][31:0] store_data; wire[`NT_M1:0][31:0] store_data;
wire[`NT_M1:0][31:0] base_address; // A reg data wire[`NT_M1:0][31:0] base_address; // A reg data

1
rtl/interfaces/VX_wb_inter.v
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@@ -8,6 +8,7 @@
interface VX_wb_inter (); interface VX_wb_inter ();
wire[`NT_M1:0][31:0] write_data; wire[`NT_M1:0][31:0] write_data;
wire[31:0] wb_pc;
wire[4:0] rd; wire[4:0] rd;
wire[1:0] wb; wire[1:0] wb;
wire[`NT_M1:0] wb_valid; wire[`NT_M1:0] wb_valid;

45
rtl/modelsim/vortex_dpi.cpp
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@@ -16,7 +16,7 @@
extern "C" { extern "C" {
void load_file (char * filename); void load_file (char * filename);
void ibus_driver (bool clk, unsigned pc_addr, unsigned * instruction); void ibus_driver (bool clk, unsigned pc_addr, unsigned * instruction);
void dbus_driver (bool clk, unsigned o_m_read_addr, unsigned o_m_evict_addr, bool o_m_valid, svLogicVecVal * o_m_writedata, bool o_m_read_or_write, svLogicVecVal * i_m_readdata, bool * i_m_ready); void dbus_driver (bool clk, unsigned o_m_read_addr, unsigned o_m_evict_addr, bool o_m_valid, svLogicVecVal * o_m_writedata, bool o_m_read_or_write, unsigned cache_banks, unsigned num_words_per_block, svLogicVecVal * i_m_readdata, bool * i_m_ready);
void io_handler (bool clk, bool io_valid, unsigned io_data); void io_handler (bool clk, bool io_valid, unsigned io_data);
void gracefulExit(int); void gracefulExit(int);
} }
@@ -82,7 +82,7 @@ void ibus_driver(bool clk, unsigned pc_addr, unsigned * instruction)
} }
void dbus_driver(bool clk, unsigned o_m_read_addr, unsigned o_m_evict_addr, bool o_m_valid, svLogicVecVal * o_m_writedata, bool o_m_read_or_write, svLogicVecVal * i_m_readdata, bool * i_m_ready) void dbus_driver(bool clk, unsigned o_m_read_addr, unsigned o_m_evict_addr, bool o_m_valid, svLogicVecVal * o_m_writedata, bool o_m_read_or_write, unsigned cache_banks, unsigned num_words_per_block, svLogicVecVal * i_m_readdata, bool * i_m_ready)
{ {
@@ -90,18 +90,18 @@ void dbus_driver(bool clk, unsigned o_m_read_addr, unsigned o_m_evict_addr, bool
{ {
s_vpi_vecval * real_i_m_readdata = (s_vpi_vecval *) i_m_readdata; s_vpi_vecval * real_i_m_readdata = (s_vpi_vecval *) i_m_readdata;
(*i_m_ready) = false; (*i_m_ready) = false;
for (int i = 0; i < CACHE_NUM_BANKS; i++) for (int i = 0; i < cache_banks; i++)
{ {
for (int j = 0; j < CACHE_WORDS_PER_BLOCK; j++) for (int j = 0; j < num_words_per_block; j++)
{ {
unsigned index = getIndex(i,j, CACHE_WORDS_PER_BLOCK); unsigned index = getIndex(i,j, num_words_per_block);
real_i_m_readdata[index].aval = 0x506070; real_i_m_readdata[index].aval = 0x506070;
// svGetArrElemPtr2(i_m_readdata, i, j); // svGetArrElemPtr2(i_m_readdata, i, j);
// svPutLogicArrElem2VecVal(i_m_readdata, i, j); // svPutLogicArrElem2VecVal(i_m_readdata, i, j);
// i_m_readdata[getIndex(i,j, CACHE_WORDS_PER_BLOCK)] = 0; // i_m_readdata[getIndex(i,j, num_words_per_block)] = 0;
} }
} }
} }
@@ -123,23 +123,25 @@ void dbus_driver(bool clk, unsigned o_m_read_addr, unsigned o_m_evict_addr, bool
*i_m_ready = true; *i_m_ready = true;
s_vpi_vecval * real_i_m_readdata = (s_vpi_vecval *) i_m_readdata; s_vpi_vecval * real_i_m_readdata = (s_vpi_vecval *) i_m_readdata;
for (int curr_e = 0; curr_e < (CACHE_NUM_BANKS*CACHE_WORDS_PER_BLOCK); curr_e++) for (int curr_e = 0; curr_e < (cache_banks*num_words_per_block); curr_e++)
{ {
unsigned new_addr = refill_addr + (4*curr_e); unsigned new_addr = refill_addr + (4*curr_e);
unsigned addr_without_byte = new_addr >> 2; unsigned addr_without_byte = new_addr >> 2;
unsigned bits_per_bank = (int)log2(CACHE_NUM_BANKS);
unsigned maskbits_per_bank = calculate_bits_per_bank_num(bits_per_bank); unsigned bits_per_bank = (int)log2(cache_banks);
// unsigned maskbits_per_bank = calculate_bits_per_bank_num(bits_per_bank);
unsigned maskbits_per_bank = cache_banks - 1;
unsigned bank_num = addr_without_byte & maskbits_per_bank; unsigned bank_num = addr_without_byte & maskbits_per_bank;
unsigned addr_wihtout_bank = addr_without_byte >> bits_per_bank; unsigned addr_wihtout_bank = addr_without_byte >> bits_per_bank;
unsigned offset_num = addr_wihtout_bank & 0x3; unsigned offset_num = addr_wihtout_bank & (num_words_per_block-1);
unsigned value; unsigned value;
ram.getWord(new_addr, &value); ram.getWord(new_addr, &value);
// fprintf(stderr, "-------- (%x) i_m_readdata[%d][%d] (%d) = %x\n", new_addr, bank_num, offset_num, curr_e, value); fprintf(stdout, "-------- (%x) i_m_readdata[%d][%d] (%d) = %x\n", new_addr, bank_num, offset_num, curr_e, value);
unsigned index = getIndex(bank_num,offset_num, CACHE_WORDS_PER_BLOCK); unsigned index = getIndex(bank_num,offset_num, num_words_per_block);
// fprintf(stderr, "Index: %d (%d, %d) = %x\n", index, bank_num, offset_num, value); // fprintf(stderr, "Index: %d (%d, %d) = %x\n", index, bank_num, offset_num, value);
@@ -158,18 +160,20 @@ void dbus_driver(bool clk, unsigned o_m_read_addr, unsigned o_m_evict_addr, bool
{ {
// fprintf(stderr, "++++++++++++++++++++++++++++++++\n"); // fprintf(stderr, "++++++++++++++++++++++++++++++++\n");
for (int curr_e = 0; curr_e < (CACHE_NUM_BANKS*CACHE_WORDS_PER_BLOCK); curr_e++) for (int curr_e = 0; curr_e < (cache_banks*num_words_per_block); curr_e++)
{ {
unsigned new_addr = (o_m_evict_addr) + (4*curr_e); unsigned new_addr = (o_m_evict_addr) + (4*curr_e);
unsigned addr_without_byte = new_addr >> 2; unsigned addr_without_byte = new_addr >> 2;
unsigned bits_per_bank = (int)log2(CACHE_NUM_BANKS); unsigned bits_per_bank = (int)log2(cache_banks);
unsigned maskbits_per_bank = calculate_bits_per_bank_num(bits_per_bank); // unsigned maskbits_per_bank = calculate_bits_per_bank_num(bits_per_bank);
unsigned maskbits_per_bank = cache_banks - 1;
unsigned bank_num = addr_without_byte & maskbits_per_bank; unsigned bank_num = addr_without_byte & maskbits_per_bank;
unsigned addr_wihtout_bank = addr_without_byte >> bits_per_bank; unsigned addr_wihtout_bank = addr_without_byte >> bits_per_bank;
unsigned offset_num = addr_wihtout_bank & 0x3; unsigned offset_num = addr_wihtout_bank & (num_words_per_block-1);
unsigned index = getIndex(bank_num,offset_num, CACHE_WORDS_PER_BLOCK); // unsigned offset_num = addr_wihtout_bank & 0x3;
unsigned index = getIndex(bank_num,offset_num, num_words_per_block);
@@ -177,12 +181,12 @@ void dbus_driver(bool clk, unsigned o_m_read_addr, unsigned o_m_evict_addr, bool
// new_value = (unsigned *) svGetArrElemPtr2(o_m_writedata, bank_num, offset_num); // new_value = (unsigned *) svGetArrElemPtr2(o_m_writedata, bank_num, offset_num);
// new_value = getElem(o_m_writedata, index); // new_value = getElem(o_m_writedata, index);
// unsigned new_value = o_m_writedata[getIndex(bank_num,offset_num, CACHE_WORDS_PER_BLOCK)]; // unsigned new_value = o_m_writedata[getIndex(bank_num,offset_num, num_words_per_block)];
ram.writeWord( new_addr, &new_value); ram.writeWord( new_addr, &new_value);
// fprintf(stderr, "+++++++ (%x) writeback[%d][%d] (%d) = %x\n", new_addr, bank_num, offset_num, curr_e, new_value); fprintf(stdout, "+++++++ (%x) writeback[%d][%d] (%d) = %x\n", new_addr, bank_num, offset_num, curr_e, new_value);
} }
} }
@@ -210,8 +214,7 @@ void io_handler(bool clk, bool io_valid, unsigned io_data)
{ {
uint32_t data_write = (uint32_t) (io_data); uint32_t data_write = (uint32_t) (io_data);
char c = (char) data_write; fprintf(stderr, "%c", (char) data_write);
fprintf(stderr, "%c", c );
fflush(stderr); fflush(stderr);
} }
} }

5
rtl/modelsim/vortex_tb.v
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@@ -19,7 +19,8 @@ import "DPI-C" dbus_driver = function void dbus_driver( input logic clk,
input logic o_m_valid, input logic o_m_valid,
input reg[31:0] o_m_writedata[`DCACHE_BANKS - 1:0][`DCACHE_NUM_WORDS_PER_BLOCK-1:0], input reg[31:0] o_m_writedata[`DCACHE_BANKS - 1:0][`DCACHE_NUM_WORDS_PER_BLOCK-1:0],
input logic o_m_read_or_write, input logic o_m_read_or_write,
input int cache_banks,
input int words_per_block,
// Rsp // Rsp
output reg[31:0] i_m_readdata[`DCACHE_BANKS - 1:0][`DCACHE_NUM_WORDS_PER_BLOCK-1:0], output reg[31:0] i_m_readdata[`DCACHE_BANKS - 1:0][`DCACHE_NUM_WORDS_PER_BLOCK-1:0],
output logic i_m_ready); output logic i_m_ready);
@@ -90,7 +91,7 @@ module vortex_tb (
always @(negedge clk) begin always @(negedge clk) begin
ibus_driver(clk, icache_request_pc_address, icache_response_instruction); ibus_driver(clk, icache_request_pc_address, icache_response_instruction);
dbus_driver(clk, o_m_read_addr, o_m_evict_addr, o_m_valid, o_m_writedata, o_m_read_or_write, i_m_readdata, i_m_ready); dbus_driver(clk, o_m_read_addr, o_m_evict_addr, o_m_valid, o_m_writedata, o_m_read_or_write, `DCACHE_BANKS, `DCACHE_NUM_WORDS_PER_BLOCK, i_m_readdata, i_m_ready);
io_handler (clk, io_valid, io_data); io_handler (clk, io_valid, io_data);
end end

4
rtl/simulate/VX_define.h
View File

@@ -3,8 +3,8 @@
#define NW 8 #define NW 8
#define CACHE_NUM_BANKS 8 // #define CACHE_NUM_BANKS 8
#define CACHE_WORDS_PER_BLOCK 4 // #define CACHE_WORDS_PER_BLOCK 4
#define R_INST 51 #define R_INST 51
#define L_INST 3 #define L_INST 3

20
runtime/mains/simple/vx_simple_main.c
View File

@@ -4,25 +4,29 @@
#include "../../tests/tests.h" #include "../../tests/tests.h"
#include "../../vx_api/vx_api.h" #include "../../vx_api/vx_api.h"
unsigned array[] = {0,1,2,3};
int main() int main()
{ {
// Main is called with all threads active of warp 0 // Main is called with all threads active of warp 0
vx_tmc(1); vx_tmc(1);
vx_print_str("Simple Main1\n"); // vx_print_str("Simple Main\n");
// TMC test
// // TMC test
test_tmc(); test_tmc();
// Control Divergence Test // // Control Divergence Test
vx_print_str("test_divergence\n"); // vx_print_str("test_divergence\n");
vx_tmc(4); // vx_tmc(4);
test_divergence(); // test_divergence();
vx_tmc(1); // vx_tmc(1);
// Test wspawn // Test wspawn
vx_print_str("test_spawn\n"); // vx_print_str("test_wspawn\n");
test_wsapwn(); test_wsapwn();
return 0; return 0;

383
runtime/mains/simple/vx_simple_main.dump
View File

@@ -114,7 +114,7 @@ Disassembly of section .text:
80000128: 810007b7 lui a5,0x81000 80000128: 810007b7 lui a5,0x81000
8000012c: fec42703 lw a4,-20(s0) 8000012c: fec42703 lw a4,-20(s0)
80000130: 00271713 slli a4,a4,0x2 80000130: 00271713 slli a4,a4,0x2
80000134: 12478793 addi a5,a5,292 # 81000124 <wsapwn_arr+0xffffff24> 80000134: 0f878793 addi a5,a5,248 # 810000f8 <div_arr+0xffffff04>
80000138: 00f707b3 add a5,a4,a5 80000138: 00f707b3 add a5,a4,a5
8000013c: 0007a783 lw a5,0(a5) 8000013c: 0007a783 lw a5,0(a5)
80000140: 00078513 mv a0,a5 80000140: 00078513 mv a0,a5
@@ -137,7 +137,7 @@ Disassembly of section .text:
8000017c: fe842503 lw a0,-24(s0) 8000017c: fe842503 lw a0,-24(s0)
80000180: f95ff0ef jal ra,80000114 <vx_print_hex> 80000180: f95ff0ef jal ra,80000114 <vx_print_hex>
80000184: 810007b7 lui a5,0x81000 80000184: 810007b7 lui a5,0x81000
80000188: 04078513 addi a0,a5,64 # 81000040 <wsapwn_arr+0xfffffe40> 80000188: 04078513 addi a0,a5,64 # 81000040 <div_arr+0xfffffe4c>
8000018c: f4dff0ef jal ra,800000d8 <vx_print_str> 8000018c: f4dff0ef jal ra,800000d8 <vx_print_str>
80000190: 00000013 nop 80000190: 00000013 nop
80000194: 01c12083 lw ra,28(sp) 80000194: 01c12083 lw ra,28(sp)
@@ -151,13 +151,13 @@ Disassembly of section .text:
800001ac: 00812c23 sw s0,24(sp) 800001ac: 00812c23 sw s0,24(sp)
800001b0: 02010413 addi s0,sp,32 800001b0: 02010413 addi s0,sp,32
800001b4: 810007b7 lui a5,0x81000 800001b4: 810007b7 lui a5,0x81000
800001b8: 1ec7a783 lw a5,492(a5) # 810001ec <wsapwn_arr+0xffffffec> 800001b8: 1e07a783 lw a5,480(a5) # 810001e0 <div_arr+0xffffffec>
800001bc: 00078513 mv a0,a5 800001bc: 00078513 mv a0,a5
800001c0: ea9ff0ef jal ra,80000068 <vx_tmc> 800001c0: ea9ff0ef jal ra,80000068 <vx_tmc>
800001c4: 810007b7 lui a5,0x81000 800001c4: 810007b7 lui a5,0x81000
800001c8: 1e87a703 lw a4,488(a5) # 810001e8 <wsapwn_arr+0xffffffe8> 800001c8: 1dc7a703 lw a4,476(a5) # 810001dc <div_arr+0xffffffe8>
800001cc: 810007b7 lui a5,0x81000 800001cc: 810007b7 lui a5,0x81000
800001d0: 1e47a783 lw a5,484(a5) # 810001e4 <wsapwn_arr+0xffffffe4> 800001d0: 1d87a783 lw a5,472(a5) # 810001d8 <div_arr+0xffffffe4>
800001d4: 00078513 mv a0,a5 800001d4: 00078513 mv a0,a5
800001d8: 000700e7 jalr a4 800001d8: 000700e7 jalr a4
800001dc: eadff0ef jal ra,80000088 <vx_warpID> 800001dc: eadff0ef jal ra,80000088 <vx_warpID>
@@ -186,15 +186,15 @@ Disassembly of section .text:
80000230: fed42023 sw a3,-32(s0) 80000230: fed42023 sw a3,-32(s0)
80000234: 810007b7 lui a5,0x81000 80000234: 810007b7 lui a5,0x81000
80000238: fe442703 lw a4,-28(s0) 80000238: fe442703 lw a4,-28(s0)
8000023c: 1ee7a423 sw a4,488(a5) # 810001e8 <wsapwn_arr+0xffffffe8> 8000023c: 1ce7ae23 sw a4,476(a5) # 810001dc <div_arr+0xffffffe8>
80000240: 810007b7 lui a5,0x81000 80000240: 810007b7 lui a5,0x81000
80000244: fe042703 lw a4,-32(s0) 80000244: fe042703 lw a4,-32(s0)
80000248: 1ee7a223 sw a4,484(a5) # 810001e4 <wsapwn_arr+0xffffffe4> 80000248: 1ce7ac23 sw a4,472(a5) # 810001d8 <div_arr+0xffffffe4>
8000024c: 810007b7 lui a5,0x81000 8000024c: 810007b7 lui a5,0x81000
80000250: fe842703 lw a4,-24(s0) 80000250: fe842703 lw a4,-24(s0)
80000254: 1ee7a623 sw a4,492(a5) # 810001ec <wsapwn_arr+0xffffffec> 80000254: 1ee7a023 sw a4,480(a5) # 810001e0 <div_arr+0xffffffec>
80000258: 800007b7 lui a5,0x80000 80000258: 800007b7 lui a5,0x80000
8000025c: 1a478793 addi a5,a5,420 # 800001a4 <wsapwn_arr+0xfeffffa4> 8000025c: 1a478793 addi a5,a5,420 # 800001a4 <div_arr+0xfeffffb0>
80000260: 00078593 mv a1,a5 80000260: 00078593 mv a1,a5
80000264: fec42503 lw a0,-20(s0) 80000264: fec42503 lw a0,-20(s0)
80000268: df9ff0ef jal ra,80000060 <vx_wspawn> 80000268: df9ff0ef jal ra,80000060 <vx_wspawn>
@@ -211,7 +211,7 @@ Disassembly of section .text:
8000028c: 00812c23 sw s0,24(sp) 8000028c: 00812c23 sw s0,24(sp)
80000290: 02010413 addi s0,sp,32 80000290: 02010413 addi s0,sp,32
80000294: 810007b7 lui a5,0x81000 80000294: 810007b7 lui a5,0x81000
80000298: 08478513 addi a0,a5,132 # 81000084 <wsapwn_arr+0xfffffe84> 80000298: 08478513 addi a0,a5,132 # 81000084 <div_arr+0xfffffe90>
8000029c: e3dff0ef jal ra,800000d8 <vx_print_str> 8000029c: e3dff0ef jal ra,800000d8 <vx_print_str>
800002a0: 00400513 li a0,4 800002a0: 00400513 li a0,4
800002a4: dc5ff0ef jal ra,80000068 <vx_tmc> 800002a4: dc5ff0ef jal ra,80000068 <vx_tmc>
@@ -221,41 +221,41 @@ Disassembly of section .text:
800002b4: 810007b7 lui a5,0x81000 800002b4: 810007b7 lui a5,0x81000
800002b8: fec42683 lw a3,-20(s0) 800002b8: fec42683 lw a3,-20(s0)
800002bc: 00269693 slli a3,a3,0x2 800002bc: 00269693 slli a3,a3,0x2
800002c0: 1f078793 addi a5,a5,496 # 810001f0 <wsapwn_arr+0xfffffff0> 800002c0: 17878793 addi a5,a5,376 # 81000178 <div_arr+0xffffff84>
800002c4: 00f687b3 add a5,a3,a5 800002c4: 00f687b3 add a5,a3,a5
800002c8: 00e7a023 sw a4,0(a5) 800002c8: 00e7a023 sw a4,0(a5)
800002cc: 00100513 li a0,1 800002cc: 00100513 li a0,1
800002d0: d99ff0ef jal ra,80000068 <vx_tmc> 800002d0: d99ff0ef jal ra,80000068 <vx_tmc>
800002d4: 810007b7 lui a5,0x81000 800002d4: 810007b7 lui a5,0x81000
800002d8: 1f07a783 lw a5,496(a5) # 810001f0 <wsapwn_arr+0xfffffff0> 800002d8: 1787a783 lw a5,376(a5) # 81000178 <div_arr+0xffffff84>
800002dc: 00078513 mv a0,a5 800002dc: 00078513 mv a0,a5
800002e0: e35ff0ef jal ra,80000114 <vx_print_hex> 800002e0: e35ff0ef jal ra,80000114 <vx_print_hex>
800002e4: 810007b7 lui a5,0x81000 800002e4: 810007b7 lui a5,0x81000
800002e8: 09078513 addi a0,a5,144 # 81000090 <wsapwn_arr+0xfffffe90> 800002e8: 09478513 addi a0,a5,148 # 81000094 <div_arr+0xfffffea0>
800002ec: dedff0ef jal ra,800000d8 <vx_print_str> 800002ec: dedff0ef jal ra,800000d8 <vx_print_str>
800002f0: 810007b7 lui a5,0x81000 800002f0: 810007b7 lui a5,0x81000
800002f4: 1f078793 addi a5,a5,496 # 810001f0 <wsapwn_arr+0xfffffff0> 800002f4: 17878793 addi a5,a5,376 # 81000178 <div_arr+0xffffff84>
800002f8: 0047a783 lw a5,4(a5) 800002f8: 0047a783 lw a5,4(a5)
800002fc: 00078513 mv a0,a5 800002fc: 00078513 mv a0,a5
80000300: e15ff0ef jal ra,80000114 <vx_print_hex> 80000300: e15ff0ef jal ra,80000114 <vx_print_hex>
80000304: 810007b7 lui a5,0x81000 80000304: 810007b7 lui a5,0x81000
80000308: 09078513 addi a0,a5,144 # 81000090 <wsapwn_arr+0xfffffe90> 80000308: 09478513 addi a0,a5,148 # 81000094 <div_arr+0xfffffea0>
8000030c: dcdff0ef jal ra,800000d8 <vx_print_str> 8000030c: dcdff0ef jal ra,800000d8 <vx_print_str>
80000310: 810007b7 lui a5,0x81000 80000310: 810007b7 lui a5,0x81000
80000314: 1f078793 addi a5,a5,496 # 810001f0 <wsapwn_arr+0xfffffff0> 80000314: 17878793 addi a5,a5,376 # 81000178 <div_arr+0xffffff84>
80000318: 0087a783 lw a5,8(a5) 80000318: 0087a783 lw a5,8(a5)
8000031c: 00078513 mv a0,a5 8000031c: 00078513 mv a0,a5
80000320: df5ff0ef jal ra,80000114 <vx_print_hex> 80000320: df5ff0ef jal ra,80000114 <vx_print_hex>
80000324: 810007b7 lui a5,0x81000 80000324: 810007b7 lui a5,0x81000
80000328: 09078513 addi a0,a5,144 # 81000090 <wsapwn_arr+0xfffffe90> 80000328: 09478513 addi a0,a5,148 # 81000094 <div_arr+0xfffffea0>
8000032c: dadff0ef jal ra,800000d8 <vx_print_str> 8000032c: dadff0ef jal ra,800000d8 <vx_print_str>
80000330: 810007b7 lui a5,0x81000 80000330: 810007b7 lui a5,0x81000
80000334: 1f078793 addi a5,a5,496 # 810001f0 <wsapwn_arr+0xfffffff0> 80000334: 17878793 addi a5,a5,376 # 81000178 <div_arr+0xffffff84>
80000338: 00c7a783 lw a5,12(a5) 80000338: 00c7a783 lw a5,12(a5)
8000033c: 00078513 mv a0,a5 8000033c: 00078513 mv a0,a5
80000340: dd5ff0ef jal ra,80000114 <vx_print_hex> 80000340: dd5ff0ef jal ra,80000114 <vx_print_hex>
80000344: 810007b7 lui a5,0x81000 80000344: 810007b7 lui a5,0x81000
80000348: 09078513 addi a0,a5,144 # 81000090 <wsapwn_arr+0xfffffe90> 80000348: 09478513 addi a0,a5,148 # 81000094 <div_arr+0xfffffea0>
8000034c: d8dff0ef jal ra,800000d8 <vx_print_str> 8000034c: d8dff0ef jal ra,800000d8 <vx_print_str>
80000350: 00000013 nop 80000350: 00000013 nop
80000354: 01c12083 lw ra,28(sp) 80000354: 01c12083 lw ra,28(sp)
@@ -289,7 +289,7 @@ Disassembly of section .text:
800003bc: 810007b7 lui a5,0x81000 800003bc: 810007b7 lui a5,0x81000
800003c0: fec42703 lw a4,-20(s0) 800003c0: fec42703 lw a4,-20(s0)
800003c4: 00271713 slli a4,a4,0x2 800003c4: 00271713 slli a4,a4,0x2
800003c8: 1f078793 addi a5,a5,496 # 810001f0 <wsapwn_arr+0xfffffff0> 800003c8: 1f478793 addi a5,a5,500 # 810001f4 <div_arr+0x0>
800003cc: 00f707b3 add a5,a4,a5 800003cc: 00f707b3 add a5,a4,a5
800003d0: 00a00713 li a4,10 800003d0: 00a00713 li a4,10
800003d4: 00e7a023 sw a4,0(a5) 800003d4: 00e7a023 sw a4,0(a5)
@@ -297,7 +297,7 @@ Disassembly of section .text:
800003dc: 810007b7 lui a5,0x81000 800003dc: 810007b7 lui a5,0x81000
800003e0: fec42703 lw a4,-20(s0) 800003e0: fec42703 lw a4,-20(s0)
800003e4: 00271713 slli a4,a4,0x2 800003e4: 00271713 slli a4,a4,0x2
800003e8: 1f078793 addi a5,a5,496 # 810001f0 <wsapwn_arr+0xfffffff0> 800003e8: 1f478793 addi a5,a5,500 # 810001f4 <div_arr+0x0>
800003ec: 00f707b3 add a5,a4,a5 800003ec: 00f707b3 add a5,a4,a5
800003f0: 00b00713 li a4,11 800003f0: 00b00713 li a4,11
800003f4: 00e7a023 sw a4,0(a5) 800003f4: 00e7a023 sw a4,0(a5)
@@ -314,7 +314,7 @@ Disassembly of section .text:
80000420: 810007b7 lui a5,0x81000 80000420: 810007b7 lui a5,0x81000
80000424: fec42703 lw a4,-20(s0) 80000424: fec42703 lw a4,-20(s0)
80000428: 00271713 slli a4,a4,0x2 80000428: 00271713 slli a4,a4,0x2
8000042c: 1f078793 addi a5,a5,496 # 810001f0 <wsapwn_arr+0xfffffff0> 8000042c: 1f478793 addi a5,a5,500 # 810001f4 <div_arr+0x0>
80000430: 00f707b3 add a5,a4,a5 80000430: 00f707b3 add a5,a4,a5
80000434: 00c00713 li a4,12 80000434: 00c00713 li a4,12
80000438: 00e7a023 sw a4,0(a5) 80000438: 00e7a023 sw a4,0(a5)
@@ -322,42 +322,42 @@ Disassembly of section .text:
80000440: 810007b7 lui a5,0x81000 80000440: 810007b7 lui a5,0x81000
80000444: fec42703 lw a4,-20(s0) 80000444: fec42703 lw a4,-20(s0)
80000448: 00271713 slli a4,a4,0x2 80000448: 00271713 slli a4,a4,0x2
8000044c: 1f078793 addi a5,a5,496 # 810001f0 <wsapwn_arr+0xfffffff0> 8000044c: 1f478793 addi a5,a5,500 # 810001f4 <div_arr+0x0>
80000450: 00f707b3 add a5,a4,a5 80000450: 00f707b3 add a5,a4,a5
80000454: 00d00713 li a4,13 80000454: 00d00713 li a4,13
80000458: 00e7a023 sw a4,0(a5) 80000458: 00e7a023 sw a4,0(a5)
8000045c: c25ff0ef jal ra,80000080 <vx_join> 8000045c: c25ff0ef jal ra,80000080 <vx_join>
80000460: c21ff0ef jal ra,80000080 <vx_join> 80000460: c21ff0ef jal ra,80000080 <vx_join>
80000464: 810007b7 lui a5,0x81000 80000464: 810007b7 lui a5,0x81000
80000468: 1f07a783 lw a5,496(a5) # 810001f0 <wsapwn_arr+0xfffffff0> 80000468: 1f47a783 lw a5,500(a5) # 810001f4 <div_arr+0x0>
8000046c: 00078513 mv a0,a5 8000046c: 00078513 mv a0,a5
80000470: ca5ff0ef jal ra,80000114 <vx_print_hex> 80000470: ca5ff0ef jal ra,80000114 <vx_print_hex>
80000474: 810007b7 lui a5,0x81000 80000474: 810007b7 lui a5,0x81000
80000478: 09078513 addi a0,a5,144 # 81000090 <wsapwn_arr+0xfffffe90> 80000478: 09478513 addi a0,a5,148 # 81000094 <div_arr+0xfffffea0>
8000047c: c5dff0ef jal ra,800000d8 <vx_print_str> 8000047c: c5dff0ef jal ra,800000d8 <vx_print_str>
80000480: 810007b7 lui a5,0x81000 80000480: 810007b7 lui a5,0x81000
80000484: 1f078793 addi a5,a5,496 # 810001f0 <wsapwn_arr+0xfffffff0> 80000484: 1f478793 addi a5,a5,500 # 810001f4 <div_arr+0x0>
80000488: 0047a783 lw a5,4(a5) 80000488: 0047a783 lw a5,4(a5)
8000048c: 00078513 mv a0,a5 8000048c: 00078513 mv a0,a5
80000490: c85ff0ef jal ra,80000114 <vx_print_hex> 80000490: c85ff0ef jal ra,80000114 <vx_print_hex>
80000494: 810007b7 lui a5,0x81000 80000494: 810007b7 lui a5,0x81000
80000498: 09078513 addi a0,a5,144 # 81000090 <wsapwn_arr+0xfffffe90> 80000498: 09478513 addi a0,a5,148 # 81000094 <div_arr+0xfffffea0>
8000049c: c3dff0ef jal ra,800000d8 <vx_print_str> 8000049c: c3dff0ef jal ra,800000d8 <vx_print_str>
800004a0: 810007b7 lui a5,0x81000 800004a0: 810007b7 lui a5,0x81000
800004a4: 1f078793 addi a5,a5,496 # 810001f0 <wsapwn_arr+0xfffffff0> 800004a4: 1f478793 addi a5,a5,500 # 810001f4 <div_arr+0x0>
800004a8: 0087a783 lw a5,8(a5) 800004a8: 0087a783 lw a5,8(a5)
800004ac: 00078513 mv a0,a5 800004ac: 00078513 mv a0,a5
800004b0: c65ff0ef jal ra,80000114 <vx_print_hex> 800004b0: c65ff0ef jal ra,80000114 <vx_print_hex>
800004b4: 810007b7 lui a5,0x81000 800004b4: 810007b7 lui a5,0x81000
800004b8: 09078513 addi a0,a5,144 # 81000090 <wsapwn_arr+0xfffffe90> 800004b8: 09478513 addi a0,a5,148 # 81000094 <div_arr+0xfffffea0>
800004bc: c1dff0ef jal ra,800000d8 <vx_print_str> 800004bc: c1dff0ef jal ra,800000d8 <vx_print_str>
800004c0: 810007b7 lui a5,0x81000 800004c0: 810007b7 lui a5,0x81000
800004c4: 1f078793 addi a5,a5,496 # 810001f0 <wsapwn_arr+0xfffffff0> 800004c4: 1f478793 addi a5,a5,500 # 810001f4 <div_arr+0x0>
800004c8: 00c7a783 lw a5,12(a5) 800004c8: 00c7a783 lw a5,12(a5)
800004cc: 00078513 mv a0,a5 800004cc: 00078513 mv a0,a5
800004d0: c45ff0ef jal ra,80000114 <vx_print_hex> 800004d0: c45ff0ef jal ra,80000114 <vx_print_hex>
800004d4: 810007b7 lui a5,0x81000 800004d4: 810007b7 lui a5,0x81000
800004d8: 09078513 addi a0,a5,144 # 81000090 <wsapwn_arr+0xfffffe90> 800004d8: 09478513 addi a0,a5,148 # 81000094 <div_arr+0xfffffea0>
800004dc: bfdff0ef jal ra,800000d8 <vx_print_str> 800004dc: bfdff0ef jal ra,800000d8 <vx_print_str>
800004e0: 00000013 nop 800004e0: 00000013 nop
800004e4: 01c12083 lw ra,28(sp) 800004e4: 01c12083 lw ra,28(sp)
@@ -375,7 +375,7 @@ Disassembly of section .text:
8000050c: 810007b7 lui a5,0x81000 8000050c: 810007b7 lui a5,0x81000
80000510: fec42703 lw a4,-20(s0) 80000510: fec42703 lw a4,-20(s0)
80000514: 00271713 slli a4,a4,0x2 80000514: 00271713 slli a4,a4,0x2
80000518: 20078793 addi a5,a5,512 # 81000200 <wsapwn_arr+0x0> 80000518: 1e478793 addi a5,a5,484 # 810001e4 <div_arr+0xfffffff0>
8000051c: 00f707b3 add a5,a4,a5 8000051c: 00f707b3 add a5,a4,a5
80000520: fec42703 lw a4,-20(s0) 80000520: fec42703 lw a4,-20(s0)
80000524: 00e7a023 sw a4,0(a5) 80000524: 00e7a023 sw a4,0(a5)
@@ -395,42 +395,42 @@ Disassembly of section .text:
80000554: 00812c23 sw s0,24(sp) 80000554: 00812c23 sw s0,24(sp)
80000558: 02010413 addi s0,sp,32 80000558: 02010413 addi s0,sp,32
8000055c: 800007b7 lui a5,0x80000 8000055c: 800007b7 lui a5,0x80000
80000560: 4f478793 addi a5,a5,1268 # 800004f4 <wsapwn_arr+0xff0002f4> 80000560: 4f478793 addi a5,a5,1268 # 800004f4 <div_arr+0xff000300>
80000564: fef42623 sw a5,-20(s0) 80000564: fef42623 sw a5,-20(s0)
80000568: fec42583 lw a1,-20(s0) 80000568: fec42583 lw a1,-20(s0)
8000056c: 00400513 li a0,4 8000056c: 00400513 li a0,4
80000570: af1ff0ef jal ra,80000060 <vx_wspawn> 80000570: af1ff0ef jal ra,80000060 <vx_wspawn>
80000574: f81ff0ef jal ra,800004f4 <simple_kernel> 80000574: f81ff0ef jal ra,800004f4 <simple_kernel>
80000578: 810007b7 lui a5,0x81000 80000578: 810007b7 lui a5,0x81000
8000057c: 2007a783 lw a5,512(a5) # 81000200 <wsapwn_arr+0x0> 8000057c: 1e47a783 lw a5,484(a5) # 810001e4 <div_arr+0xfffffff0>
80000580: 00078513 mv a0,a5 80000580: 00078513 mv a0,a5
80000584: b91ff0ef jal ra,80000114 <vx_print_hex> 80000584: b91ff0ef jal ra,80000114 <vx_print_hex>
80000588: 810007b7 lui a5,0x81000 80000588: 810007b7 lui a5,0x81000
8000058c: 09078513 addi a0,a5,144 # 81000090 <wsapwn_arr+0xfffffe90> 8000058c: 09478513 addi a0,a5,148 # 81000094 <div_arr+0xfffffea0>
80000590: b49ff0ef jal ra,800000d8 <vx_print_str> 80000590: b49ff0ef jal ra,800000d8 <vx_print_str>
80000594: 810007b7 lui a5,0x81000 80000594: 810007b7 lui a5,0x81000
80000598: 20078793 addi a5,a5,512 # 81000200 <wsapwn_arr+0x0> 80000598: 1e478793 addi a5,a5,484 # 810001e4 <div_arr+0xfffffff0>
8000059c: 0047a783 lw a5,4(a5) 8000059c: 0047a783 lw a5,4(a5)
800005a0: 00078513 mv a0,a5 800005a0: 00078513 mv a0,a5
800005a4: b71ff0ef jal ra,80000114 <vx_print_hex> 800005a4: b71ff0ef jal ra,80000114 <vx_print_hex>
800005a8: 810007b7 lui a5,0x81000 800005a8: 810007b7 lui a5,0x81000
800005ac: 09078513 addi a0,a5,144 # 81000090 <wsapwn_arr+0xfffffe90> 800005ac: 09478513 addi a0,a5,148 # 81000094 <div_arr+0xfffffea0>
800005b0: b29ff0ef jal ra,800000d8 <vx_print_str> 800005b0: b29ff0ef jal ra,800000d8 <vx_print_str>
800005b4: 810007b7 lui a5,0x81000 800005b4: 810007b7 lui a5,0x81000
800005b8: 20078793 addi a5,a5,512 # 81000200 <wsapwn_arr+0x0> 800005b8: 1e478793 addi a5,a5,484 # 810001e4 <div_arr+0xfffffff0>
800005bc: 0087a783 lw a5,8(a5) 800005bc: 0087a783 lw a5,8(a5)
800005c0: 00078513 mv a0,a5 800005c0: 00078513 mv a0,a5
800005c4: b51ff0ef jal ra,80000114 <vx_print_hex> 800005c4: b51ff0ef jal ra,80000114 <vx_print_hex>
800005c8: 810007b7 lui a5,0x81000 800005c8: 810007b7 lui a5,0x81000
800005cc: 09078513 addi a0,a5,144 # 81000090 <wsapwn_arr+0xfffffe90> 800005cc: 09478513 addi a0,a5,148 # 81000094 <div_arr+0xfffffea0>
800005d0: b09ff0ef jal ra,800000d8 <vx_print_str> 800005d0: b09ff0ef jal ra,800000d8 <vx_print_str>
800005d4: 810007b7 lui a5,0x81000 800005d4: 810007b7 lui a5,0x81000
800005d8: 20078793 addi a5,a5,512 # 81000200 <wsapwn_arr+0x0> 800005d8: 1e478793 addi a5,a5,484 # 810001e4 <div_arr+0xfffffff0>
800005dc: 00c7a783 lw a5,12(a5) 800005dc: 00c7a783 lw a5,12(a5)
800005e0: 00078513 mv a0,a5 800005e0: 00078513 mv a0,a5
800005e4: b31ff0ef jal ra,80000114 <vx_print_hex> 800005e4: b31ff0ef jal ra,80000114 <vx_print_hex>
800005e8: 810007b7 lui a5,0x81000 800005e8: 810007b7 lui a5,0x81000
800005ec: 09078513 addi a0,a5,144 # 81000090 <wsapwn_arr+0xfffffe90> 800005ec: 09478513 addi a0,a5,148 # 81000094 <div_arr+0xfffffea0>
800005f0: ae9ff0ef jal ra,800000d8 <vx_print_str> 800005f0: ae9ff0ef jal ra,800000d8 <vx_print_str>
800005f4: 00000013 nop 800005f4: 00000013 nop
800005f8: 01c12083 lw ra,28(sp) 800005f8: 01c12083 lw ra,28(sp)
@@ -445,7 +445,7 @@ Disassembly of section .text:
80000614: 01010413 addi s0,sp,16 80000614: 01010413 addi s0,sp,16
80000618: c6dff0ef jal ra,80000284 <test_tmc> 80000618: c6dff0ef jal ra,80000284 <test_tmc>
8000061c: 810007b7 lui a5,0x81000 8000061c: 810007b7 lui a5,0x81000
80000620: 09478513 addi a0,a5,148 # 81000094 <wsapwn_arr+0xfffffe94> 80000620: 09878513 addi a0,a5,152 # 81000098 <div_arr+0xfffffea4>
80000624: ab5ff0ef jal ra,800000d8 <vx_print_str> 80000624: ab5ff0ef jal ra,800000d8 <vx_print_str>
80000628: 00400513 li a0,4 80000628: 00400513 li a0,4
8000062c: a3dff0ef jal ra,80000068 <vx_tmc> 8000062c: a3dff0ef jal ra,80000068 <vx_tmc>
@@ -453,7 +453,7 @@ Disassembly of section .text:
80000634: 00100513 li a0,1 80000634: 00100513 li a0,1
80000638: a31ff0ef jal ra,80000068 <vx_tmc> 80000638: a31ff0ef jal ra,80000068 <vx_tmc>
8000063c: 810007b7 lui a5,0x81000 8000063c: 810007b7 lui a5,0x81000
80000640: 0a878513 addi a0,a5,168 # 810000a8 <wsapwn_arr+0xfffffea8> 80000640: 0ac78513 addi a0,a5,172 # 810000ac <div_arr+0xfffffeb8>
80000644: a95ff0ef jal ra,800000d8 <vx_print_str> 80000644: a95ff0ef jal ra,800000d8 <vx_print_str>
80000648: f05ff0ef jal ra,8000054c <test_wsapwn> 80000648: f05ff0ef jal ra,8000054c <test_wsapwn>
8000064c: 00000013 nop 8000064c: 00000013 nop
@@ -469,28 +469,14 @@ Disassembly of section .text:
8000066c: 01010413 addi s0,sp,16 8000066c: 01010413 addi s0,sp,16
80000670: 00100513 li a0,1 80000670: 00100513 li a0,1
80000674: 9f5ff0ef jal ra,80000068 <vx_tmc> 80000674: 9f5ff0ef jal ra,80000068 <vx_tmc>
80000678: 810007b7 lui a5,0x81000 80000678: c0dff0ef jal ra,80000284 <test_tmc>
8000067c: 0f478513 addi a0,a5,244 # 810000f4 <wsapwn_arr+0xfffffef4> 8000067c: ed1ff0ef jal ra,8000054c <test_wsapwn>
80000680: a59ff0ef jal ra,800000d8 <vx_print_str> 80000680: 00000793 li a5,0
80000684: c01ff0ef jal ra,80000284 <test_tmc> 80000684: 00078513 mv a0,a5
80000688: 810007b7 lui a5,0x81000 80000688: 00c12083 lw ra,12(sp)
8000068c: 10478513 addi a0,a5,260 # 81000104 <wsapwn_arr+0xffffff04> 8000068c: 00812403 lw s0,8(sp)
80000690: a49ff0ef jal ra,800000d8 <vx_print_str> 80000690: 01010113 addi sp,sp,16
80000694: 00400513 li a0,4 80000694: 00008067 ret
80000698: 9d1ff0ef jal ra,80000068 <vx_tmc>
8000069c: cc9ff0ef jal ra,80000364 <test_divergence>
800006a0: 00100513 li a0,1
800006a4: 9c5ff0ef jal ra,80000068 <vx_tmc>
800006a8: 810007b7 lui a5,0x81000
800006ac: 11878513 addi a0,a5,280 # 81000118 <wsapwn_arr+0xffffff18>
800006b0: a29ff0ef jal ra,800000d8 <vx_print_str>
800006b4: e99ff0ef jal ra,8000054c <test_wsapwn>
800006b8: 00000793 li a5,0
800006bc: 00078513 mv a0,a5
800006c0: 00c12083 lw ra,12(sp)
800006c4: 00812403 lw s0,8(sp)
800006c8: 01010113 addi sp,sp,16
800006cc: 00008067 ret
Disassembly of section .rodata: Disassembly of section .rodata:
@@ -556,195 +542,194 @@ Disassembly of section .rodata:
81000080: 0066 c.slli zero,0x19 81000080: 0066 c.slli zero,0x19
81000082: 0000 unimp 81000082: 0000 unimp
81000084: 6574 flw fa3,76(a0) 81000084: 6574 flw fa3,76(a0)
81000086: 745f7473 csrrci s0,0x745,30 81000086: 6e697473 csrrci s0,0x6e6,18
8100008a: 636d lui t1,0x1b 8100008a: 6d745f67 0x6d745f67
8100008c: 000a c.slli zero,0x2 8100008e: 00000a63 beqz zero,810000a2 <main+0xfffa42>
8100008e: 0000 unimp
81000090: 000a c.slli zero,0x2
81000092: 0000 unimp 81000092: 0000 unimp
81000094: 6574 flw fa3,76(a0) 81000094: 000a c.slli zero,0x2
81000096: 645f7473 csrrci s0,0x645,30 81000096: 0000 unimp
8100009a: 7669 lui a2,0xffffa 81000098: 6574 flw fa3,76(a0)
8100009c: 7265 lui tp,0xffff9 8100009a: 645f7473 csrrci s0,0x645,30
8100009e: 636e6567 0x636e6567 8100009e: 7669 lui a2,0xffffa
810000a2: 0a65 addi s4,s4,25 810000a0: 7265 lui tp,0xffff9
810000a4: 0000 unimp 810000a2: 636e6567 0x636e6567
810000a6: 0000 unimp 810000a6: 0a65 addi s4,s4,25
810000a8: 6574 flw fa3,76(a0) 810000a8: 0000 unimp
810000aa: 735f7473 csrrci s0,0x735,30 810000aa: 0000 unimp
810000ae: 6170 flw fa2,68(a0) 810000ac: 6574 flw fa3,76(a0)
810000b0: 000a6e77 0xa6e77 810000ae: 735f7473 csrrci s0,0x735,30
810000b4: 0030 addi a2,sp,8 810000b2: 6170 flw fa2,68(a0)
810000b6: 0000 unimp 810000b4: 000a6e77 0xa6e77
810000b8: 0031 c.nop 12 810000b8: 0030 addi a2,sp,8
810000ba: 0000 unimp 810000ba: 0000 unimp
810000bc: 0032 c.slli zero,0xc 810000bc: 0031 c.nop 12
810000be: 0000 unimp 810000be: 0000 unimp
810000c0: 00000033 add zero,zero,zero 810000c0: 0032 c.slli zero,0xc
810000c4: 0034 addi a3,sp,8 810000c2: 0000 unimp
810000c6: 0000 unimp 810000c4: 00000033 add zero,zero,zero
810000c8: 0035 c.nop 13 810000c8: 0034 addi a3,sp,8
810000ca: 0000 unimp 810000ca: 0000 unimp
810000cc: 0036 c.slli zero,0xd 810000cc: 0035 c.nop 13
810000ce: 0000 unimp 810000ce: 0000 unimp
810000d0: 00000037 lui zero,0x0 810000d0: 0036 c.slli zero,0xd
810000d4: 0038 addi a4,sp,8 810000d2: 0000 unimp
810000d6: 0000 unimp 810000d4: 00000037 lui zero,0x0
810000d8: 0039 c.nop 14 810000d8: 0038 addi a4,sp,8
810000da: 0000 unimp 810000da: 0000 unimp
810000dc: 0061 c.nop 24 810000dc: 0039 c.nop 14
810000de: 0000 unimp 810000de: 0000 unimp
810000e0: 0062 c.slli zero,0x18 810000e0: 0061 c.nop 24
810000e2: 0000 unimp 810000e2: 0000 unimp
810000e4: 00000063 beqz zero,810000e4 <main+0xfffa84> 810000e4: 0062 c.slli zero,0x18
810000e8: 0064 addi s1,sp,12 810000e6: 0000 unimp
810000ea: 0000 unimp 810000e8: 00000063 beqz zero,810000e8 <main+0xfffa88>
810000ec: 0065 c.nop 25 810000ec: 0064 addi s1,sp,12
810000ee: 0000 unimp 810000ee: 0000 unimp
810000f0: 0066 c.slli zero,0x19 810000f0: 0065 c.nop 25
810000f2: 0000 unimp 810000f2: 0000 unimp
810000f4: 706d6953 0x706d6953 810000f4: 0066 c.slli zero,0x19
810000f8: 656c flw fa1,76(a0)
810000fa: 4d20 lw s0,88(a0)
810000fc: 6961 lui s2,0x18
810000fe: 316e fld ft2,248(sp)
81000100: 000a c.slli zero,0x2
81000102: 0000 unimp
81000104: 6574 flw fa3,76(a0)
81000106: 645f7473 csrrci s0,0x645,30
8100010a: 7669 lui a2,0xffffa
8100010c: 7265 lui tp,0xffff9
8100010e: 636e6567 0x636e6567
81000112: 0a65 addi s4,s4,25
81000114: 0000 unimp
81000116: 0000 unimp
81000118: 6574 flw fa3,76(a0)
8100011a: 735f7473 csrrci s0,0x735,30
8100011e: 6170 flw fa2,68(a0)
81000120: 000a6e77 0xa6e77
Disassembly of section .data: Disassembly of section .data:
81000124 <hextoa>: 810000f8 <hextoa>:
81000124: 0000 unimp 810000f8: 0000 unimp
810000fa: 8100 0x8100
810000fc: 0004 0x4
810000fe: 8100 0x8100
81000100: 0008 0x8
81000102: 8100 0x8100
81000104: 000c 0xc
81000106: 8100 0x8100
81000108: 0010 0x10
8100010a: 8100 0x8100
8100010c: 0014 0x14
8100010e: 8100 0x8100
81000110: 0018 0x18
81000112: 8100 0x8100
81000114: 001c 0x1c
81000116: 8100 0x8100
81000118: 0020 addi s0,sp,8
8100011a: 8100 0x8100
8100011c: 0024 addi s1,sp,8
8100011e: 8100 0x8100
81000120: 0028 addi a0,sp,8
81000122: 8100 0x8100
81000124: 002c addi a1,sp,8
81000126: 8100 0x8100 81000126: 8100 0x8100
81000128: 0004 0x4 81000128: 0030 addi a2,sp,8
8100012a: 8100 0x8100 8100012a: 8100 0x8100
8100012c: 0008 0x8 8100012c: 0034 addi a3,sp,8
8100012e: 8100 0x8100 8100012e: 8100 0x8100
81000130: 000c 0xc 81000130: 0038 addi a4,sp,8
81000132: 8100 0x8100 81000132: 8100 0x8100
81000134: 0010 0x10 81000134: 003c addi a5,sp,8
81000136: 8100 0x8100 81000136: 8100 0x8100
81000138: 0014 0x14
81000138 <hextoa>:
81000138: 0044 addi s1,sp,4
8100013a: 8100 0x8100 8100013a: 8100 0x8100
8100013c: 0018 0x18 8100013c: 0048 addi a0,sp,4
8100013e: 8100 0x8100 8100013e: 8100 0x8100
81000140: 001c 0x1c 81000140: 004c addi a1,sp,4
81000142: 8100 0x8100 81000142: 8100 0x8100
81000144: 0020 addi s0,sp,8 81000144: 0050 addi a2,sp,4
81000146: 8100 0x8100 81000146: 8100 0x8100
81000148: 0024 addi s1,sp,8 81000148: 0054 addi a3,sp,4
8100014a: 8100 0x8100 8100014a: 8100 0x8100
8100014c: 0028 addi a0,sp,8 8100014c: 0058 addi a4,sp,4
8100014e: 8100 0x8100 8100014e: 8100 0x8100
81000150: 002c addi a1,sp,8 81000150: 005c addi a5,sp,4
81000152: 8100 0x8100 81000152: 8100 0x8100
81000154: 0030 addi a2,sp,8 81000154: 0060 addi s0,sp,12
81000156: 8100 0x8100 81000156: 8100 0x8100
81000158: 0034 addi a3,sp,8 81000158: 0064 addi s1,sp,12
8100015a: 8100 0x8100 8100015a: 8100 0x8100
8100015c: 0038 addi a4,sp,8 8100015c: 0068 addi a0,sp,12
8100015e: 8100 0x8100 8100015e: 8100 0x8100
81000160: 003c addi a5,sp,8 81000160: 006c addi a1,sp,12
81000162: 8100 0x8100 81000162: 8100 0x8100
81000164: 0070 addi a2,sp,12
81000164 <hextoa>:
81000164: 0044 addi s1,sp,4
81000166: 8100 0x8100 81000166: 8100 0x8100
81000168: 0048 addi a0,sp,4 81000168: 0074 addi a3,sp,12
8100016a: 8100 0x8100 8100016a: 8100 0x8100
8100016c: 004c addi a1,sp,4 8100016c: 0078 addi a4,sp,12
8100016e: 8100 0x8100 8100016e: 8100 0x8100
81000170: 0050 addi a2,sp,4 81000170: 007c addi a5,sp,12
81000172: 8100 0x8100 81000172: 8100 0x8100
81000174: 0054 addi a3,sp,4 81000174: 0080 addi s0,sp,64
81000176: 8100 0x8100 81000176: 8100 0x8100
81000178: 0058 addi a4,sp,4
8100017a: 8100 0x8100
8100017c: 005c addi a5,sp,4
8100017e: 8100 0x8100
81000180: 0060 addi s0,sp,12
81000182: 8100 0x8100
81000184: 0064 addi s1,sp,12
81000186: 8100 0x8100
81000188: 0068 addi a0,sp,12
8100018a: 8100 0x8100
8100018c: 006c addi a1,sp,12
8100018e: 8100 0x8100
81000190: 0070 addi a2,sp,12
81000192: 8100 0x8100
81000194: 0074 addi a3,sp,12
81000196: 8100 0x8100
81000198: 0078 addi a4,sp,12
8100019a: 8100 0x8100
8100019c: 007c addi a5,sp,12
8100019e: 8100 0x8100
810001a0: 0080 addi s0,sp,64
810001a2: 8100 0x8100
810001a4 <hextoa>: 81000178 <tmc_array>:
810001a4: 00b4 addi a3,sp,72 81000178: 0005 c.nop 1
8100017a: 0000 unimp
8100017c: 0005 c.nop 1
8100017e: 0000 unimp
81000180: 0005 c.nop 1
81000182: 0000 unimp
81000184: 0005 c.nop 1
...
81000188 <hextoa>:
81000188: 00b8 addi a4,sp,72
8100018a: 8100 0x8100
8100018c: 00bc addi a5,sp,72
8100018e: 8100 0x8100
81000190: 00c0 addi s0,sp,68
81000192: 8100 0x8100
81000194: 00c4 addi s1,sp,68
81000196: 8100 0x8100
81000198: 00c8 addi a0,sp,68
8100019a: 8100 0x8100
8100019c: 00cc addi a1,sp,68
8100019e: 8100 0x8100
810001a0: 00d0 addi a2,sp,68
810001a2: 8100 0x8100
810001a4: 00d4 addi a3,sp,68
810001a6: 8100 0x8100 810001a6: 8100 0x8100
810001a8: 00b8 addi a4,sp,72 810001a8: 00d8 addi a4,sp,68
810001aa: 8100 0x8100 810001aa: 8100 0x8100
810001ac: 00bc addi a5,sp,72 810001ac: 00dc addi a5,sp,68
810001ae: 8100 0x8100 810001ae: 8100 0x8100
810001b0: 00c0 addi s0,sp,68 810001b0: 00e0 addi s0,sp,76
810001b2: 8100 0x8100 810001b2: 8100 0x8100
810001b4: 00c4 addi s1,sp,68 810001b4: 00e4 addi s1,sp,76
810001b6: 8100 0x8100 810001b6: 8100 0x8100
810001b8: 00c8 addi a0,sp,68 810001b8: 00e8 addi a0,sp,76
810001ba: 8100 0x8100 810001ba: 8100 0x8100
810001bc: 00cc addi a1,sp,68 810001bc: 00ec addi a1,sp,76
810001be: 8100 0x8100 810001be: 8100 0x8100
810001c0: 00d0 addi a2,sp,68 810001c0: 00f0 addi a2,sp,76
810001c2: 8100 0x8100 810001c2: 8100 0x8100
810001c4: 00d4 addi a3,sp,68 810001c4: 00f4 addi a3,sp,76
810001c6: 8100 0x8100 810001c6: 8100 0x8100
810001c8: 00d8 addi a4,sp,68
810001ca: 8100 0x8100 810001c8 <array>:
810001cc: 00dc addi a5,sp,68 810001c8: 0000 unimp
810001ce: 8100 0x8100 810001ca: 0000 unimp
810001d0: 00e0 addi s0,sp,76 810001cc: 0001 nop
810001d2: 8100 0x8100 810001ce: 0000 unimp
810001d4: 00e4 addi s1,sp,76 810001d0: 0002 c.slli64 zero
810001d6: 8100 0x8100 810001d2: 0000 unimp
810001d8: 00e8 addi a0,sp,76 810001d4: 00000003 lb zero,0(zero) # 0 <_start-0x80000000>
810001da: 8100 0x8100
810001dc: 00ec addi a1,sp,76
810001de: 8100 0x8100
810001e0: 00f0 addi a2,sp,76
810001e2: 8100 0x8100
Disassembly of section .bss: Disassembly of section .bss:
810001e4 <global_argument_struct>: 810001d8 <global_argument_struct>:
810001e4: 0000 unimp 810001d8: 0000 unimp
... ...
810001e8 <global_function_pointer>: 810001dc <global_function_pointer>:
810001e8: 0000 unimp 810001dc: 0000 unimp
... ...
810001ec <global_num_threads>: 810001e0 <global_num_threads>:
810001ec: 0000 unimp 810001e0: 0000 unimp
... ...
810001f0 <arr>: 810001e4 <wsapwn_arr>:
... ...
81000200 <wsapwn_arr>: 810001f4 <div_arr>:
... ...
Disassembly of section .comment: Disassembly of section .comment:

BIN
runtime/mains/simple/vx_simple_main.elf
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Binary file not shown.

132
runtime/mains/simple/vx_simple_main.hex
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@@ -18,7 +18,7 @@
:100100001301C10067800000B702010023A0B20004 :100100001301C10067800000B702010023A0B20004
:1001100067800000130101FE232E1100232C8100B3 :1001100067800000130101FE232E1100232C8100B3
:10012000130401022326A4FEB70700810327C4FE9F :10012000130401022326A4FEB70700810327C4FE9F
:100130001317270093874712B307F70083A7070019 :10013000131727009387870FB307F70083A70700DC
:1001400013850700EFF05FF9130000008320C10161 :1001400013850700EFF05FF9130000008320C10161
:10015000032481011301010267800000130101FEE5 :10015000032481011301010267800000130101FEE5
:10016000232E1100232C8100130401022326A4FE58 :10016000232E1100232C8100130401022326A4FE58
@@ -26,32 +26,32 @@
:10018000EFF05FF9B707008113850704EFF0DFF4A4 :10018000EFF05FF9B707008113850704EFF0DFF4A4
:10019000130000008320C101032481011301010227 :10019000130000008320C101032481011301010227
:1001A00067800000130101FE232E1100232C810023 :1001A00067800000130101FE232E1100232C810023
:1001B00013040102B707008183A7C71E1385070038 :1001B00013040102B707008183A7071E13850700F8
:1001C000EFF09FEAB707008103A7871EB7070081FA :1001C000EFF09FEAB707008103A7C71DB7070081BB
:1001D00083A7471E13850700E7000700EFF0DFEA5B :1001D00083A7871D13850700E7000700EFF0DFEA1C
:1001E0002326A4FE8327C4FE6388070013050000AE :1001E0002326A4FE8327C4FE6388070013050000AE
:1001F000EFF09FE76F00C00013051000EFF0DFE69F :1001F000EFF09FE76F00C00013051000EFF0DFE69F
:10020000130000008320C1010324810113010102B6 :10020000130000008320C1010324810113010102B6
:1002100067800000130101FE232E1100232C8100B2 :1002100067800000130101FE232E1100232C8100B2
:10022000130401022326A4FE2324B4FE2322C4FEC9 :10022000130401022326A4FE2324B4FE2322C4FEC9
:100230002320D4FEB7070081032744FE23A4E71E32 :100230002320D4FEB7070081032744FE23AEE71C2A
:10024000B7070081032704FE23A2E71EB70700813A :10024000B7070081032704FE23ACE71CB707008132
:10025000032784FE23A6E71EB70700809387471A6B :10025000032784FE23A0E71EB70700809387471A71
:10026000938507000325C4FEEFF09FDFEFF09FF3B7 :10026000938507000325C4FEEFF09FDFEFF09FF3B7
:10027000130000008320C101032481011301010246 :10027000130000008320C101032481011301010246
:1002800067800000130101FE232E1100232C810042 :1002800067800000130101FE232E1100232C810042
:1002900013040102B707008113854708EFF0DFE37D :1002900013040102B707008113854708EFF0DFE37D
:1002A00013054000EFF05FDCEFF09FDE2326A4FE95 :1002A00013054000EFF05FDCEFF09FDE2326A4FE95
:1002B0000327C4FEB70700818326C4FE9396260059 :1002B0000327C4FEB70700818326C4FE9396260059
:1002C0009387071FB387F60023A0E70013051000EC :1002C00093878717B387F60023A0E7001305100074
:1002D000EFF09FD9B707008183A7071F1385070099 :1002D000EFF09FD9B707008183A787171385070021
:1002E000EFF05FE3B707008113850709EFF0DFDE6A :1002E000EFF05FE3B707008113854709EFF0DFDE2A
:1002F000B70700819387071F83A74700138507006F :1002F000B70700819387871783A7470013850700F7
:10030000EFF05FE1B707008113850709EFF0DFDC4D :10030000EFF05FE1B707008113854709EFF0DFDC0D
:10031000B70700819387071F83A78700138507000E :10031000B70700819387871783A787001385070096
:10032000EFF05FDFB707008113850709EFF0DFDA31 :10032000EFF05FDFB707008113854709EFF0DFDAF1
:10033000B70700819387071F83A7C70013850700AE :10033000B70700819387871783A7C7001385070036
:10034000EFF05FDDB707008113850709EFF0DFD815 :10034000EFF05FDDB707008113854709EFF0DFD8D5
:10035000130000008320C101032481011301010265 :10035000130000008320C101032481011301010265
:1003600067800000130101FE232E1100232C810061 :1003600067800000130101FE232E1100232C810061
:1003700013040102EFF0DFD12326A4FE8327C4FE7D :1003700013040102EFF0DFD12326A4FE8327C4FE7D
@@ -59,55 +59,52 @@
:10039000EFF09FCE8347B4FE638407068327C4FE35 :10039000EFF09FCE8347B4FE638407068327C4FE35
:1003A00093B717002305F4FE8347A4FE13850700C7 :1003A00093B717002305F4FE8347A4FE13850700C7
:1003B000EFF09FCC8347A4FE63820702B70700815A :1003B000EFF09FCC8347A4FE63820702B70700815A
:1003C0000327C4FE131727009387071FB307F700FF :1003C0000327C4FE131727009387471FB307F700BF
:1003D0001307A00023A0E7006F000002B707008109 :1003D0001307A00023A0E7006F000002B707008109
:1003E0000327C4FE131727009387071FB307F700DF :1003E0000327C4FE131727009387471FB307F7009F
:1003F0001307B00023A0E700EFF09FC86F0040068E :1003F0001307B00023A0E700EFF09FC86F0040068E
:100400008327C4FE93B73700A304F4FE834794FE0A :100400008327C4FE93B73700A304F4FE834794FE0A
:1004100013850700EFF05FC6834794FE63820702EF :1004100013850700EFF05FC6834794FE63820702EF
:10042000B70700810327C4FE131727009387071F10 :10042000B70700810327C4FE131727009387471FD0
:10043000B307F7001307C00023A0E7006F00000216 :10043000B307F7001307C00023A0E7006F00000216
:10044000B70700810327C4FE131727009387071FF0 :10044000B70700810327C4FE131727009387471FB0
:10045000B307F7001307D00023A0E700EFF05FC257 :10045000B307F7001307D00023A0E700EFF05FC257
:10046000EFF01FC2B707008183A7071F138507009E :10046000EFF01FC2B707008183A7471F138507005E
:10047000EFF05FCAB707008113850709EFF0DFC50A :10047000EFF05FCAB707008113854709EFF0DFC5CA
:10048000B70700819387071F83A7470013850700DD :10048000B70700819387471F83A74700138507009D
:10049000EFF05FC8B707008113850709EFF0DFC3EE :10049000EFF05FC8B707008113854709EFF0DFC3AE
:1004A000B70700819387071F83A78700138507007D :1004A000B70700819387471F83A78700138507003D
:1004B000EFF05FC6B707008113850709EFF0DFC1D2 :1004B000EFF05FC6B707008113854709EFF0DFC192
:1004C000B70700819387071F83A7C700138507001D :1004C000B70700819387471F83A7C70013850700DD
:1004D000EFF05FC4B707008113850709EFF0DFBFB6 :1004D000EFF05FC4B707008113854709EFF0DFBF76
:1004E000130000008320C1010324810113010102D4 :1004E000130000008320C1010324810113010102D4
:1004F00067800000130101FE232E1100232C8100D0 :1004F00067800000130101FE232E1100232C8100D0
:1005000013040102EFF05FB82326A4FEB7070081B1 :1005000013040102EFF05FB82326A4FEB7070081B1
:100510000327C4FE1317270093870720B307F700AC :100510000327C4FE131727009387471EB307F7006E
:100520000327C4FE23A0E7008327C4FE63860700D9 :100520000327C4FE23A0E7008327C4FE63860700D9
:1005300013050000EFF05FB3130000008320C1013A :1005300013050000EFF05FB3130000008320C1013A
:10054000032481011301010267800000130101FEF1 :10054000032481011301010267800000130101FEF1
:10055000232E1100232C810013040102B707008011 :10055000232E1100232C810013040102B707008011
:100560009387474F2326F4FE8325C4FE13054000DE :100560009387474F2326F4FE8325C4FE13054000DE
:10057000EFF01FAFEFF01FF8B707008183A7072048 :10057000EFF01FAFEFF01FF8B707008183A7471E0A
:1005800013850700EFF01FB9B7070081138507092E :1005800013850700EFF01FB9B707008113854709EE
:10059000EFF09FB4B70700819387072083A7470038 :10059000EFF09FB4B70700819387471E83A74700FA
:1005A00013850700EFF01FB7B70700811385070910 :1005A00013850700EFF01FB7B707008113854709D0
:1005B000EFF09FB2B70700819387072083A78700DA :1005B000EFF09FB2B70700819387471E83A787009C
:1005C00013850700EFF01FB5B707008113850709F2 :1005C00013850700EFF01FB5B707008113854709B2
:1005D000EFF09FB0B70700819387072083A7C7007C :1005D000EFF09FB0B70700819387471E83A7C7003E
:1005E00013850700EFF01FB3B707008113850709D4 :1005E00013850700EFF01FB3B70700811385470994
:1005F000EFF09FAE130000008320C10103248101AE :1005F000EFF09FAE130000008320C10103248101AE
:100600001301010267800000130101FF232611007E :100600001301010267800000130101FF232611007E
:100610002324810013040101EFF0DFC6B707008136 :100610002324810013040101EFF0DFC6B707008136
:1006200013854709EFF05FAB13054000EFF0DFA340 :1006200013858709EFF05FAB13054000EFF0DFA300
:10063000EFF05FD313051000EFF01FA3B7070081A1 :10063000EFF05FD313051000EFF01FA3B7070081A1
:100640001385870AEFF05FA9EFF05FF01300000059 :100640001385C70AEFF05FA9EFF05FF01300000019
:100650008320C10003248100130101016780000091 :100650008320C10003248100130101016780000091
:10066000130101FF2326110023248100130401013B :10066000130101FF2326110023248100130401013B
:1006700013051000EFF05F9FB70700811385470F48 :1006700013051000EFF05F9FEFF0DFC0EFF01FED0C
:10068000EFF09FA5EFF01FC0B7070081138547105B :1006800093070000138507008320C1000324810025
:10069000EFF09FA413054000EFF01F9DEFF09FCCFB :08069000130101016780000065
:1006A00013051000EFF05F9CB707008113858711D9
:1006B000EFF09FA2EFF09FE993070000138507007A
:1006C0008320C10003248100130101016780000021
:02000004810079 :02000004810079
:10000000300000003100000032000000330000002A :10000000300000003100000032000000330000002A
:10001000340000003500000036000000370000000A :10001000340000003500000036000000370000000A
@@ -117,28 +114,27 @@
:1000500033000000340000003500000036000000CE :1000500033000000340000003500000036000000CE
:100060003700000038000000390000006100000087 :100060003700000038000000390000006100000087
:1000700062000000630000006400000065000000F2 :1000700062000000630000006400000065000000F2
:1000800066000000746573745F746D630A0000009D :100080006600000074657374696E675F746D630A5F
:100090000A000000746573745F6469766572676551 :10009000000000000A000000746573745F646976F4
:1000A0006E63650A00000000746573745F737061AD :1000A000657267656E63650A0000000074657374AD
:1000B000776E0A00300000003100000032000000BE :1000B0005F737061776E0A0030000000310000004D
:1000C000330000003400000035000000360000005E :1000C0003200000033000000340000003500000062
:1000D0003700000038000000390000006100000017 :1000D0003600000037000000380000003900000042
:1000E0006200000063000000640000006500000082 :1000E0006100000062000000630000006400000086
:1000F0006600000053696D706C65204D61696E315A :0600F0006500000066003F
:100100000A000000746573745F64697665726765E0 :1000F8000000008104000081080000810C000081DC
:100110006E63650A00000000746573745F7370613C :100108001000008114000081180000811C0000818B
:04012000776E0A00EC :100118002000008124000081280000812C0000813B
:100124000000008104000081080000810C000081AF :100128003000008134000081380000813C000081EB
:100134001000008114000081180000811C0000815F :1001380044000081480000814C000081500000818B
:100144002000008124000081280000812C0000810F :1001480054000081580000815C000081600000813B
:100154003000008134000081380000813C000081BF :1001580064000081680000816C00008170000081EB
:1001640044000081480000814C000081500000815F :1001680074000081780000817C000081800000819B
:1001740054000081580000815C000081600000810F :100178000500000005000000050000000500000063
:1001840064000081680000816C00008170000081BF :10018800B8000081BC000081C0000081C40000816B
:1001940074000081780000817C000081800000816F :10019800C8000081CC000081D0000081D40000811B
:1001A400B4000081B8000081BC000081C00000815F :1001A800D8000081DC000081E0000081E4000081CB
:1001B400C4000081C8000081CC000081D00000810F :1001B800E8000081EC000081F0000081F40000817B
:1001C400D4000081D8000081DC000081E0000081BF :1001C8000000000001000000020000000300000021
:1001D400E4000081E8000081EC000081F00000816F
:040000058000000077 :040000058000000077
:00000001FF :00000001FF

32
runtime/tests/tests.c
View File

@@ -4,29 +4,33 @@
#include "../intrinsics/vx_intrinsics.h" #include "../intrinsics/vx_intrinsics.h"
#include "../io/vx_io.h" #include "../io/vx_io.h"
int tmc_array[4] = {5,5,5,5};
void test_tmc() void test_tmc()
{ {
vx_print_str("test_tmc\n"); vx_print_str("testing_tmc\n");
vx_tmc(4); vx_tmc(4);
unsigned tid = vx_threadID(); // Get TID unsigned tid = vx_threadID(); // Get TID
arr[tid] = tid; tmc_array[tid] = tid;
vx_tmc(1); vx_tmc(1);
vx_print_hex(arr[0]); vx_print_hex(tmc_array[0]);
vx_print_str("\n"); vx_print_str("\n");
vx_print_hex(arr[1]); vx_print_hex(tmc_array[1]);
vx_print_str("\n"); vx_print_str("\n");
vx_print_hex(arr[2]); vx_print_hex(tmc_array[2]);
vx_print_str("\n"); vx_print_str("\n");
vx_print_hex(arr[3]); vx_print_hex(tmc_array[3]);
vx_print_str("\n"); vx_print_str("\n");
return; return;
} }
int div_arr[4];
void test_divergence() void test_divergence()
{ {
unsigned tid = vx_threadID(); // Get TID unsigned tid = vx_threadID(); // Get TID
@@ -37,11 +41,11 @@ void test_divergence()
bool c = tid < 1; bool c = tid < 1;
__if (c) __if (c)
{ {
arr[tid] = 10; div_arr[tid] = 10;
} }
__else __else
{ {
arr[tid] = 11; div_arr[tid] = 11;
} }
__endif __endif
} }
@@ -50,23 +54,23 @@ void test_divergence()
bool c = tid < 3; bool c = tid < 3;
__if (c) __if (c)
{ {
arr[tid] = 12; div_arr[tid] = 12;
} }
__else __else
{ {
arr[tid] = 13; div_arr[tid] = 13;
} }
__endif __endif
} }
__endif __endif
vx_print_hex(arr[0]); vx_print_hex(div_arr[0]);
vx_print_str("\n"); vx_print_str("\n");
vx_print_hex(arr[1]); vx_print_hex(div_arr[1]);
vx_print_str("\n"); vx_print_str("\n");
vx_print_hex(arr[2]); vx_print_hex(div_arr[2]);
vx_print_str("\n"); vx_print_str("\n");
vx_print_hex(arr[3]); vx_print_hex(div_arr[3]);
vx_print_str("\n"); vx_print_str("\n");
} }

1
runtime/tests/tests.h
View File

@@ -3,7 +3,6 @@
#ifndef TESTS #ifndef TESTS
#define TESTS #define TESTS
int arr[4];
void test_tmc(); void test_tmc();
void test_divergence(); void test_divergence();