From 58c9761829ffedc12d40aad51c326888a8d2f2c2 Mon Sep 17 00:00:00 2001 From: Hansung Kim Date: Wed, 9 Oct 2024 21:53:04 -0700 Subject: [PATCH] Revert decode change for hopper Share the same insn as non-hopper TC. --- hw/rtl/core/VX_decode.sv | 34 ++++++++++------------------------ 1 file changed, 10 insertions(+), 24 deletions(-) diff --git a/hw/rtl/core/VX_decode.sv b/hw/rtl/core/VX_decode.sv index 62fdde76..cf21d72f 100644 --- a/hw/rtl/core/VX_decode.sv +++ b/hw/rtl/core/VX_decode.sv @@ -542,30 +542,16 @@ module VX_decode #( endcase end `ifdef EXT_T_ENABLE - `ifdef EXT_T_HOPPER - // TODO - `INST_EXT4: begin - ex_type = `EX_TENSOR; - op_type = `INST_TENSOR_HMMA; - // tensor core macroop is encoded as r-type - use_rd = 1; - `USED_IREG (rd); - `USED_IREG (rs1); - `USED_IREG (rs2); - `USED_IREG (rs3); - end - `else - `INST_EXT4: begin - ex_type = `EX_TENSOR; - op_type = `INST_TENSOR_HMMA; - // tensor core macroop is encoded as r-type - use_rd = 1; - `USED_IREG (rd); - `USED_IREG (rs1); - `USED_IREG (rs2); - `USED_IREG (rs3); - end - `endif + `INST_EXT4: begin + ex_type = `EX_TENSOR; + op_type = `INST_TENSOR_HMMA; + // tensor core macroop is encoded as r-type + use_rd = 1; + `USED_IREG (rd); + `USED_IREG (rs1); + `USED_IREG (rs2); + `USED_IREG (rs3); + end `endif default:; endcase