i kinda forgot most of changes
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@@ -53,6 +53,7 @@ module VX_commit import VX_gpu_pkg::*; #(
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wire [`ISSUE_WIDTH-1:0][`NUM_THREADS-1:0] commit_tmask;
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wire [`ISSUE_WIDTH-1:0] commit_eop;
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wire [`ISSUE_WIDTH-1:0][`EX_BITS-1:0] commit_sel;
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`UNUSED_VAR (commit_sel)
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for (genvar i = 0; i < `ISSUE_WIDTH; ++i) begin
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@@ -175,14 +176,17 @@ module VX_commit import VX_gpu_pkg::*; #(
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// relies on 1 cycle delay of arbiter and continuous issuing of tensor instructions,
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// so probably want to change this at some point
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// (i.e. pass a "don't count this towards pending instructions" signal down the pipeline)
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logic [`ISSUE_WIDTH-1:0][4:0] hmma_ctr, hmma_ctr_n;
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// logic [`ISSUE_WIDTH-1:0][4:0] hmma_ctr, hmma_ctr_n;
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wire [`ISSUE_WIDTH-1:0] final_hmma;
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`ifdef EXT_T_ENABLE
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for (genvar i = 0; i < `ISSUE_WIDTH; ++i) begin
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assign hmma_ctr_n[i] = (tensor_commit_if[i].valid && tensor_commit_if[i].ready) ? hmma_ctr[i] + 5'b1 : hmma_ctr[i];
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assign final_hmma[i] = (commit_sel[i] != `EX_BITS'(2) || hmma_ctr == '0);
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// assign hmma_ctr_n[i] = (tensor_commit_if[i].valid && tensor_commit_if[i].ready) ? hmma_ctr[i] + 5'b1 : hmma_ctr[i];
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// assign final_hmma[i] = (commit_sel[i] != `EX_BITS'(2) || hmma_ctr == '0);
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// i suppose this is now a feature and not a bug
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// if PC is 0, this means it is not final step of a wmma, shouldn't be committed
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assign final_hmma[i] = (commit_if[i].data.PC != 32'b0);
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end
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/*
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always @(posedge clk) begin
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if (reset) begin
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hmma_ctr <= '0;
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@@ -191,6 +195,7 @@ module VX_commit import VX_gpu_pkg::*; #(
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hmma_ctr <= hmma_ctr_n;
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end
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end
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*/
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`else
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assign final_hmma = '1;
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`endif
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