From 5c83c594c141e2e2cc651da5af2ba8a405b57d4b Mon Sep 17 00:00:00 2001 From: Blaise Tine Date: Thu, 7 Jan 2021 17:25:59 -0800 Subject: [PATCH] minor update --- driver/rtlsim/vortex.cpp | 24 ++++++++++++++++-------- hw/rtl/VX_cluster.v | 2 +- hw/rtl/Vortex.v | 2 +- hw/rtl/libs/VX_skid_buffer.v | 3 ++- 4 files changed, 20 insertions(+), 11 deletions(-) diff --git a/driver/rtlsim/vortex.cpp b/driver/rtlsim/vortex.cpp index c3a78157..7fc254db 100644 --- a/driver/rtlsim/vortex.cpp +++ b/driver/rtlsim/vortex.cpp @@ -84,10 +84,14 @@ public: if (dest_addr + asize > ram_.size()) return -1; - /*printf("VXDRV: upload %d bytes to 0x%x\n", size, dest_addr); - for (int i = 0; i < size; i += 4) { - printf("mem-write: 0x%x <- 0x%x\n", uint32_t(dest_addr + i), *(uint32_t*)((uint8_t*)src + src_offset + i)); - }*/ + /*printf("VXDRV: upload %d bytes from 0x%lx to 0x%lx", size, (uint8_t*)src + src_offset, dest_addr); + if (size <= 1024) { + printf(": "); + for (int i = asize-1; i >= 0; --i) { + printf("%x", *((uint8_t*)src + src_offset + i)); + } + } + printf("\n");*/ ram_.write(dest_addr, asize, (uint8_t*)src + src_offset); return 0; @@ -100,10 +104,14 @@ public: ram_.read(src_addr, asize, (uint8_t*)dest + dest_offset); - /*printf("VXDRV: download %d bytes from 0x%x\n", size, src_addr); - for (int i = 0; i < size; i += 4) { - printf("mem-read: 0x%x -> 0x%x\n", uint32_t(src_addr + i), *(uint32_t*)((uint8_t*)dest + dest_offset + i)); - }*/ + /*printf("VXDRV: download %d bytes from 0x%lx to 0x%lx", size, src_addr, (uint8_t*)dest + dest_offset); + if (size <= 1024) { + printf(": "); + for (int i = asize-1; i >= 0; --i) { + printf("%x", *((uint8_t*)dest + dest_offset + i)); + } + } + printf("\n");*/ return 0; } diff --git a/hw/rtl/VX_cluster.v b/hw/rtl/VX_cluster.v index 800e23ac..03260f2c 100644 --- a/hw/rtl/VX_cluster.v +++ b/hw/rtl/VX_cluster.v @@ -72,7 +72,7 @@ module VX_cluster #( wire core_reset; VX_reset_relay #( - .PASSTHRU (`NUM_CORES == 1) + .PASSTHRU (`NUM_CORES <= 2) ) reset_relay ( .clk (clk), .reset (reset), diff --git a/hw/rtl/Vortex.v b/hw/rtl/Vortex.v index b8fb6658..3402d997 100644 --- a/hw/rtl/Vortex.v +++ b/hw/rtl/Vortex.v @@ -73,7 +73,7 @@ module Vortex ( wire cluster_reset; VX_reset_relay #( - .PASSTHRU (`NUM_CLUSTERS == 1) + .PASSTHRU (`NUM_CLUSTERS <= 2) ) reset_relay ( .clk (clk), .reset (reset), diff --git a/hw/rtl/libs/VX_skid_buffer.v b/hw/rtl/libs/VX_skid_buffer.v index b35abad4..12c61e1c 100644 --- a/hw/rtl/libs/VX_skid_buffer.v +++ b/hw/rtl/libs/VX_skid_buffer.v @@ -72,11 +72,12 @@ module VX_skid_buffer #( valid_out_r <= valid_in || use_buffer; end end + end + always @(posedge clk) begin if (push) begin buffer <= data_in; end - if (!valid_out_r || ready_out) begin data_out_r <= use_buffer ? buffer : data_in; end