From 69f9ae778db7d0b1a1e25500386e397dac04f2ee Mon Sep 17 00:00:00 2001 From: Blaise Tine Date: Fri, 3 Nov 2023 08:12:03 -0400 Subject: [PATCH] cleanup --- hw/syn/altera/opae/Makefile | 4 ---- hw/syn/altera/quartus/.gitignore | 12 ------------ hw/syn/xilinx/xrt/Makefile | 4 ---- hw/syn/xilinx/xrt/scripts/package_kernel.tcl | 11 ----------- hw/syn/yosys/Makefile | 4 ---- sim/opaesim/Makefile | 4 ---- sim/rtlsim/Makefile | 3 --- 7 files changed, 42 deletions(-) diff --git a/hw/syn/altera/opae/Makefile b/hw/syn/altera/opae/Makefile index e5594d0b..0db2015d 100644 --- a/hw/syn/altera/opae/Makefile +++ b/hw/syn/altera/opae/Makefile @@ -29,9 +29,6 @@ DBG_TRACE_FLAGS += -DDBG_TRACE_CACHE_MSHR DBG_TRACE_FLAGS += -DDBG_TRACE_CACHE_TAG DBG_TRACE_FLAGS += -DDBG_TRACE_CACHE_DATA DBG_TRACE_FLAGS += -DDBG_TRACE_AFU -DBG_TRACE_FLAGS += -DDBG_TRACE_TEX -DBG_TRACE_FLAGS += -DDBG_TRACE_RASTER -DBG_TRACE_FLAGS += -DDBG_TRACE_ROP DBG_TRACE_FLAGS += -DDBG_TRACE_GBAR # Control logic analyzer monitors @@ -39,7 +36,6 @@ DBG_SCOPE_FLAGS += -DDBG_SCOPE_AFU DBG_SCOPE_FLAGS += -DDBG_SCOPE_ISSUE DBG_SCOPE_FLAGS += -DDBG_SCOPE_FETCH DBG_SCOPE_FLAGS += -DDBG_SCOPE_LSU -DBG_SCOPE_FLAGS += -DDBG_SCOPE_RASTER DBG_SCOPE_FLAGS += -DDBG_SCOPE_MSCHED ifeq ($(DEVICE_FAMILY), stratix10) diff --git a/hw/syn/altera/quartus/.gitignore b/hw/syn/altera/quartus/.gitignore index 35930be0..05ee65cf 100644 --- a/hw/syn/altera/quartus/.gitignore +++ b/hw/syn/altera/quartus/.gitignore @@ -27,15 +27,3 @@ /fpu/* !/fpu/Makefile - -/tex/* -!/tex/Makefile - -/rop/* -!/rop/Makefile - -/raster/* -!/raster/Makefile - -/vortex-gfx/* -!/vortex-gfx/Makefile \ No newline at end of file diff --git a/hw/syn/xilinx/xrt/Makefile b/hw/syn/xilinx/xrt/Makefile index bfb0123d..c8714779 100644 --- a/hw/syn/xilinx/xrt/Makefile +++ b/hw/syn/xilinx/xrt/Makefile @@ -53,9 +53,6 @@ DBG_TRACE_FLAGS += -DDBG_TRACE_CACHE_MSHR DBG_TRACE_FLAGS += -DDBG_TRACE_CACHE_TAG DBG_TRACE_FLAGS += -DDBG_TRACE_CACHE_DATA DBG_TRACE_FLAGS += -DDBG_TRACE_AFU -DBG_TRACE_FLAGS += -DDBG_TRACE_TEX -DBG_TRACE_FLAGS += -DDBG_TRACE_RASTER -DBG_TRACE_FLAGS += -DDBG_TRACE_ROP DBG_TRACE_FLAGS += -DDBG_TRACE_GBAR # Control logic analyzer monitors @@ -63,7 +60,6 @@ DBG_SCOPE_FLAGS += -DDBG_SCOPE_AFU DBG_SCOPE_FLAGS += -DDBG_SCOPE_ISSUE DBG_SCOPE_FLAGS += -DDBG_SCOPE_FETCH DBG_SCOPE_FLAGS += -DDBG_SCOPE_LSU -DBG_SCOPE_FLAGS += -DDBG_SCOPE_RASTER DBG_SCOPE_FLAGS += -DDBG_SCOPE_MSCHED # cluster configuration diff --git a/hw/syn/xilinx/xrt/scripts/package_kernel.tcl b/hw/syn/xilinx/xrt/scripts/package_kernel.tcl index 73476de0..607e7955 100644 --- a/hw/syn/xilinx/xrt/scripts/package_kernel.tcl +++ b/hw/syn/xilinx/xrt/scripts/package_kernel.tcl @@ -125,17 +125,6 @@ if { $chipscope == 1 } { ] [get_ips ila_msched] generate_target {instantiation_template} [get_files ila_msched.xci] set_property generate_synth_checkpoint false [get_files ila_msched.xci] - - create_ip -name axis_ila -vendor xilinx.com -library ip -version 1.1 -module_name ila_raster - set_property -dict [list CONFIG.C_ADV_TRIGGER {true} \ - CONFIG.C_EN_STRG_QUAL {1} \ - CONFIG.C_DATA_DEPTH {4096} \ - CONFIG.C_NUM_OF_PROBES {2} \ - CONFIG.C_PROBE0_WIDTH {128} \ - CONFIG.C_PROBE1_WIDTH {128} \ - ] [get_ips ila_raster] - generate_target {instantiation_template} [get_files ila_raster.xci] - set_property generate_synth_checkpoint false [get_files ila_raster.xci] } update_compile_order -fileset sources_1 diff --git a/hw/syn/yosys/Makefile b/hw/syn/yosys/Makefile index 34f6059f..8ebeeebd 100644 --- a/hw/syn/yosys/Makefile +++ b/hw/syn/yosys/Makefile @@ -25,9 +25,6 @@ DBG_TRACE_FLAGS += -DDBG_TRACE_CACHE_MSHR DBG_TRACE_FLAGS += -DDBG_TRACE_CACHE_TAG DBG_TRACE_FLAGS += -DDBG_TRACE_CACHE_DATA DBG_TRACE_FLAGS += -DDBG_TRACE_AFU -DBG_TRACE_FLAGS += -DDBG_TRACE_TEX -DBG_TRACE_FLAGS += -DDBG_TRACE_RASTER -DBG_TRACE_FLAGS += -DDBG_TRACE_ROP DBG_TRACE_FLAGS += -DDBG_TRACE_GBAR # Control logic analyzer monitors @@ -35,7 +32,6 @@ DBG_SCOPE_FLAGS += -DDBG_SCOPE_AFU DBG_SCOPE_FLAGS += -DDBG_SCOPE_ISSUE DBG_SCOPE_FLAGS += -DDBG_SCOPE_FETCH DBG_SCOPE_FLAGS += -DDBG_SCOPE_LSU -DBG_SCOPE_FLAGS += -DDBG_SCOPE_RASTER DBG_SCOPE_FLAGS += -DDBG_SCOPE_MSCHED # cluster configuration diff --git a/sim/opaesim/Makefile b/sim/opaesim/Makefile index fe0c05e2..439b41b3 100644 --- a/sim/opaesim/Makefile +++ b/sim/opaesim/Makefile @@ -27,9 +27,6 @@ DBG_TRACE_FLAGS += -DDBG_TRACE_CACHE_TAG DBG_TRACE_FLAGS += -DDBG_TRACE_CACHE_DATA DBG_TRACE_FLAGS += -DDBG_TRACE_AFU DBG_TRACE_FLAGS += -DDBG_TRACE_SCOPE -DBG_TRACE_FLAGS += -DDBG_TRACE_TEX -DBG_TRACE_FLAGS += -DDBG_TRACE_RASTER -DBG_TRACE_FLAGS += -DDBG_TRACE_ROP DBG_TRACE_FLAGS += -DDBG_TRACE_GBAR # Control logic analyzer monitors @@ -37,7 +34,6 @@ DBG_SCOPE_FLAGS += -DDBG_SCOPE_AFU DBG_SCOPE_FLAGS += -DDBG_SCOPE_ISSUE DBG_SCOPE_FLAGS += -DDBG_SCOPE_FETCH DBG_SCOPE_FLAGS += -DDBG_SCOPE_LSU -DBG_SCOPE_FLAGS += -DDBG_SCOPE_RASTER DBG_SCOPE_FLAGS += -DDBG_SCOPE_MSCHED # AFU parameters diff --git a/sim/rtlsim/Makefile b/sim/rtlsim/Makefile index adb9d7c5..1dd8a731 100644 --- a/sim/rtlsim/Makefile +++ b/sim/rtlsim/Makefile @@ -25,9 +25,6 @@ DBG_TRACE_FLAGS += -DDBG_TRACE_CACHE_TAG DBG_TRACE_FLAGS += -DDBG_TRACE_CACHE_DATA DBG_TRACE_FLAGS += -DDBG_TRACE_AFU DBG_TRACE_FLAGS += -DDBG_TRACE_SCOPE -DBG_TRACE_FLAGS += -DDBG_TRACE_TEX -DBG_TRACE_FLAGS += -DDBG_TRACE_RASTER -DBG_TRACE_FLAGS += -DDBG_TRACE_ROP DBG_TRACE_FLAGS += -DDBG_TRACE_GBAR DBG_FLAGS += -DDEBUG_LEVEL=$(DEBUG) -DVCD_OUTPUT $(DBG_TRACE_FLAGS)