fixed OPAE crash, added custom bram module to controll rw collision, dogfood testcase argurment, optimzed buffered fifo, quartus build optimization flags
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@@ -60,9 +60,9 @@ qsub-sim
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make ase
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# tests
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./run_ase.sh build_ase_1c ../../driver/tests/basic/basic -t1 -n1
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./run_ase.sh build_ase_1c ../../driver/tests/basic/basic -n16
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./run_ase.sh build_ase_1c ../../driver/tests/demo/demo -n 16
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./run_ase.sh build_ase_1c ../../driver/tests/dogfood/dogfood -n1 -s4 -e4
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./run_ase.sh build_ase_1c ../../driver/tests/dogfood/dogfood -n16
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./run_ase.sh build_ase_1c ../../benchmarks/opencl/vecadd/vecadd
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# modify "vsim_run.tcl" to dump VCD trace
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@@ -97,7 +97,7 @@ kill -9 <pid>
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# fixing device resource busy issue when deleting /build_ase_1c/
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lsof +D build_ase_1c
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# quick off cache synthesis
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# quick off synthesis
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make -C pipeline clean && make -C pipeline > pipeline/build.log 2>&1 &
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make -C cache clean && make -C cache > cache/build.log 2>&1 &
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make -C core clean && make -C core > core/build.log 2>&1 &
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@@ -3,7 +3,7 @@
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+define+SYNTHESIS
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+define+QUARTUS
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+define+FPU_FAST
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+define+SCOPE
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#+define+SCOPE
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#+define+DBG_PRINT_CORE_ICACHE
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#+define+DBG_PRINT_CORE_DCACHE
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@@ -6,4 +6,21 @@ set_global_assignment -name VERILOG_MACRO QUARTUS
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set_global_assignment -name VERILOG_MACRO SYNTHESIS
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set_global_assignment -name VERILOG_MACRO NDEBUG
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set_global_assignment -name MESSAGE_DISABLE 16818
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set_global_assignment -name VERILOG_MACRO FPU_FAST
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set_global_assignment -name VERILOG_MACRO FPU_FAST
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set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
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set_global_assignment -name MAX_CORE_JUNCTION_TEMP 100
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set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
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set_global_assignment -name ROUTER_CLOCKING_TOPOLOGY_ANALYSIS ON
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set_global_assignment -name ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION ON
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set_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL ON
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set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS ON
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set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS ON
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set_global_assignment -name POWER_USE_TA_VALUE 65
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set_global_assignment -name SEED 1
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set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING ON
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set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
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set_global_assignment -name OPTIMIZE_HOLD_TIMING "ALL PATHS"
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set_global_assignment -name OPTIMIZATION_TECHNIQUE SPEED
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set_global_assignment -name ROUTER_TIMING_OPTIMIZATION_LEVEL MAXIMUM
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set_global_assignment -name OPTIMIZATION_MODE "AGGRESSIVE PERFORMANCE"
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@@ -175,8 +175,9 @@ logic [31:0] cmd_csr_wdata;
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// MMIO controller ////////////////////////////////////////////////////////////
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`IGNORE_WARNINGS_BEGIN
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t_ccip_c0_ReqMmioHdr mmio_hdr = t_ccip_c0_ReqMmioHdr'(cp2af_sRxPort.c0.hdr);
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t_ccip_c0_ReqMmioHdr mmio_hdr;
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`IGNORE_WARNINGS_END
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assign mmio_hdr = t_ccip_c0_ReqMmioHdr'(cp2af_sRxPort.c0.hdr);
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`STATIC_ASSERT(($bits(t_ccip_c0_ReqMmioHdr)-$bits(mmio_hdr.address)) == 12, ("Oops!"))
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@@ -204,9 +205,20 @@ wire [2:0] cmd_type = (cp2af_sRxPort.c0.mmioWrValid && (MMIO_CMD_TYPE == mmio_hd
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reg scope_start;
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`endif
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// disable assertions until reset
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`ifndef VERILATOR
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initial begin
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$assertoff;
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end
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`endif
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always_ff @(posedge clk)
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begin
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if (reset) begin
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`ifndef VERILATOR
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$asserton; // enable assertions
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`endif
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mmio_tx.hdr <= 0;
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mmio_tx.data <= 0;
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mmio_tx.mmioRdValid <= 0;
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@@ -324,7 +336,8 @@ begin
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end
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`endif
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default: begin
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`ifdef DBG_PRINT_OPAE
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mmio_tx.data <= 64'h0;
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`ifdef DBG_PRINT_OPAE
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$display("%t: Unknown MMIO Rd: addr=%0h", $time, mmio_hdr.address);
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`endif
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end
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