diff --git a/kernel/vortex_test.dump b/kernel/vortex_test.dump
index 17c18cca..0e7349cd 100644
--- a/kernel/vortex_test.dump
+++ b/kernel/vortex_test.dump
@@ -5,1707 +5,1703 @@ vortex_test.elf:     file format elf32-littleriscv
 Disassembly of section .text:
 
 80000000 <_start>:
-80000000:	00800513          	li	a0,8
-80000004:	02051073          	csrw	0x20,a0
-80000008:	00400513          	li	a0,4
-8000000c:	02151073          	csrw	0x21,a0
-80000010:	f1401073          	csrw	mhartid,zero
-80000014:	30101073          	csrw	misa,zero
-80000018:	7ffff137          	lui	sp,0x7ffff
-8000001c:	0b9010ef          	jal	ra,800018d4 <main>
-80000020:	00000073          	ecall
+80000000:	00400513          	li	a0,4
+80000004:	0005006b          	0x5006b
+80000008:	020025f3          	csrr	a1,0x20
+8000000c:	02102673          	csrr	a2,0x21
+80000010:	00000073          	ecall
 
-80000024 <vx_createThreads>:
-80000024:	00068b93          	mv	s7,a3
-80000028:	00070d13          	mv	s10,a4
-8000002c:	00010f13          	mv	t5,sp
-80000030:	00050393          	mv	t2,a0
+80000014 <vx_createThreads>:
+80000014:	00068b93          	mv	s7,a3
+80000018:	00070d13          	mv	s10,a4
+8000001c:	00010f13          	mv	t5,sp
+80000020:	00050393          	mv	t2,a0
 
-80000034 <loop_init>:
-80000034:	00100513          	li	a0,1
+80000024 <loop_init>:
+80000024:	00100513          	li	a0,1
 
-80000038 <loop_cond>:
-80000038:	00755c63          	bge	a0,t2,80000050 <loop_done>
+80000028 <loop_cond>:
+80000028:	00755c63          	bge	a0,t2,80000040 <loop_done>
 
-8000003c <loop_body>:
-8000003c:	80010113          	addi	sp,sp,-2048 # 7fffe800 <SIZE+0x7fffe7ce>
-80000040:	00050313          	mv	t1,a0
-80000044:	0003506b          	0x3506b
+8000002c <loop_body>:
+8000002c:	80010113          	addi	sp,sp,-2048
+80000030:	00050313          	mv	t1,a0
+80000034:	0003506b          	0x3506b
 
-80000048 <loop_inc>:
-80000048:	00150513          	addi	a0,a0,1
-8000004c:	fedff06f          	j	80000038 <loop_cond>
+80000038 <loop_inc>:
+80000038:	00150513          	addi	a0,a0,1
+8000003c:	fedff06f          	j	80000028 <loop_cond>
 
-80000050 <loop_done>:
+80000040 <loop_done>:
+80000040:	00000013          	nop
+80000044:	00000013          	nop
+80000048:	00000013          	nop
+8000004c:	00000013          	nop
 80000050:	00000013          	nop
 80000054:	00000013          	nop
-80000058:	00000013          	nop
-8000005c:	00000013          	nop
-80000060:	00000013          	nop
-80000064:	00000013          	nop
-80000068:	000f0113          	mv	sp,t5
-8000006c:	00000513          	li	a0,0
-80000070:	00060f93          	mv	t6,a2
-80000074:	00038d93          	mv	s11,t2
+80000058:	000f0113          	mv	sp,t5
+8000005c:	00000513          	li	a0,0
+80000060:	00060f93          	mv	t6,a2
+80000064:	00038d93          	mv	s11,t2
+80000068:	00000013          	nop
+8000006c:	00000013          	nop
+80000070:	00000013          	nop
+80000074:	00000013          	nop
 80000078:	00000013          	nop
 8000007c:	00000013          	nop
 80000080:	00000013          	nop
 80000084:	00000013          	nop
-80000088:	00000013          	nop
+80000088:	01bfe0eb          	0x1bfe0eb
 8000008c:	00000013          	nop
 80000090:	00000013          	nop
 80000094:	00000013          	nop
-80000098:	01bfe0eb          	0x1bfe0eb
+80000098:	00000013          	nop
 8000009c:	00000013          	nop
 800000a0:	00000013          	nop
-800000a4:	00000013          	nop
-800000a8:	00000013          	nop
-800000ac:	00000013          	nop
-800000b0:	00000013          	nop
-800000b4:	00000517          	auipc	a0,0x0
-800000b8:	1b450513          	addi	a0,a0,436 # 80000268 <vx_reschedule_warps>
-800000bc:	0005406b          	0x5406b
+800000a4:	00000517          	auipc	a0,0x0
+800000a8:	1b450513          	addi	a0,a0,436 # 80000258 <vx_reschedule_warps>
+800000ac:	0005406b          	0x5406b
 
-800000c0 <vx_wspawn>:
-800000c0:	00000317          	auipc	t1,0x0
-800000c4:	f6430313          	addi	t1,t1,-156 # 80000024 <vx_createThreads>
-800000c8:	0003006b          	0x3006b
-800000cc:	00008067          	ret
+800000b0 <vx_wspawn>:
+800000b0:	00000317          	auipc	t1,0x0
+800000b4:	f6430313          	addi	t1,t1,-156 # 80000014 <vx_createThreads>
+800000b8:	0003006b          	0x3006b
+800000bc:	00008067          	ret
 
-800000d0 <vx_save_context>:
-800000d0:	01000217          	auipc	tp,0x1000
-800000d4:	24020213          	addi	tp,tp,576 # 81000310 <context>
-800000d8:	00022023          	sw	zero,0(tp) # 0 <A_WARPS-0x7>
-800000dc:	00122223          	sw	ra,4(tp) # 4 <A_WARPS-0x3>
-800000e0:	00222423          	sw	sp,8(tp) # 8 <A_WARPS+0x1>
-800000e4:	00322623          	sw	gp,12(tp) # c <A_WARPS+0x5>
-800000e8:	00422823          	sw	tp,16(tp) # 10 <A_WARPS+0x9>
-800000ec:	00522a23          	sw	t0,20(tp) # 14 <A_WARPS+0xd>
-800000f0:	00622c23          	sw	t1,24(tp) # 18 <A_WARPS+0x11>
-800000f4:	00722e23          	sw	t2,28(tp) # 1c <A_WARPS+0x15>
-800000f8:	02822023          	sw	s0,32(tp) # 20 <A_WARPS+0x19>
-800000fc:	02922223          	sw	s1,36(tp) # 24 <A_WARPS+0x1d>
-80000100:	02a22423          	sw	a0,40(tp) # 28 <A_WARPS+0x21>
-80000104:	02b22623          	sw	a1,44(tp) # 2c <A_WARPS+0x25>
-80000108:	02c22823          	sw	a2,48(tp) # 30 <A_WARPS+0x29>
-8000010c:	02d22a23          	sw	a3,52(tp) # 34 <SIZE+0x2>
-80000110:	02e22c23          	sw	a4,56(tp) # 38 <SIZE+0x6>
-80000114:	02f22e23          	sw	a5,60(tp) # 3c <SIZE+0xa>
-80000118:	05022023          	sw	a6,64(tp) # 40 <SIZE+0xe>
-8000011c:	05122223          	sw	a7,68(tp) # 44 <SIZE+0x12>
-80000120:	05222423          	sw	s2,72(tp) # 48 <SIZE+0x16>
-80000124:	05322623          	sw	s3,76(tp) # 4c <SIZE+0x1a>
-80000128:	05422823          	sw	s4,80(tp) # 50 <SIZE+0x1e>
-8000012c:	05522a23          	sw	s5,84(tp) # 54 <SIZE+0x22>
-80000130:	05622c23          	sw	s6,88(tp) # 58 <SIZE+0x26>
-80000134:	05722e23          	sw	s7,92(tp) # 5c <SIZE+0x2a>
-80000138:	07822023          	sw	s8,96(tp) # 60 <SIZE+0x2e>
-8000013c:	07922223          	sw	s9,100(tp) # 64 <SIZE+0x32>
-80000140:	07a22423          	sw	s10,104(tp) # 68 <SIZE+0x36>
-80000144:	07b22623          	sw	s11,108(tp) # 6c <SIZE+0x3a>
-80000148:	07c22823          	sw	t3,112(tp) # 70 <SIZE+0x3e>
-8000014c:	07d22a23          	sw	t4,116(tp) # 74 <SIZE+0x42>
-80000150:	07e22c23          	sw	t5,120(tp) # 78 <SIZE+0x46>
-80000154:	07f22e23          	sw	t6,124(tp) # 7c <SIZE+0x4a>
-80000158:	00100213          	li	tp,1
-8000015c:	00008067          	ret
+800000c0 <vx_save_context>:
+800000c0:	01000217          	auipc	tp,0x1000
+800000c4:	25020213          	addi	tp,tp,592 # 81000310 <context>
+800000c8:	00022023          	sw	zero,0(tp) # 0 <A_WARPS-0x7>
+800000cc:	00122223          	sw	ra,4(tp) # 4 <A_WARPS-0x3>
+800000d0:	00222423          	sw	sp,8(tp) # 8 <A_WARPS+0x1>
+800000d4:	00322623          	sw	gp,12(tp) # c <A_WARPS+0x5>
+800000d8:	00422823          	sw	tp,16(tp) # 10 <A_WARPS+0x9>
+800000dc:	00522a23          	sw	t0,20(tp) # 14 <A_WARPS+0xd>
+800000e0:	00622c23          	sw	t1,24(tp) # 18 <A_WARPS+0x11>
+800000e4:	00722e23          	sw	t2,28(tp) # 1c <A_WARPS+0x15>
+800000e8:	02822023          	sw	s0,32(tp) # 20 <A_WARPS+0x19>
+800000ec:	02922223          	sw	s1,36(tp) # 24 <A_WARPS+0x1d>
+800000f0:	02a22423          	sw	a0,40(tp) # 28 <A_WARPS+0x21>
+800000f4:	02b22623          	sw	a1,44(tp) # 2c <A_WARPS+0x25>
+800000f8:	02c22823          	sw	a2,48(tp) # 30 <A_WARPS+0x29>
+800000fc:	02d22a23          	sw	a3,52(tp) # 34 <SIZE+0x2>
+80000100:	02e22c23          	sw	a4,56(tp) # 38 <SIZE+0x6>
+80000104:	02f22e23          	sw	a5,60(tp) # 3c <SIZE+0xa>
+80000108:	05022023          	sw	a6,64(tp) # 40 <SIZE+0xe>
+8000010c:	05122223          	sw	a7,68(tp) # 44 <SIZE+0x12>
+80000110:	05222423          	sw	s2,72(tp) # 48 <SIZE+0x16>
+80000114:	05322623          	sw	s3,76(tp) # 4c <SIZE+0x1a>
+80000118:	05422823          	sw	s4,80(tp) # 50 <SIZE+0x1e>
+8000011c:	05522a23          	sw	s5,84(tp) # 54 <SIZE+0x22>
+80000120:	05622c23          	sw	s6,88(tp) # 58 <SIZE+0x26>
+80000124:	05722e23          	sw	s7,92(tp) # 5c <SIZE+0x2a>
+80000128:	07822023          	sw	s8,96(tp) # 60 <SIZE+0x2e>
+8000012c:	07922223          	sw	s9,100(tp) # 64 <SIZE+0x32>
+80000130:	07a22423          	sw	s10,104(tp) # 68 <SIZE+0x36>
+80000134:	07b22623          	sw	s11,108(tp) # 6c <SIZE+0x3a>
+80000138:	07c22823          	sw	t3,112(tp) # 70 <SIZE+0x3e>
+8000013c:	07d22a23          	sw	t4,116(tp) # 74 <SIZE+0x42>
+80000140:	07e22c23          	sw	t5,120(tp) # 78 <SIZE+0x46>
+80000144:	07f22e23          	sw	t6,124(tp) # 7c <SIZE+0x4a>
+80000148:	00100213          	li	tp,1
+8000014c:	00008067          	ret
 
-80000160 <vx_load_context>:
-80000160:	01000217          	auipc	tp,0x1000
-80000164:	1b020213          	addi	tp,tp,432 # 81000310 <context>
-80000168:	00022003          	lw	zero,0(tp) # 0 <A_WARPS-0x7>
-8000016c:	00422083          	lw	ra,4(tp) # 4 <A_WARPS-0x3>
-80000170:	00822103          	lw	sp,8(tp) # 8 <A_WARPS+0x1>
-80000174:	00c22183          	lw	gp,12(tp) # c <A_WARPS+0x5>
-80000178:	01022203          	lw	tp,16(tp) # 10 <A_WARPS+0x9>
-8000017c:	01422283          	lw	t0,20(tp) # 14 <A_WARPS+0xd>
-80000180:	01822303          	lw	t1,24(tp) # 18 <A_WARPS+0x11>
-80000184:	01c22383          	lw	t2,28(tp) # 1c <A_WARPS+0x15>
-80000188:	02022403          	lw	s0,32(tp) # 20 <A_WARPS+0x19>
-8000018c:	02422483          	lw	s1,36(tp) # 24 <A_WARPS+0x1d>
-80000190:	02822503          	lw	a0,40(tp) # 28 <A_WARPS+0x21>
-80000194:	02c22583          	lw	a1,44(tp) # 2c <A_WARPS+0x25>
-80000198:	03022603          	lw	a2,48(tp) # 30 <A_WARPS+0x29>
-8000019c:	03422683          	lw	a3,52(tp) # 34 <SIZE+0x2>
-800001a0:	03822703          	lw	a4,56(tp) # 38 <SIZE+0x6>
-800001a4:	03c22783          	lw	a5,60(tp) # 3c <SIZE+0xa>
-800001a8:	04022803          	lw	a6,64(tp) # 40 <SIZE+0xe>
-800001ac:	04422883          	lw	a7,68(tp) # 44 <SIZE+0x12>
-800001b0:	04822903          	lw	s2,72(tp) # 48 <SIZE+0x16>
-800001b4:	04c22983          	lw	s3,76(tp) # 4c <SIZE+0x1a>
-800001b8:	05022a03          	lw	s4,80(tp) # 50 <SIZE+0x1e>
-800001bc:	05422a83          	lw	s5,84(tp) # 54 <SIZE+0x22>
-800001c0:	05822b03          	lw	s6,88(tp) # 58 <SIZE+0x26>
-800001c4:	05c22b83          	lw	s7,92(tp) # 5c <SIZE+0x2a>
-800001c8:	06022c03          	lw	s8,96(tp) # 60 <SIZE+0x2e>
-800001cc:	06422c83          	lw	s9,100(tp) # 64 <SIZE+0x32>
-800001d0:	06822d03          	lw	s10,104(tp) # 68 <SIZE+0x36>
-800001d4:	06c22d83          	lw	s11,108(tp) # 6c <SIZE+0x3a>
-800001d8:	07022e03          	lw	t3,112(tp) # 70 <SIZE+0x3e>
-800001dc:	07422e83          	lw	t4,116(tp) # 74 <SIZE+0x42>
-800001e0:	07822f03          	lw	t5,120(tp) # 78 <SIZE+0x46>
-800001e4:	07c22f83          	lw	t6,124(tp) # 7c <SIZE+0x4a>
-800001e8:	00000213          	li	tp,0
+80000150 <vx_load_context>:
+80000150:	01000217          	auipc	tp,0x1000
+80000154:	1c020213          	addi	tp,tp,448 # 81000310 <context>
+80000158:	00022003          	lw	zero,0(tp) # 0 <A_WARPS-0x7>
+8000015c:	00422083          	lw	ra,4(tp) # 4 <A_WARPS-0x3>
+80000160:	00822103          	lw	sp,8(tp) # 8 <A_WARPS+0x1>
+80000164:	00c22183          	lw	gp,12(tp) # c <A_WARPS+0x5>
+80000168:	01022203          	lw	tp,16(tp) # 10 <A_WARPS+0x9>
+8000016c:	01422283          	lw	t0,20(tp) # 14 <A_WARPS+0xd>
+80000170:	01822303          	lw	t1,24(tp) # 18 <A_WARPS+0x11>
+80000174:	01c22383          	lw	t2,28(tp) # 1c <A_WARPS+0x15>
+80000178:	02022403          	lw	s0,32(tp) # 20 <A_WARPS+0x19>
+8000017c:	02422483          	lw	s1,36(tp) # 24 <A_WARPS+0x1d>
+80000180:	02822503          	lw	a0,40(tp) # 28 <A_WARPS+0x21>
+80000184:	02c22583          	lw	a1,44(tp) # 2c <A_WARPS+0x25>
+80000188:	03022603          	lw	a2,48(tp) # 30 <A_WARPS+0x29>
+8000018c:	03422683          	lw	a3,52(tp) # 34 <SIZE+0x2>
+80000190:	03822703          	lw	a4,56(tp) # 38 <SIZE+0x6>
+80000194:	03c22783          	lw	a5,60(tp) # 3c <SIZE+0xa>
+80000198:	04022803          	lw	a6,64(tp) # 40 <SIZE+0xe>
+8000019c:	04422883          	lw	a7,68(tp) # 44 <SIZE+0x12>
+800001a0:	04822903          	lw	s2,72(tp) # 48 <SIZE+0x16>
+800001a4:	04c22983          	lw	s3,76(tp) # 4c <SIZE+0x1a>
+800001a8:	05022a03          	lw	s4,80(tp) # 50 <SIZE+0x1e>
+800001ac:	05422a83          	lw	s5,84(tp) # 54 <SIZE+0x22>
+800001b0:	05822b03          	lw	s6,88(tp) # 58 <SIZE+0x26>
+800001b4:	05c22b83          	lw	s7,92(tp) # 5c <SIZE+0x2a>
+800001b8:	06022c03          	lw	s8,96(tp) # 60 <SIZE+0x2e>
+800001bc:	06422c83          	lw	s9,100(tp) # 64 <SIZE+0x32>
+800001c0:	06822d03          	lw	s10,104(tp) # 68 <SIZE+0x36>
+800001c4:	06c22d83          	lw	s11,108(tp) # 6c <SIZE+0x3a>
+800001c8:	07022e03          	lw	t3,112(tp) # 70 <SIZE+0x3e>
+800001cc:	07422e83          	lw	t4,116(tp) # 74 <SIZE+0x42>
+800001d0:	07822f03          	lw	t5,120(tp) # 78 <SIZE+0x46>
+800001d4:	07c22f83          	lw	t6,124(tp) # 7c <SIZE+0x4a>
+800001d8:	00000213          	li	tp,0
+800001dc:	00008067          	ret
+
+800001e0 <vx_available_warps>:
+800001e0:	02002573          	csrr	a0,0x20
+800001e4:	00008067          	ret
+
+800001e8 <vx_available_threads>:
+800001e8:	02102573          	csrr	a0,0x21
 800001ec:	00008067          	ret
 
-800001f0 <vx_available_warps>:
-800001f0:	02002573          	csrr	a0,0x20
-800001f4:	00008067          	ret
+800001f0 <vx_before_main>:
+800001f0:	fe010113          	addi	sp,sp,-32
+800001f4:	00112e23          	sw	ra,28(sp)
+800001f8:	00812c23          	sw	s0,24(sp)
+800001fc:	02010413          	addi	s0,sp,32
+80000200:	fe042623          	sw	zero,-20(s0)
+80000204:	0340006f          	j	80000238 <vx_before_main+0x48>
+80000208:	fec42703          	lw	a4,-20(s0)
+8000020c:	000017b7          	lui	a5,0x1
+80000210:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
+80000214:	02f70733          	mul	a4,a4,a5
+80000218:	810007b7          	lui	a5,0x81000
+8000021c:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
+80000220:	00f707b3          	add	a5,a4,a5
+80000224:	00078513          	mv	a0,a5
+80000228:	440000ef          	jal	ra,80000668 <queue_initialize>
+8000022c:	fec42783          	lw	a5,-20(s0)
+80000230:	00178793          	addi	a5,a5,1
+80000234:	fef42623          	sw	a5,-20(s0)
+80000238:	fec42703          	lw	a4,-20(s0)
+8000023c:	01f00793          	li	a5,31
+80000240:	fce7d4e3          	bge	a5,a4,80000208 <vx_before_main+0x18>
+80000244:	00000013          	nop
+80000248:	01c12083          	lw	ra,28(sp)
+8000024c:	01812403          	lw	s0,24(sp)
+80000250:	02010113          	addi	sp,sp,32
+80000254:	00008067          	ret
 
-800001f8 <vx_available_threads>:
-800001f8:	02102573          	csrr	a0,0x21
-800001fc:	00008067          	ret
+80000258 <vx_reschedule_warps>:
+80000258:	fd010113          	addi	sp,sp,-48
+8000025c:	02112623          	sw	ra,44(sp)
+80000260:	02812423          	sw	s0,40(sp)
+80000264:	03a12223          	sw	s10,36(sp)
+80000268:	03010413          	addi	s0,sp,48
+8000026c:	00000013          	nop
+80000270:	000d0713          	mv	a4,s10
+80000274:	000017b7          	lui	a5,0x1
+80000278:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
+8000027c:	02f70733          	mul	a4,a4,a5
+80000280:	810007b7          	lui	a5,0x81000
+80000284:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
+80000288:	00f707b3          	add	a5,a4,a5
+8000028c:	00078513          	mv	a0,a5
+80000290:	504000ef          	jal	ra,80000794 <queue_isEmpty>
+80000294:	00050793          	mv	a5,a0
+80000298:	02078a63          	beqz	a5,800002cc <vx_reschedule_warps+0x74>
+8000029c:	000d0713          	mv	a4,s10
+800002a0:	810007b7          	lui	a5,0x81000
+800002a4:	00271713          	slli	a4,a4,0x2
+800002a8:	26878793          	addi	a5,a5,616 # 81000268 <barrier_bool+0xfffd6fa4>
+800002ac:	00f707b3          	add	a5,a4,a5
+800002b0:	00100713          	li	a4,1
+800002b4:	00e7a023          	sw	a4,0(a5)
+800002b8:	000d0793          	mv	a5,s10
+800002bc:	00079663          	bnez	a5,800002c8 <vx_reschedule_warps+0x70>
+800002c0:	e91ff0ef          	jal	ra,80000150 <vx_load_context>
+800002c4:	05c0006f          	j	80000320 <vx_reschedule_warps+0xc8>
+800002c8:	00000073          	ecall
+800002cc:	000d0713          	mv	a4,s10
+800002d0:	000017b7          	lui	a5,0x1
+800002d4:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
+800002d8:	02f70733          	mul	a4,a4,a5
+800002dc:	810007b7          	lui	a5,0x81000
+800002e0:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
+800002e4:	00f707b3          	add	a5,a4,a5
+800002e8:	fd840713          	addi	a4,s0,-40
+800002ec:	00070593          	mv	a1,a4
+800002f0:	00078513          	mv	a0,a5
+800002f4:	400000ef          	jal	ra,800006f4 <queue_dequeue>
+800002f8:	fe042783          	lw	a5,-32(s0)
+800002fc:	00078113          	mv	sp,a5
+80000300:	fdc42783          	lw	a5,-36(s0)
+80000304:	fd842583          	lw	a1,-40(s0)
+80000308:	fe442603          	lw	a2,-28(s0)
+8000030c:	fe842683          	lw	a3,-24(s0)
+80000310:	fec42703          	lw	a4,-20(s0)
+80000314:	00078513          	mv	a0,a5
+80000318:	cfdff0ef          	jal	ra,80000014 <vx_createThreads>
+8000031c:	00000073          	ecall
+80000320:	02c12083          	lw	ra,44(sp)
+80000324:	02812403          	lw	s0,40(sp)
+80000328:	02412d03          	lw	s10,36(sp)
+8000032c:	03010113          	addi	sp,sp,48
+80000330:	00008067          	ret
 
-80000200 <vx_before_main>:
-80000200:	fe010113          	addi	sp,sp,-32
-80000204:	00112e23          	sw	ra,28(sp)
-80000208:	00812c23          	sw	s0,24(sp)
-8000020c:	02010413          	addi	s0,sp,32
-80000210:	fe042623          	sw	zero,-20(s0)
-80000214:	0340006f          	j	80000248 <vx_before_main+0x48>
-80000218:	fec42703          	lw	a4,-20(s0)
-8000021c:	000017b7          	lui	a5,0x1
-80000220:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
-80000224:	02f70733          	mul	a4,a4,a5
-80000228:	810007b7          	lui	a5,0x81000
-8000022c:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
-80000230:	00f707b3          	add	a5,a4,a5
-80000234:	00078513          	mv	a0,a5
-80000238:	440000ef          	jal	ra,80000678 <queue_initialize>
-8000023c:	fec42783          	lw	a5,-20(s0)
-80000240:	00178793          	addi	a5,a5,1
-80000244:	fef42623          	sw	a5,-20(s0)
-80000248:	fec42703          	lw	a4,-20(s0)
-8000024c:	01f00793          	li	a5,31
-80000250:	fce7d4e3          	bge	a5,a4,80000218 <vx_before_main+0x18>
-80000254:	00000013          	nop
-80000258:	01c12083          	lw	ra,28(sp)
-8000025c:	01812403          	lw	s0,24(sp)
-80000260:	02010113          	addi	sp,sp,32
-80000264:	00008067          	ret
+80000334 <vx_schedule_warps>:
+80000334:	fb010113          	addi	sp,sp,-80
+80000338:	04112623          	sw	ra,76(sp)
+8000033c:	04812423          	sw	s0,72(sp)
+80000340:	05010413          	addi	s0,sp,80
+80000344:	e9dff0ef          	jal	ra,800001e0 <vx_available_warps>
+80000348:	fea42423          	sw	a0,-24(s0)
+8000034c:	00010993          	mv	s3,sp
+80000350:	00100793          	li	a5,1
+80000354:	fef42623          	sw	a5,-20(s0)
+80000358:	08c0006f          	j	800003e4 <vx_schedule_warps+0xb0>
+8000035c:	fec42703          	lw	a4,-20(s0)
+80000360:	000017b7          	lui	a5,0x1
+80000364:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
+80000368:	02f70733          	mul	a4,a4,a5
+8000036c:	810007b7          	lui	a5,0x81000
+80000370:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
+80000374:	00f707b3          	add	a5,a4,a5
+80000378:	00078513          	mv	a0,a5
+8000037c:	418000ef          	jal	ra,80000794 <queue_isEmpty>
+80000380:	00050793          	mv	a5,a0
+80000384:	04079a63          	bnez	a5,800003d8 <vx_schedule_warps+0xa4>
+80000388:	fec42703          	lw	a4,-20(s0)
+8000038c:	000017b7          	lui	a5,0x1
+80000390:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
+80000394:	02f70733          	mul	a4,a4,a5
+80000398:	810007b7          	lui	a5,0x81000
+8000039c:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
+800003a0:	00f707b3          	add	a5,a4,a5
+800003a4:	fd040713          	addi	a4,s0,-48
+800003a8:	00070593          	mv	a1,a4
+800003ac:	00078513          	mv	a0,a5
+800003b0:	344000ef          	jal	ra,800006f4 <queue_dequeue>
+800003b4:	fd842783          	lw	a5,-40(s0)
+800003b8:	00078113          	mv	sp,a5
+800003bc:	fd442783          	lw	a5,-44(s0)
+800003c0:	fd042583          	lw	a1,-48(s0)
+800003c4:	fdc42603          	lw	a2,-36(s0)
+800003c8:	fe042683          	lw	a3,-32(s0)
+800003cc:	fe442703          	lw	a4,-28(s0)
+800003d0:	00078513          	mv	a0,a5
+800003d4:	cddff0ef          	jal	ra,800000b0 <vx_wspawn>
+800003d8:	fec42783          	lw	a5,-20(s0)
+800003dc:	00178793          	addi	a5,a5,1
+800003e0:	fef42623          	sw	a5,-20(s0)
+800003e4:	fec42783          	lw	a5,-20(s0)
+800003e8:	fe842703          	lw	a4,-24(s0)
+800003ec:	f6e7e8e3          	bltu	a5,a4,8000035c <vx_schedule_warps+0x28>
+800003f0:	00098113          	mv	sp,s3
+800003f4:	ccdff0ef          	jal	ra,800000c0 <vx_save_context>
+800003f8:	00020793          	mv	a5,tp
+800003fc:	04078863          	beqz	a5,8000044c <vx_schedule_warps+0x118>
+80000400:	810007b7          	lui	a5,0x81000
+80000404:	41078513          	addi	a0,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
+80000408:	38c000ef          	jal	ra,80000794 <queue_isEmpty>
+8000040c:	00050793          	mv	a5,a0
+80000410:	02079e63          	bnez	a5,8000044c <vx_schedule_warps+0x118>
+80000414:	fb840793          	addi	a5,s0,-72
+80000418:	00078593          	mv	a1,a5
+8000041c:	810007b7          	lui	a5,0x81000
+80000420:	41078513          	addi	a0,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
+80000424:	2d0000ef          	jal	ra,800006f4 <queue_dequeue>
+80000428:	fc042783          	lw	a5,-64(s0)
+8000042c:	00078113          	mv	sp,a5
+80000430:	fbc42783          	lw	a5,-68(s0)
+80000434:	fb842583          	lw	a1,-72(s0)
+80000438:	fc442603          	lw	a2,-60(s0)
+8000043c:	fc842683          	lw	a3,-56(s0)
+80000440:	fcc42703          	lw	a4,-52(s0)
+80000444:	00078513          	mv	a0,a5
+80000448:	bcdff0ef          	jal	ra,80000014 <vx_createThreads>
+8000044c:	00000013          	nop
+80000450:	04c12083          	lw	ra,76(sp)
+80000454:	04812403          	lw	s0,72(sp)
+80000458:	05010113          	addi	sp,sp,80
+8000045c:	00008067          	ret
 
-80000268 <vx_reschedule_warps>:
-80000268:	fd010113          	addi	sp,sp,-48
-8000026c:	02112623          	sw	ra,44(sp)
-80000270:	02812423          	sw	s0,40(sp)
-80000274:	03a12223          	sw	s10,36(sp)
-80000278:	03010413          	addi	s0,sp,48
-8000027c:	00000013          	nop
-80000280:	000d0713          	mv	a4,s10
-80000284:	000017b7          	lui	a5,0x1
-80000288:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
-8000028c:	02f70733          	mul	a4,a4,a5
-80000290:	810007b7          	lui	a5,0x81000
-80000294:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
-80000298:	00f707b3          	add	a5,a4,a5
-8000029c:	00078513          	mv	a0,a5
-800002a0:	504000ef          	jal	ra,800007a4 <queue_isEmpty>
-800002a4:	00050793          	mv	a5,a0
-800002a8:	02078a63          	beqz	a5,800002dc <vx_reschedule_warps+0x74>
-800002ac:	000d0713          	mv	a4,s10
-800002b0:	810007b7          	lui	a5,0x81000
-800002b4:	00271713          	slli	a4,a4,0x2
-800002b8:	26878793          	addi	a5,a5,616 # 81000268 <barrier_bool+0xfffd6fa4>
-800002bc:	00f707b3          	add	a5,a4,a5
-800002c0:	00100713          	li	a4,1
-800002c4:	00e7a023          	sw	a4,0(a5)
-800002c8:	000d0793          	mv	a5,s10
-800002cc:	00079663          	bnez	a5,800002d8 <vx_reschedule_warps+0x70>
-800002d0:	e91ff0ef          	jal	ra,80000160 <vx_load_context>
-800002d4:	05c0006f          	j	80000330 <vx_reschedule_warps+0xc8>
-800002d8:	00000073          	ecall
-800002dc:	000d0713          	mv	a4,s10
-800002e0:	000017b7          	lui	a5,0x1
-800002e4:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
-800002e8:	02f70733          	mul	a4,a4,a5
-800002ec:	810007b7          	lui	a5,0x81000
-800002f0:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
-800002f4:	00f707b3          	add	a5,a4,a5
-800002f8:	fd840713          	addi	a4,s0,-40
-800002fc:	00070593          	mv	a1,a4
-80000300:	00078513          	mv	a0,a5
-80000304:	400000ef          	jal	ra,80000704 <queue_dequeue>
-80000308:	fe042783          	lw	a5,-32(s0)
-8000030c:	00078113          	mv	sp,a5
-80000310:	fdc42783          	lw	a5,-36(s0)
-80000314:	fd842583          	lw	a1,-40(s0)
-80000318:	fe442603          	lw	a2,-28(s0)
-8000031c:	fe842683          	lw	a3,-24(s0)
-80000320:	fec42703          	lw	a4,-20(s0)
-80000324:	00078513          	mv	a0,a5
-80000328:	cfdff0ef          	jal	ra,80000024 <vx_createThreads>
-8000032c:	00000073          	ecall
-80000330:	02c12083          	lw	ra,44(sp)
-80000334:	02812403          	lw	s0,40(sp)
-80000338:	02412d03          	lw	s10,36(sp)
-8000033c:	03010113          	addi	sp,sp,48
-80000340:	00008067          	ret
+80000460 <vx_spawnWarps>:
+80000460:	fb010113          	addi	sp,sp,-80
+80000464:	04112623          	sw	ra,76(sp)
+80000468:	04812423          	sw	s0,72(sp)
+8000046c:	05010413          	addi	s0,sp,80
+80000470:	faa42e23          	sw	a0,-68(s0)
+80000474:	fab42c23          	sw	a1,-72(s0)
+80000478:	fac42a23          	sw	a2,-76(s0)
+8000047c:	fad42823          	sw	a3,-80(s0)
+80000480:	d71ff0ef          	jal	ra,800001f0 <vx_before_main>
+80000484:	d5dff0ef          	jal	ra,800001e0 <vx_available_warps>
+80000488:	fea42223          	sw	a0,-28(s0)
+8000048c:	00010913          	mv	s2,sp
+80000490:	fe042623          	sw	zero,-20(s0)
+80000494:	fe042423          	sw	zero,-24(s0)
+80000498:	0900006f          	j	80000528 <vx_spawnWarps+0xc8>
+8000049c:	ffff09b7          	lui	s3,0xffff0
+800004a0:	01310133          	add	sp,sp,s3
+800004a4:	fe842783          	lw	a5,-24(s0)
+800004a8:	fcf42623          	sw	a5,-52(s0)
+800004ac:	fb842783          	lw	a5,-72(s0)
+800004b0:	fcf42823          	sw	a5,-48(s0)
+800004b4:	00010793          	mv	a5,sp
+800004b8:	fcf42a23          	sw	a5,-44(s0)
+800004bc:	fb442783          	lw	a5,-76(s0)
+800004c0:	fcf42c23          	sw	a5,-40(s0)
+800004c4:	fb042783          	lw	a5,-80(s0)
+800004c8:	fcf42e23          	sw	a5,-36(s0)
+800004cc:	fec42783          	lw	a5,-20(s0)
+800004d0:	fef42023          	sw	a5,-32(s0)
+800004d4:	fec42703          	lw	a4,-20(s0)
+800004d8:	000017b7          	lui	a5,0x1
+800004dc:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
+800004e0:	02f70733          	mul	a4,a4,a5
+800004e4:	810007b7          	lui	a5,0x81000
+800004e8:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
+800004ec:	00f707b3          	add	a5,a4,a5
+800004f0:	fcc40713          	addi	a4,s0,-52
+800004f4:	00070593          	mv	a1,a4
+800004f8:	00078513          	mv	a0,a5
+800004fc:	190000ef          	jal	ra,8000068c <queue_enqueue>
+80000500:	fec42783          	lw	a5,-20(s0)
+80000504:	00178793          	addi	a5,a5,1
+80000508:	fef42623          	sw	a5,-20(s0)
+8000050c:	fec42783          	lw	a5,-20(s0)
+80000510:	fe442703          	lw	a4,-28(s0)
+80000514:	00e7e463          	bltu	a5,a4,8000051c <vx_spawnWarps+0xbc>
+80000518:	fe042623          	sw	zero,-20(s0)
+8000051c:	fe842783          	lw	a5,-24(s0)
+80000520:	00178793          	addi	a5,a5,1
+80000524:	fef42423          	sw	a5,-24(s0)
+80000528:	fe842703          	lw	a4,-24(s0)
+8000052c:	fbc42783          	lw	a5,-68(s0)
+80000530:	f6f766e3          	bltu	a4,a5,8000049c <vx_spawnWarps+0x3c>
+80000534:	00090113          	mv	sp,s2
+80000538:	dfdff0ef          	jal	ra,80000334 <vx_schedule_warps>
+8000053c:	00000013          	nop
+80000540:	04c12083          	lw	ra,76(sp)
+80000544:	04812403          	lw	s0,72(sp)
+80000548:	05010113          	addi	sp,sp,80
+8000054c:	00008067          	ret
 
-80000344 <vx_schedule_warps>:
-80000344:	fb010113          	addi	sp,sp,-80
-80000348:	04112623          	sw	ra,76(sp)
-8000034c:	04812423          	sw	s0,72(sp)
-80000350:	05010413          	addi	s0,sp,80
-80000354:	e9dff0ef          	jal	ra,800001f0 <vx_available_warps>
-80000358:	fea42423          	sw	a0,-24(s0)
-8000035c:	00010993          	mv	s3,sp
-80000360:	00100793          	li	a5,1
-80000364:	fef42623          	sw	a5,-20(s0)
-80000368:	08c0006f          	j	800003f4 <vx_schedule_warps+0xb0>
-8000036c:	fec42703          	lw	a4,-20(s0)
-80000370:	000017b7          	lui	a5,0x1
-80000374:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
-80000378:	02f70733          	mul	a4,a4,a5
-8000037c:	810007b7          	lui	a5,0x81000
-80000380:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
-80000384:	00f707b3          	add	a5,a4,a5
-80000388:	00078513          	mv	a0,a5
-8000038c:	418000ef          	jal	ra,800007a4 <queue_isEmpty>
-80000390:	00050793          	mv	a5,a0
-80000394:	04079a63          	bnez	a5,800003e8 <vx_schedule_warps+0xa4>
-80000398:	fec42703          	lw	a4,-20(s0)
-8000039c:	000017b7          	lui	a5,0x1
-800003a0:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
-800003a4:	02f70733          	mul	a4,a4,a5
-800003a8:	810007b7          	lui	a5,0x81000
-800003ac:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
-800003b0:	00f707b3          	add	a5,a4,a5
-800003b4:	fd040713          	addi	a4,s0,-48
-800003b8:	00070593          	mv	a1,a4
-800003bc:	00078513          	mv	a0,a5
-800003c0:	344000ef          	jal	ra,80000704 <queue_dequeue>
-800003c4:	fd842783          	lw	a5,-40(s0)
-800003c8:	00078113          	mv	sp,a5
-800003cc:	fd442783          	lw	a5,-44(s0)
-800003d0:	fd042583          	lw	a1,-48(s0)
-800003d4:	fdc42603          	lw	a2,-36(s0)
-800003d8:	fe042683          	lw	a3,-32(s0)
-800003dc:	fe442703          	lw	a4,-28(s0)
-800003e0:	00078513          	mv	a0,a5
-800003e4:	cddff0ef          	jal	ra,800000c0 <vx_wspawn>
-800003e8:	fec42783          	lw	a5,-20(s0)
-800003ec:	00178793          	addi	a5,a5,1
-800003f0:	fef42623          	sw	a5,-20(s0)
-800003f4:	fec42783          	lw	a5,-20(s0)
-800003f8:	fe842703          	lw	a4,-24(s0)
-800003fc:	f6e7e8e3          	bltu	a5,a4,8000036c <vx_schedule_warps+0x28>
-80000400:	00098113          	mv	sp,s3
-80000404:	ccdff0ef          	jal	ra,800000d0 <vx_save_context>
-80000408:	00020793          	mv	a5,tp
-8000040c:	04078863          	beqz	a5,8000045c <vx_schedule_warps+0x118>
-80000410:	810007b7          	lui	a5,0x81000
-80000414:	41078513          	addi	a0,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
-80000418:	38c000ef          	jal	ra,800007a4 <queue_isEmpty>
-8000041c:	00050793          	mv	a5,a0
-80000420:	02079e63          	bnez	a5,8000045c <vx_schedule_warps+0x118>
-80000424:	fb840793          	addi	a5,s0,-72
-80000428:	00078593          	mv	a1,a5
-8000042c:	810007b7          	lui	a5,0x81000
-80000430:	41078513          	addi	a0,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
-80000434:	2d0000ef          	jal	ra,80000704 <queue_dequeue>
-80000438:	fc042783          	lw	a5,-64(s0)
-8000043c:	00078113          	mv	sp,a5
-80000440:	fbc42783          	lw	a5,-68(s0)
-80000444:	fb842583          	lw	a1,-72(s0)
-80000448:	fc442603          	lw	a2,-60(s0)
-8000044c:	fc842683          	lw	a3,-56(s0)
-80000450:	fcc42703          	lw	a4,-52(s0)
-80000454:	00078513          	mv	a0,a5
-80000458:	bcdff0ef          	jal	ra,80000024 <vx_createThreads>
-8000045c:	00000013          	nop
-80000460:	04c12083          	lw	ra,76(sp)
-80000464:	04812403          	lw	s0,72(sp)
-80000468:	05010113          	addi	sp,sp,80
-8000046c:	00008067          	ret
+80000550 <vx_wait_for_warps>:
+80000550:	fd010113          	addi	sp,sp,-48
+80000554:	02112623          	sw	ra,44(sp)
+80000558:	02812423          	sw	s0,40(sp)
+8000055c:	03010413          	addi	s0,sp,48
+80000560:	fca42e23          	sw	a0,-36(s0)
+80000564:	fdc42583          	lw	a1,-36(s0)
+80000568:	810007b7          	lui	a5,0x81000
+8000056c:	04078513          	addi	a0,a5,64 # 81000040 <barrier_bool+0xfffd6d7c>
+80000570:	354000ef          	jal	ra,800008c4 <vx_printf>
+80000574:	c6dff0ef          	jal	ra,800001e0 <vx_available_warps>
+80000578:	fea42023          	sw	a0,-32(s0)
+8000057c:	fe042623          	sw	zero,-20(s0)
+80000580:	0680006f          	j	800005e8 <vx_wait_for_warps+0x98>
+80000584:	00100793          	li	a5,1
+80000588:	fef42623          	sw	a5,-20(s0)
+8000058c:	fe042423          	sw	zero,-24(s0)
+80000590:	03c0006f          	j	800005cc <vx_wait_for_warps+0x7c>
+80000594:	810007b7          	lui	a5,0x81000
+80000598:	fe842703          	lw	a4,-24(s0)
+8000059c:	00271713          	slli	a4,a4,0x2
+800005a0:	26878793          	addi	a5,a5,616 # 81000268 <barrier_bool+0xfffd6fa4>
+800005a4:	00f707b3          	add	a5,a4,a5
+800005a8:	0007a703          	lw	a4,0(a5)
+800005ac:	00100793          	li	a5,1
+800005b0:	00f71863          	bne	a4,a5,800005c0 <vx_wait_for_warps+0x70>
+800005b4:	fec42783          	lw	a5,-20(s0)
+800005b8:	00178793          	addi	a5,a5,1
+800005bc:	fef42623          	sw	a5,-20(s0)
+800005c0:	fe842783          	lw	a5,-24(s0)
+800005c4:	00178793          	addi	a5,a5,1
+800005c8:	fef42423          	sw	a5,-24(s0)
+800005cc:	fe842703          	lw	a4,-24(s0)
+800005d0:	01f00793          	li	a5,31
+800005d4:	fce7d0e3          	bge	a5,a4,80000594 <vx_wait_for_warps+0x44>
+800005d8:	fec42583          	lw	a1,-20(s0)
+800005dc:	810007b7          	lui	a5,0x81000
+800005e0:	04c78513          	addi	a0,a5,76 # 8100004c <barrier_bool+0xfffd6d88>
+800005e4:	2e0000ef          	jal	ra,800008c4 <vx_printf>
+800005e8:	fec42703          	lw	a4,-20(s0)
+800005ec:	fdc42783          	lw	a5,-36(s0)
+800005f0:	f8f76ae3          	bltu	a4,a5,80000584 <vx_wait_for_warps+0x34>
+800005f4:	fe042223          	sw	zero,-28(s0)
+800005f8:	0280006f          	j	80000620 <vx_wait_for_warps+0xd0>
+800005fc:	810007b7          	lui	a5,0x81000
+80000600:	fe442703          	lw	a4,-28(s0)
+80000604:	00271713          	slli	a4,a4,0x2
+80000608:	26878793          	addi	a5,a5,616 # 81000268 <barrier_bool+0xfffd6fa4>
+8000060c:	00f707b3          	add	a5,a4,a5
+80000610:	0007a023          	sw	zero,0(a5)
+80000614:	fe442783          	lw	a5,-28(s0)
+80000618:	00178793          	addi	a5,a5,1
+8000061c:	fef42223          	sw	a5,-28(s0)
+80000620:	fe442783          	lw	a5,-28(s0)
+80000624:	fe042703          	lw	a4,-32(s0)
+80000628:	fce7eae3          	bltu	a5,a4,800005fc <vx_wait_for_warps+0xac>
+8000062c:	00000013          	nop
+80000630:	02c12083          	lw	ra,44(sp)
+80000634:	02812403          	lw	s0,40(sp)
+80000638:	03010113          	addi	sp,sp,48
+8000063c:	00008067          	ret
 
-80000470 <vx_spawnWarps>:
-80000470:	fb010113          	addi	sp,sp,-80
-80000474:	04112623          	sw	ra,76(sp)
-80000478:	04812423          	sw	s0,72(sp)
-8000047c:	05010413          	addi	s0,sp,80
-80000480:	faa42e23          	sw	a0,-68(s0)
-80000484:	fab42c23          	sw	a1,-72(s0)
-80000488:	fac42a23          	sw	a2,-76(s0)
-8000048c:	fad42823          	sw	a3,-80(s0)
-80000490:	d71ff0ef          	jal	ra,80000200 <vx_before_main>
-80000494:	d5dff0ef          	jal	ra,800001f0 <vx_available_warps>
-80000498:	fea42223          	sw	a0,-28(s0)
-8000049c:	00010913          	mv	s2,sp
-800004a0:	fe042623          	sw	zero,-20(s0)
-800004a4:	fe042423          	sw	zero,-24(s0)
-800004a8:	0900006f          	j	80000538 <vx_spawnWarps+0xc8>
-800004ac:	ffff09b7          	lui	s3,0xffff0
-800004b0:	01310133          	add	sp,sp,s3
-800004b4:	fe842783          	lw	a5,-24(s0)
-800004b8:	fcf42623          	sw	a5,-52(s0)
-800004bc:	fb842783          	lw	a5,-72(s0)
-800004c0:	fcf42823          	sw	a5,-48(s0)
-800004c4:	00010793          	mv	a5,sp
-800004c8:	fcf42a23          	sw	a5,-44(s0)
-800004cc:	fb442783          	lw	a5,-76(s0)
-800004d0:	fcf42c23          	sw	a5,-40(s0)
-800004d4:	fb042783          	lw	a5,-80(s0)
-800004d8:	fcf42e23          	sw	a5,-36(s0)
-800004dc:	fec42783          	lw	a5,-20(s0)
-800004e0:	fef42023          	sw	a5,-32(s0)
-800004e4:	fec42703          	lw	a4,-20(s0)
-800004e8:	000017b7          	lui	a5,0x1
-800004ec:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
-800004f0:	02f70733          	mul	a4,a4,a5
-800004f4:	810007b7          	lui	a5,0x81000
-800004f8:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
-800004fc:	00f707b3          	add	a5,a4,a5
-80000500:	fcc40713          	addi	a4,s0,-52
-80000504:	00070593          	mv	a1,a4
-80000508:	00078513          	mv	a0,a5
-8000050c:	190000ef          	jal	ra,8000069c <queue_enqueue>
-80000510:	fec42783          	lw	a5,-20(s0)
-80000514:	00178793          	addi	a5,a5,1
-80000518:	fef42623          	sw	a5,-20(s0)
-8000051c:	fec42783          	lw	a5,-20(s0)
-80000520:	fe442703          	lw	a4,-28(s0)
-80000524:	00e7e463          	bltu	a5,a4,8000052c <vx_spawnWarps+0xbc>
-80000528:	fe042623          	sw	zero,-20(s0)
-8000052c:	fe842783          	lw	a5,-24(s0)
-80000530:	00178793          	addi	a5,a5,1
-80000534:	fef42423          	sw	a5,-24(s0)
-80000538:	fe842703          	lw	a4,-24(s0)
-8000053c:	fbc42783          	lw	a5,-68(s0)
-80000540:	f6f766e3          	bltu	a4,a5,800004ac <vx_spawnWarps+0x3c>
-80000544:	00090113          	mv	sp,s2
-80000548:	dfdff0ef          	jal	ra,80000344 <vx_schedule_warps>
-8000054c:	00000013          	nop
-80000550:	04c12083          	lw	ra,76(sp)
-80000554:	04812403          	lw	s0,72(sp)
-80000558:	05010113          	addi	sp,sp,80
-8000055c:	00008067          	ret
+80000640 <vx_get_arg_struct>:
+80000640:	ff010113          	addi	sp,sp,-16
+80000644:	00812623          	sw	s0,12(sp)
+80000648:	01712423          	sw	s7,8(sp)
+8000064c:	01010413          	addi	s0,sp,16
+80000650:	000b8793          	mv	a5,s7
+80000654:	00078513          	mv	a0,a5
+80000658:	00c12403          	lw	s0,12(sp)
+8000065c:	00812b83          	lw	s7,8(sp)
+80000660:	01010113          	addi	sp,sp,16
+80000664:	00008067          	ret
 
-80000560 <vx_wait_for_warps>:
-80000560:	fd010113          	addi	sp,sp,-48
-80000564:	02112623          	sw	ra,44(sp)
-80000568:	02812423          	sw	s0,40(sp)
-8000056c:	03010413          	addi	s0,sp,48
-80000570:	fca42e23          	sw	a0,-36(s0)
-80000574:	fdc42583          	lw	a1,-36(s0)
-80000578:	810007b7          	lui	a5,0x81000
-8000057c:	04078513          	addi	a0,a5,64 # 81000040 <barrier_bool+0xfffd6d7c>
-80000580:	354000ef          	jal	ra,800008d4 <vx_printf>
-80000584:	c6dff0ef          	jal	ra,800001f0 <vx_available_warps>
-80000588:	fea42023          	sw	a0,-32(s0)
-8000058c:	fe042623          	sw	zero,-20(s0)
-80000590:	0680006f          	j	800005f8 <vx_wait_for_warps+0x98>
-80000594:	00100793          	li	a5,1
-80000598:	fef42623          	sw	a5,-20(s0)
-8000059c:	fe042423          	sw	zero,-24(s0)
-800005a0:	03c0006f          	j	800005dc <vx_wait_for_warps+0x7c>
-800005a4:	810007b7          	lui	a5,0x81000
-800005a8:	fe842703          	lw	a4,-24(s0)
-800005ac:	00271713          	slli	a4,a4,0x2
-800005b0:	26878793          	addi	a5,a5,616 # 81000268 <barrier_bool+0xfffd6fa4>
-800005b4:	00f707b3          	add	a5,a4,a5
-800005b8:	0007a703          	lw	a4,0(a5)
-800005bc:	00100793          	li	a5,1
-800005c0:	00f71863          	bne	a4,a5,800005d0 <vx_wait_for_warps+0x70>
-800005c4:	fec42783          	lw	a5,-20(s0)
-800005c8:	00178793          	addi	a5,a5,1
-800005cc:	fef42623          	sw	a5,-20(s0)
-800005d0:	fe842783          	lw	a5,-24(s0)
-800005d4:	00178793          	addi	a5,a5,1
-800005d8:	fef42423          	sw	a5,-24(s0)
-800005dc:	fe842703          	lw	a4,-24(s0)
-800005e0:	01f00793          	li	a5,31
-800005e4:	fce7d0e3          	bge	a5,a4,800005a4 <vx_wait_for_warps+0x44>
-800005e8:	fec42583          	lw	a1,-20(s0)
-800005ec:	810007b7          	lui	a5,0x81000
-800005f0:	04c78513          	addi	a0,a5,76 # 8100004c <barrier_bool+0xfffd6d88>
-800005f4:	2e0000ef          	jal	ra,800008d4 <vx_printf>
-800005f8:	fec42703          	lw	a4,-20(s0)
-800005fc:	fdc42783          	lw	a5,-36(s0)
-80000600:	f8f76ae3          	bltu	a4,a5,80000594 <vx_wait_for_warps+0x34>
-80000604:	fe042223          	sw	zero,-28(s0)
-80000608:	0280006f          	j	80000630 <vx_wait_for_warps+0xd0>
-8000060c:	810007b7          	lui	a5,0x81000
-80000610:	fe442703          	lw	a4,-28(s0)
-80000614:	00271713          	slli	a4,a4,0x2
-80000618:	26878793          	addi	a5,a5,616 # 81000268 <barrier_bool+0xfffd6fa4>
-8000061c:	00f707b3          	add	a5,a4,a5
-80000620:	0007a023          	sw	zero,0(a5)
-80000624:	fe442783          	lw	a5,-28(s0)
-80000628:	00178793          	addi	a5,a5,1
-8000062c:	fef42223          	sw	a5,-28(s0)
-80000630:	fe442783          	lw	a5,-28(s0)
-80000634:	fe042703          	lw	a4,-32(s0)
-80000638:	fce7eae3          	bltu	a5,a4,8000060c <vx_wait_for_warps+0xac>
-8000063c:	00000013          	nop
-80000640:	02c12083          	lw	ra,44(sp)
-80000644:	02812403          	lw	s0,40(sp)
-80000648:	03010113          	addi	sp,sp,48
-8000064c:	00008067          	ret
+80000668 <queue_initialize>:
+80000668:	00050293          	mv	t0,a0
+8000066c:	00000313          	li	t1,0
+80000670:	00700393          	li	t2,7
+80000674:	0062a023          	sw	t1,0(t0)
+80000678:	0062a223          	sw	t1,4(t0)
+8000067c:	0062a423          	sw	t1,8(t0)
+80000680:	0072a623          	sw	t2,12(t0)
+80000684:	0062a823          	sw	t1,16(t0)
+80000688:	00008067          	ret
 
-80000650 <vx_get_arg_struct>:
-80000650:	ff010113          	addi	sp,sp,-16
-80000654:	00812623          	sw	s0,12(sp)
-80000658:	01712423          	sw	s7,8(sp)
-8000065c:	01010413          	addi	s0,sp,16
-80000660:	000b8793          	mv	a5,s7
-80000664:	00078513          	mv	a0,a5
-80000668:	00c12403          	lw	s0,12(sp)
-8000066c:	00812b83          	lw	s7,8(sp)
-80000670:	01010113          	addi	sp,sp,16
-80000674:	00008067          	ret
+8000068c <queue_enqueue>:
+8000068c:	00050293          	mv	t0,a0
+80000690:	0082a303          	lw	t1,8(t0)
+80000694:	00130313          	addi	t1,t1,1
+80000698:	0062a423          	sw	t1,8(t0)
+8000069c:	01428313          	addi	t1,t0,20
+800006a0:	0042ae83          	lw	t4,4(t0)
+800006a4:	005e9393          	slli	t2,t4,0x5
+800006a8:	00730333          	add	t1,t1,t2
+800006ac:	0005ae03          	lw	t3,0(a1)
+800006b0:	01c32023          	sw	t3,0(t1)
+800006b4:	0045ae03          	lw	t3,4(a1)
+800006b8:	01c32223          	sw	t3,4(t1)
+800006bc:	0085ae03          	lw	t3,8(a1)
+800006c0:	01c32423          	sw	t3,8(t1)
+800006c4:	00c5ae03          	lw	t3,12(a1)
+800006c8:	01c32623          	sw	t3,12(t1)
+800006cc:	0105ae03          	lw	t3,16(a1)
+800006d0:	01c32823          	sw	t3,16(t1)
+800006d4:	0145ae03          	lw	t3,20(a1)
+800006d8:	01c32a23          	sw	t3,20(t1)
+800006dc:	001e8e93          	addi	t4,t4,1
+800006e0:	03200f13          	li	t5,50
+800006e4:	01ee9463          	bne	t4,t5,800006ec <ec>
+800006e8:	00000e93          	li	t4,0
 
-80000678 <queue_initialize>:
-80000678:	00050293          	mv	t0,a0
-8000067c:	00000313          	li	t1,0
-80000680:	00700393          	li	t2,7
-80000684:	0062a023          	sw	t1,0(t0)
-80000688:	0062a223          	sw	t1,4(t0)
-8000068c:	0062a423          	sw	t1,8(t0)
-80000690:	0072a623          	sw	t2,12(t0)
-80000694:	0062a823          	sw	t1,16(t0)
-80000698:	00008067          	ret
+800006ec <ec>:
+800006ec:	01d2a223          	sw	t4,4(t0)
+800006f0:	00008067          	ret
 
-8000069c <queue_enqueue>:
-8000069c:	00050293          	mv	t0,a0
-800006a0:	0082a303          	lw	t1,8(t0)
-800006a4:	00130313          	addi	t1,t1,1
-800006a8:	0062a423          	sw	t1,8(t0)
-800006ac:	01428313          	addi	t1,t0,20
-800006b0:	0042ae83          	lw	t4,4(t0)
-800006b4:	005e9393          	slli	t2,t4,0x5
-800006b8:	00730333          	add	t1,t1,t2
-800006bc:	0005ae03          	lw	t3,0(a1)
-800006c0:	01c32023          	sw	t3,0(t1)
-800006c4:	0045ae03          	lw	t3,4(a1)
-800006c8:	01c32223          	sw	t3,4(t1)
-800006cc:	0085ae03          	lw	t3,8(a1)
-800006d0:	01c32423          	sw	t3,8(t1)
-800006d4:	00c5ae03          	lw	t3,12(a1)
-800006d8:	01c32623          	sw	t3,12(t1)
-800006dc:	0105ae03          	lw	t3,16(a1)
-800006e0:	01c32823          	sw	t3,16(t1)
-800006e4:	0145ae03          	lw	t3,20(a1)
-800006e8:	01c32a23          	sw	t3,20(t1)
-800006ec:	001e8e93          	addi	t4,t4,1
-800006f0:	03200f13          	li	t5,50
-800006f4:	01ee9463          	bne	t4,t5,800006fc <ec>
-800006f8:	00000e93          	li	t4,0
-
-800006fc <ec>:
-800006fc:	01d2a223          	sw	t4,4(t0)
-80000700:	00008067          	ret
-
-80000704 <queue_dequeue>:
-80000704:	00050293          	mv	t0,a0
-80000708:	0082a303          	lw	t1,8(t0)
+800006f4 <queue_dequeue>:
+800006f4:	00050293          	mv	t0,a0
+800006f8:	0082a303          	lw	t1,8(t0)
+800006fc:	00000013          	nop
+80000700:	00000013          	nop
+80000704:	00000013          	nop
+80000708:	00000013          	nop
 8000070c:	00000013          	nop
 80000710:	00000013          	nop
-80000714:	00000013          	nop
-80000718:	00000013          	nop
-8000071c:	00000013          	nop
-80000720:	00000013          	nop
-80000724:	fff30313          	addi	t1,t1,-1
-80000728:	0062a423          	sw	t1,8(t0)
-8000072c:	01428313          	addi	t1,t0,20
-80000730:	0002ae83          	lw	t4,0(t0)
-80000734:	03200f93          	li	t6,50
-80000738:	000e8f13          	mv	t5,t4
-8000073c:	001f0f13          	addi	t5,t5,1
-80000740:	01ff1463          	bne	t5,t6,80000748 <dc>
-80000744:	00000f13          	li	t5,0
+80000714:	fff30313          	addi	t1,t1,-1
+80000718:	0062a423          	sw	t1,8(t0)
+8000071c:	01428313          	addi	t1,t0,20
+80000720:	0002ae83          	lw	t4,0(t0)
+80000724:	03200f93          	li	t6,50
+80000728:	000e8f13          	mv	t5,t4
+8000072c:	001f0f13          	addi	t5,t5,1
+80000730:	01ff1463          	bne	t5,t6,80000738 <dc>
+80000734:	00000f13          	li	t5,0
 
-80000748 <dc>:
-80000748:	01e2a023          	sw	t5,0(t0)
-8000074c:	005e9393          	slli	t2,t4,0x5
-80000750:	00730333          	add	t1,t1,t2
-80000754:	00032e03          	lw	t3,0(t1)
-80000758:	01c5a023          	sw	t3,0(a1)
-8000075c:	00432e03          	lw	t3,4(t1)
-80000760:	01c5a223          	sw	t3,4(a1)
-80000764:	00832e03          	lw	t3,8(t1)
-80000768:	01c5a423          	sw	t3,8(a1)
-8000076c:	00c32e03          	lw	t3,12(t1)
-80000770:	01c5a623          	sw	t3,12(a1)
-80000774:	01032e03          	lw	t3,16(t1)
-80000778:	01c5a823          	sw	t3,16(a1)
-8000077c:	01432e03          	lw	t3,20(t1)
-80000780:	01c5aa23          	sw	t3,20(a1)
-80000784:	00008067          	ret
+80000738 <dc>:
+80000738:	01e2a023          	sw	t5,0(t0)
+8000073c:	005e9393          	slli	t2,t4,0x5
+80000740:	00730333          	add	t1,t1,t2
+80000744:	00032e03          	lw	t3,0(t1)
+80000748:	01c5a023          	sw	t3,0(a1)
+8000074c:	00432e03          	lw	t3,4(t1)
+80000750:	01c5a223          	sw	t3,4(a1)
+80000754:	00832e03          	lw	t3,8(t1)
+80000758:	01c5a423          	sw	t3,8(a1)
+8000075c:	00c32e03          	lw	t3,12(t1)
+80000760:	01c5a623          	sw	t3,12(a1)
+80000764:	01032e03          	lw	t3,16(t1)
+80000768:	01c5a823          	sw	t3,16(a1)
+8000076c:	01432e03          	lw	t3,20(t1)
+80000770:	01c5aa23          	sw	t3,20(a1)
+80000774:	00008067          	ret
 
-80000788 <queue_isFull>:
-80000788:	00050293          	mv	t0,a0
-8000078c:	0082a303          	lw	t1,8(t0)
-80000790:	00000513          	li	a0,0
-80000794:	03200e13          	li	t3,50
-80000798:	006e1463          	bne	t3,t1,800007a0 <qf>
-8000079c:	00150513          	addi	a0,a0,1
+80000778 <queue_isFull>:
+80000778:	00050293          	mv	t0,a0
+8000077c:	0082a303          	lw	t1,8(t0)
+80000780:	00000513          	li	a0,0
+80000784:	03200e13          	li	t3,50
+80000788:	006e1463          	bne	t3,t1,80000790 <qf>
+8000078c:	00150513          	addi	a0,a0,1
 
-800007a0 <qf>:
-800007a0:	00008067          	ret
+80000790 <qf>:
+80000790:	00008067          	ret
 
-800007a4 <queue_isEmpty>:
-800007a4:	00050293          	mv	t0,a0
-800007a8:	0082a303          	lw	t1,8(t0)
-800007ac:	00000513          	li	a0,0
-800007b0:	00000e13          	li	t3,0
-800007b4:	006e1463          	bne	t3,t1,800007bc <qe>
-800007b8:	00150513          	addi	a0,a0,1
+80000794 <queue_isEmpty>:
+80000794:	00050293          	mv	t0,a0
+80000798:	0082a303          	lw	t1,8(t0)
+8000079c:	00000513          	li	a0,0
+800007a0:	00000e13          	li	t3,0
+800007a4:	006e1463          	bne	t3,t1,800007ac <qe>
+800007a8:	00150513          	addi	a0,a0,1
 
-800007bc <qe>:
-800007bc:	00008067          	ret
+800007ac <qe>:
+800007ac:	00008067          	ret
 
-800007c0 <queue_availableWarps>:
-800007c0:	00050293          	mv	t0,a0
-800007c4:	00c2a303          	lw	t1,12(t0)
-800007c8:	0102a383          	lw	t2,16(t0)
-800007cc:	0063b533          	sltu	a0,t2,t1
-800007d0:	00008067          	ret
+800007b0 <queue_availableWarps>:
+800007b0:	00050293          	mv	t0,a0
+800007b4:	00c2a303          	lw	t1,12(t0)
+800007b8:	0102a383          	lw	t2,16(t0)
+800007bc:	0063b533          	sltu	a0,t2,t1
+800007c0:	00008067          	ret
 
-800007d4 <vx_print_str>:
-800007d4:	ff410113          	addi	sp,sp,-12
-800007d8:	00112023          	sw	ra,0(sp)
-800007dc:	00b12223          	sw	a1,4(sp)
+800007c4 <vx_print_str>:
+800007c4:	ff410113          	addi	sp,sp,-12
+800007c8:	00112023          	sw	ra,0(sp)
+800007cc:	00b12223          	sw	a1,4(sp)
 
-800007e0 <bl>:
-800007e0:	00054583          	lbu	a1,0(a0)
-800007e4:	00058863          	beqz	a1,800007f4 <be>
-800007e8:	01c000ef          	jal	ra,80000804 <vx_printc>
-800007ec:	00150513          	addi	a0,a0,1
-800007f0:	ff1ff06f          	j	800007e0 <bl>
+800007d0 <bl>:
+800007d0:	00054583          	lbu	a1,0(a0)
+800007d4:	00058863          	beqz	a1,800007e4 <be>
+800007d8:	01c000ef          	jal	ra,800007f4 <vx_printc>
+800007dc:	00150513          	addi	a0,a0,1
+800007e0:	ff1ff06f          	j	800007d0 <bl>
 
-800007f4 <be>:
-800007f4:	00012083          	lw	ra,0(sp)
-800007f8:	00412583          	lw	a1,4(sp)
-800007fc:	00c10113          	addi	sp,sp,12
-80000800:	00008067          	ret
+800007e4 <be>:
+800007e4:	00012083          	lw	ra,0(sp)
+800007e8:	00412583          	lw	a1,4(sp)
+800007ec:	00c10113          	addi	sp,sp,12
+800007f0:	00008067          	ret
 
-80000804 <vx_printc>:
-80000804:	000108b7          	lui	a7,0x10
-80000808:	00b8a023          	sw	a1,0(a7) # 10000 <SIZE+0xffce>
-8000080c:	00008067          	ret
+800007f4 <vx_printc>:
+800007f4:	000108b7          	lui	a7,0x10
+800007f8:	00b8a023          	sw	a1,0(a7) # 10000 <SIZE+0xffce>
+800007fc:	00008067          	ret
 
-80000810 <vx_print_hex>:
-80000810:	fd010113          	addi	sp,sp,-48
-80000814:	02112623          	sw	ra,44(sp)
-80000818:	02812423          	sw	s0,40(sp)
-8000081c:	03010413          	addi	s0,sp,48
-80000820:	fca42e23          	sw	a0,-36(s0)
+80000800 <vx_print_hex>:
+80000800:	fd010113          	addi	sp,sp,-48
+80000804:	02112623          	sw	ra,44(sp)
+80000808:	02812423          	sw	s0,40(sp)
+8000080c:	03010413          	addi	s0,sp,48
+80000810:	fca42e23          	sw	a0,-36(s0)
+80000814:	fdc42703          	lw	a4,-36(s0)
+80000818:	00f00793          	li	a5,15
+8000081c:	02e7e463          	bltu	a5,a4,80000844 <vx_print_hex+0x44>
+80000820:	810007b7          	lui	a5,0x81000
 80000824:	fdc42703          	lw	a4,-36(s0)
-80000828:	00f00793          	li	a5,15
-8000082c:	02e7e463          	bltu	a5,a4,80000854 <vx_print_hex+0x44>
-80000830:	810007b7          	lui	a5,0x81000
-80000834:	fdc42703          	lw	a4,-36(s0)
-80000838:	00271713          	slli	a4,a4,0x2
-8000083c:	1a878793          	addi	a5,a5,424 # 810001a8 <barrier_bool+0xfffd6ee4>
-80000840:	00f707b3          	add	a5,a4,a5
-80000844:	0007a783          	lw	a5,0(a5)
-80000848:	00078513          	mv	a0,a5
-8000084c:	f89ff0ef          	jal	ra,800007d4 <vx_print_str>
-80000850:	0740006f          	j	800008c4 <vx_print_hex+0xb4>
-80000854:	02000793          	li	a5,32
-80000858:	fef42623          	sw	a5,-20(s0)
-8000085c:	fe0405a3          	sb	zero,-21(s0)
-80000860:	fec42783          	lw	a5,-20(s0)
-80000864:	ffc78793          	addi	a5,a5,-4
-80000868:	fdc42703          	lw	a4,-36(s0)
-8000086c:	00f757b3          	srl	a5,a4,a5
-80000870:	00f7f793          	andi	a5,a5,15
-80000874:	fef42223          	sw	a5,-28(s0)
-80000878:	fe442783          	lw	a5,-28(s0)
-8000087c:	00078663          	beqz	a5,80000888 <vx_print_hex+0x78>
-80000880:	00100793          	li	a5,1
-80000884:	fef405a3          	sb	a5,-21(s0)
-80000888:	feb44783          	lbu	a5,-21(s0)
-8000088c:	02078263          	beqz	a5,800008b0 <vx_print_hex+0xa0>
-80000890:	810007b7          	lui	a5,0x81000
-80000894:	fe442703          	lw	a4,-28(s0)
-80000898:	00271713          	slli	a4,a4,0x2
-8000089c:	1a878793          	addi	a5,a5,424 # 810001a8 <barrier_bool+0xfffd6ee4>
-800008a0:	00f707b3          	add	a5,a4,a5
-800008a4:	0007a783          	lw	a5,0(a5)
-800008a8:	00078513          	mv	a0,a5
-800008ac:	f29ff0ef          	jal	ra,800007d4 <vx_print_str>
-800008b0:	fec42783          	lw	a5,-20(s0)
-800008b4:	ffc78793          	addi	a5,a5,-4
-800008b8:	fef42623          	sw	a5,-20(s0)
-800008bc:	fec42783          	lw	a5,-20(s0)
-800008c0:	faf040e3          	bgtz	a5,80000860 <vx_print_hex+0x50>
-800008c4:	02c12083          	lw	ra,44(sp)
-800008c8:	02812403          	lw	s0,40(sp)
-800008cc:	03010113          	addi	sp,sp,48
-800008d0:	00008067          	ret
+80000828:	00271713          	slli	a4,a4,0x2
+8000082c:	1a878793          	addi	a5,a5,424 # 810001a8 <barrier_bool+0xfffd6ee4>
+80000830:	00f707b3          	add	a5,a4,a5
+80000834:	0007a783          	lw	a5,0(a5)
+80000838:	00078513          	mv	a0,a5
+8000083c:	f89ff0ef          	jal	ra,800007c4 <vx_print_str>
+80000840:	0740006f          	j	800008b4 <vx_print_hex+0xb4>
+80000844:	02000793          	li	a5,32
+80000848:	fef42623          	sw	a5,-20(s0)
+8000084c:	fe0405a3          	sb	zero,-21(s0)
+80000850:	fec42783          	lw	a5,-20(s0)
+80000854:	ffc78793          	addi	a5,a5,-4
+80000858:	fdc42703          	lw	a4,-36(s0)
+8000085c:	00f757b3          	srl	a5,a4,a5
+80000860:	00f7f793          	andi	a5,a5,15
+80000864:	fef42223          	sw	a5,-28(s0)
+80000868:	fe442783          	lw	a5,-28(s0)
+8000086c:	00078663          	beqz	a5,80000878 <vx_print_hex+0x78>
+80000870:	00100793          	li	a5,1
+80000874:	fef405a3          	sb	a5,-21(s0)
+80000878:	feb44783          	lbu	a5,-21(s0)
+8000087c:	02078263          	beqz	a5,800008a0 <vx_print_hex+0xa0>
+80000880:	810007b7          	lui	a5,0x81000
+80000884:	fe442703          	lw	a4,-28(s0)
+80000888:	00271713          	slli	a4,a4,0x2
+8000088c:	1a878793          	addi	a5,a5,424 # 810001a8 <barrier_bool+0xfffd6ee4>
+80000890:	00f707b3          	add	a5,a4,a5
+80000894:	0007a783          	lw	a5,0(a5)
+80000898:	00078513          	mv	a0,a5
+8000089c:	f29ff0ef          	jal	ra,800007c4 <vx_print_str>
+800008a0:	fec42783          	lw	a5,-20(s0)
+800008a4:	ffc78793          	addi	a5,a5,-4
+800008a8:	fef42623          	sw	a5,-20(s0)
+800008ac:	fec42783          	lw	a5,-20(s0)
+800008b0:	faf040e3          	bgtz	a5,80000850 <vx_print_hex+0x50>
+800008b4:	02c12083          	lw	ra,44(sp)
+800008b8:	02812403          	lw	s0,40(sp)
+800008bc:	03010113          	addi	sp,sp,48
+800008c0:	00008067          	ret
 
-800008d4 <vx_printf>:
-800008d4:	fe010113          	addi	sp,sp,-32
-800008d8:	00112e23          	sw	ra,28(sp)
-800008dc:	00812c23          	sw	s0,24(sp)
-800008e0:	02010413          	addi	s0,sp,32
-800008e4:	fea42623          	sw	a0,-20(s0)
-800008e8:	feb42423          	sw	a1,-24(s0)
-800008ec:	fec42503          	lw	a0,-20(s0)
-800008f0:	ee5ff0ef          	jal	ra,800007d4 <vx_print_str>
-800008f4:	fe842503          	lw	a0,-24(s0)
-800008f8:	f19ff0ef          	jal	ra,80000810 <vx_print_hex>
-800008fc:	810007b7          	lui	a5,0x81000
-80000900:	09478513          	addi	a0,a5,148 # 81000094 <barrier_bool+0xfffd6dd0>
-80000904:	ed1ff0ef          	jal	ra,800007d4 <vx_print_str>
-80000908:	00000013          	nop
-8000090c:	01c12083          	lw	ra,28(sp)
-80000910:	01812403          	lw	s0,24(sp)
-80000914:	02010113          	addi	sp,sp,32
-80000918:	00008067          	ret
+800008c4 <vx_printf>:
+800008c4:	fe010113          	addi	sp,sp,-32
+800008c8:	00112e23          	sw	ra,28(sp)
+800008cc:	00812c23          	sw	s0,24(sp)
+800008d0:	02010413          	addi	s0,sp,32
+800008d4:	fea42623          	sw	a0,-20(s0)
+800008d8:	feb42423          	sw	a1,-24(s0)
+800008dc:	fec42503          	lw	a0,-20(s0)
+800008e0:	ee5ff0ef          	jal	ra,800007c4 <vx_print_str>
+800008e4:	fe842503          	lw	a0,-24(s0)
+800008e8:	f19ff0ef          	jal	ra,80000800 <vx_print_hex>
+800008ec:	810007b7          	lui	a5,0x81000
+800008f0:	09478513          	addi	a0,a5,148 # 81000094 <barrier_bool+0xfffd6dd0>
+800008f4:	ed1ff0ef          	jal	ra,800007c4 <vx_print_str>
+800008f8:	00000013          	nop
+800008fc:	01c12083          	lw	ra,28(sp)
+80000900:	01812403          	lw	s0,24(sp)
+80000904:	02010113          	addi	sp,sp,32
+80000908:	00008067          	ret
 
-8000091c <vx_sq_mat_mult>:
-8000091c:	fd010113          	addi	sp,sp,-48
-80000920:	02112623          	sw	ra,44(sp)
-80000924:	02812423          	sw	s0,40(sp)
-80000928:	03010413          	addi	s0,sp,48
-8000092c:	fca42e23          	sw	a0,-36(s0)
-80000930:	fcb42c23          	sw	a1,-40(s0)
-80000934:	fcc42a23          	sw	a2,-44(s0)
-80000938:	fcd42823          	sw	a3,-48(s0)
-8000093c:	810267b7          	lui	a5,0x81026
-80000940:	fdc42703          	lw	a4,-36(s0)
-80000944:	1ae7ac23          	sw	a4,440(a5) # 810261b8 <barrier_bool+0xffffcef4>
+8000090c <vx_sq_mat_mult>:
+8000090c:	fd010113          	addi	sp,sp,-48
+80000910:	02112623          	sw	ra,44(sp)
+80000914:	02812423          	sw	s0,40(sp)
+80000918:	03010413          	addi	s0,sp,48
+8000091c:	fca42e23          	sw	a0,-36(s0)
+80000920:	fcb42c23          	sw	a1,-40(s0)
+80000924:	fcc42a23          	sw	a2,-44(s0)
+80000928:	fcd42823          	sw	a3,-48(s0)
+8000092c:	810267b7          	lui	a5,0x81026
+80000930:	fdc42703          	lw	a4,-36(s0)
+80000934:	1ae7ac23          	sw	a4,440(a5) # 810261b8 <barrier_bool+0xffffcef4>
+80000938:	810267b7          	lui	a5,0x81026
+8000093c:	1b878793          	addi	a5,a5,440 # 810261b8 <barrier_bool+0xffffcef4>
+80000940:	fd842703          	lw	a4,-40(s0)
+80000944:	00e7a223          	sw	a4,4(a5)
 80000948:	810267b7          	lui	a5,0x81026
 8000094c:	1b878793          	addi	a5,a5,440 # 810261b8 <barrier_bool+0xffffcef4>
-80000950:	fd842703          	lw	a4,-40(s0)
-80000954:	00e7a223          	sw	a4,4(a5)
+80000950:	fd442703          	lw	a4,-44(s0)
+80000954:	00e7a423          	sw	a4,8(a5)
 80000958:	810267b7          	lui	a5,0x81026
 8000095c:	1b878793          	addi	a5,a5,440 # 810261b8 <barrier_bool+0xffffcef4>
-80000960:	fd442703          	lw	a4,-44(s0)
-80000964:	00e7a423          	sw	a4,8(a5)
-80000968:	810267b7          	lui	a5,0x81026
-8000096c:	1b878793          	addi	a5,a5,440 # 810261b8 <barrier_bool+0xffffcef4>
+80000960:	fd042703          	lw	a4,-48(s0)
+80000964:	00e7a623          	sw	a4,12(a5)
+80000968:	881ff0ef          	jal	ra,800001e8 <vx_available_threads>
+8000096c:	fea42423          	sw	a0,-24(s0)
 80000970:	fd042703          	lw	a4,-48(s0)
-80000974:	00e7a623          	sw	a4,12(a5)
-80000978:	881ff0ef          	jal	ra,800001f8 <vx_available_threads>
-8000097c:	fea42423          	sw	a0,-24(s0)
+80000974:	fe842783          	lw	a5,-24(s0)
+80000978:	02f757b3          	divu	a5,a4,a5
+8000097c:	fef42623          	sw	a5,-20(s0)
 80000980:	fd042703          	lw	a4,-48(s0)
 80000984:	fe842783          	lw	a5,-24(s0)
-80000988:	02f757b3          	divu	a5,a4,a5
-8000098c:	fef42623          	sw	a5,-20(s0)
-80000990:	fd042703          	lw	a4,-48(s0)
-80000994:	fe842783          	lw	a5,-24(s0)
-80000998:	02f777b3          	remu	a5,a4,a5
-8000099c:	00078863          	beqz	a5,800009ac <vx_sq_mat_mult+0x90>
-800009a0:	fec42783          	lw	a5,-20(s0)
-800009a4:	00178793          	addi	a5,a5,1
-800009a8:	fef42623          	sw	a5,-20(s0)
-800009ac:	810267b7          	lui	a5,0x81026
-800009b0:	1b878793          	addi	a5,a5,440 # 810261b8 <barrier_bool+0xffffcef4>
-800009b4:	fec42703          	lw	a4,-20(s0)
-800009b8:	00e7a823          	sw	a4,16(a5)
-800009bc:	fd042703          	lw	a4,-48(s0)
-800009c0:	fe842783          	lw	a5,-24(s0)
-800009c4:	02f76263          	bltu	a4,a5,800009e8 <vx_sq_mat_mult+0xcc>
-800009c8:	810267b7          	lui	a5,0x81026
-800009cc:	1b878693          	addi	a3,a5,440 # 810261b8 <barrier_bool+0xffffcef4>
-800009d0:	800017b7          	lui	a5,0x80001
-800009d4:	a4078613          	addi	a2,a5,-1472 # 80000a40 <barrier_bool+0xfefd777c>
-800009d8:	fe842583          	lw	a1,-24(s0)
-800009dc:	fd042503          	lw	a0,-48(s0)
-800009e0:	a91ff0ef          	jal	ra,80000470 <vx_spawnWarps>
-800009e4:	0200006f          	j	80000a04 <vx_sq_mat_mult+0xe8>
-800009e8:	810267b7          	lui	a5,0x81026
-800009ec:	1b878693          	addi	a3,a5,440 # 810261b8 <barrier_bool+0xffffcef4>
-800009f0:	800017b7          	lui	a5,0x80001
-800009f4:	a4078613          	addi	a2,a5,-1472 # 80000a40 <barrier_bool+0xfefd777c>
-800009f8:	fd042583          	lw	a1,-48(s0)
-800009fc:	fd042503          	lw	a0,-48(s0)
-80000a00:	a71ff0ef          	jal	ra,80000470 <vx_spawnWarps>
-80000a04:	fecff0ef          	jal	ra,800001f0 <vx_available_warps>
-80000a08:	fea42223          	sw	a0,-28(s0)
-80000a0c:	fd042703          	lw	a4,-48(s0)
-80000a10:	fe442783          	lw	a5,-28(s0)
-80000a14:	00e7f863          	bgeu	a5,a4,80000a24 <vx_sq_mat_mult+0x108>
-80000a18:	fe442503          	lw	a0,-28(s0)
-80000a1c:	b45ff0ef          	jal	ra,80000560 <vx_wait_for_warps>
-80000a20:	00c0006f          	j	80000a2c <vx_sq_mat_mult+0x110>
-80000a24:	fd042503          	lw	a0,-48(s0)
-80000a28:	b39ff0ef          	jal	ra,80000560 <vx_wait_for_warps>
-80000a2c:	00000013          	nop
-80000a30:	02c12083          	lw	ra,44(sp)
-80000a34:	02812403          	lw	s0,40(sp)
-80000a38:	03010113          	addi	sp,sp,48
-80000a3c:	00008067          	ret
+80000988:	02f777b3          	remu	a5,a4,a5
+8000098c:	00078863          	beqz	a5,8000099c <vx_sq_mat_mult+0x90>
+80000990:	fec42783          	lw	a5,-20(s0)
+80000994:	00178793          	addi	a5,a5,1
+80000998:	fef42623          	sw	a5,-20(s0)
+8000099c:	810267b7          	lui	a5,0x81026
+800009a0:	1b878793          	addi	a5,a5,440 # 810261b8 <barrier_bool+0xffffcef4>
+800009a4:	fec42703          	lw	a4,-20(s0)
+800009a8:	00e7a823          	sw	a4,16(a5)
+800009ac:	fd042703          	lw	a4,-48(s0)
+800009b0:	fe842783          	lw	a5,-24(s0)
+800009b4:	02f76263          	bltu	a4,a5,800009d8 <vx_sq_mat_mult+0xcc>
+800009b8:	810267b7          	lui	a5,0x81026
+800009bc:	1b878693          	addi	a3,a5,440 # 810261b8 <barrier_bool+0xffffcef4>
+800009c0:	800017b7          	lui	a5,0x80001
+800009c4:	a3078613          	addi	a2,a5,-1488 # 80000a30 <barrier_bool+0xfefd776c>
+800009c8:	fe842583          	lw	a1,-24(s0)
+800009cc:	fd042503          	lw	a0,-48(s0)
+800009d0:	a91ff0ef          	jal	ra,80000460 <vx_spawnWarps>
+800009d4:	0200006f          	j	800009f4 <vx_sq_mat_mult+0xe8>
+800009d8:	810267b7          	lui	a5,0x81026
+800009dc:	1b878693          	addi	a3,a5,440 # 810261b8 <barrier_bool+0xffffcef4>
+800009e0:	800017b7          	lui	a5,0x80001
+800009e4:	a3078613          	addi	a2,a5,-1488 # 80000a30 <barrier_bool+0xfefd776c>
+800009e8:	fd042583          	lw	a1,-48(s0)
+800009ec:	fd042503          	lw	a0,-48(s0)
+800009f0:	a71ff0ef          	jal	ra,80000460 <vx_spawnWarps>
+800009f4:	fecff0ef          	jal	ra,800001e0 <vx_available_warps>
+800009f8:	fea42223          	sw	a0,-28(s0)
+800009fc:	fd042703          	lw	a4,-48(s0)
+80000a00:	fe442783          	lw	a5,-28(s0)
+80000a04:	00e7f863          	bgeu	a5,a4,80000a14 <vx_sq_mat_mult+0x108>
+80000a08:	fe442503          	lw	a0,-28(s0)
+80000a0c:	b45ff0ef          	jal	ra,80000550 <vx_wait_for_warps>
+80000a10:	00c0006f          	j	80000a1c <vx_sq_mat_mult+0x110>
+80000a14:	fd042503          	lw	a0,-48(s0)
+80000a18:	b39ff0ef          	jal	ra,80000550 <vx_wait_for_warps>
+80000a1c:	00000013          	nop
+80000a20:	02c12083          	lw	ra,44(sp)
+80000a24:	02812403          	lw	s0,40(sp)
+80000a28:	03010113          	addi	sp,sp,48
+80000a2c:	00008067          	ret
 
-80000a40 <_vx_mat_mult>:
-80000a40:	fa010113          	addi	sp,sp,-96
-80000a44:	04112e23          	sw	ra,92(sp)
-80000a48:	04812c23          	sw	s0,88(sp)
-80000a4c:	06010413          	addi	s0,sp,96
-80000a50:	faa42623          	sw	a0,-84(s0)
-80000a54:	fab42423          	sw	a1,-88(s0)
-80000a58:	bf9ff0ef          	jal	ra,80000650 <vx_get_arg_struct>
-80000a5c:	fca42c23          	sw	a0,-40(s0)
-80000a60:	fd842783          	lw	a5,-40(s0)
-80000a64:	0007a783          	lw	a5,0(a5)
-80000a68:	fcf42a23          	sw	a5,-44(s0)
-80000a6c:	fd842783          	lw	a5,-40(s0)
-80000a70:	0047a783          	lw	a5,4(a5)
-80000a74:	fcf42823          	sw	a5,-48(s0)
-80000a78:	fd842783          	lw	a5,-40(s0)
-80000a7c:	0087a783          	lw	a5,8(a5)
-80000a80:	fcf42623          	sw	a5,-52(s0)
-80000a84:	fd842783          	lw	a5,-40(s0)
-80000a88:	0107a783          	lw	a5,16(a5)
-80000a8c:	fef42623          	sw	a5,-20(s0)
-80000a90:	fec42703          	lw	a4,-20(s0)
-80000a94:	fac42783          	lw	a5,-84(s0)
-80000a98:	02f707b3          	mul	a5,a4,a5
-80000a9c:	fef42423          	sw	a5,-24(s0)
-80000aa0:	fec42783          	lw	a5,-20(s0)
-80000aa4:	00079a63          	bnez	a5,80000ab8 <_vx_mat_mult+0x78>
-80000aa8:	00100793          	li	a5,1
-80000aac:	fef42623          	sw	a5,-20(s0)
-80000ab0:	fac42783          	lw	a5,-84(s0)
-80000ab4:	fef42423          	sw	a5,-24(s0)
-80000ab8:	fd842783          	lw	a5,-40(s0)
-80000abc:	00c7a783          	lw	a5,12(a5)
-80000ac0:	fcf42423          	sw	a5,-56(s0)
-80000ac4:	fe042223          	sw	zero,-28(s0)
-80000ac8:	0d80006f          	j	80000ba0 <_vx_mat_mult+0x160>
-80000acc:	fe042023          	sw	zero,-32(s0)
-80000ad0:	fc042e23          	sw	zero,-36(s0)
-80000ad4:	0780006f          	j	80000b4c <_vx_mat_mult+0x10c>
-80000ad8:	fa842703          	lw	a4,-88(s0)
-80000adc:	fc842783          	lw	a5,-56(s0)
-80000ae0:	02f707b3          	mul	a5,a4,a5
-80000ae4:	fdc42703          	lw	a4,-36(s0)
-80000ae8:	00f707b3          	add	a5,a4,a5
-80000aec:	fcf42223          	sw	a5,-60(s0)
-80000af0:	fc842703          	lw	a4,-56(s0)
-80000af4:	fdc42783          	lw	a5,-36(s0)
-80000af8:	02f707b3          	mul	a5,a4,a5
-80000afc:	fe842703          	lw	a4,-24(s0)
-80000b00:	00f707b3          	add	a5,a4,a5
-80000b04:	fcf42023          	sw	a5,-64(s0)
-80000b08:	fc442783          	lw	a5,-60(s0)
-80000b0c:	00279793          	slli	a5,a5,0x2
-80000b10:	fd442703          	lw	a4,-44(s0)
-80000b14:	00f707b3          	add	a5,a4,a5
-80000b18:	0007a703          	lw	a4,0(a5)
-80000b1c:	fc042783          	lw	a5,-64(s0)
-80000b20:	00279793          	slli	a5,a5,0x2
-80000b24:	fd042683          	lw	a3,-48(s0)
-80000b28:	00f687b3          	add	a5,a3,a5
-80000b2c:	0007a783          	lw	a5,0(a5)
-80000b30:	02f707b3          	mul	a5,a4,a5
-80000b34:	fe042703          	lw	a4,-32(s0)
-80000b38:	00f707b3          	add	a5,a4,a5
-80000b3c:	fef42023          	sw	a5,-32(s0)
-80000b40:	fdc42783          	lw	a5,-36(s0)
-80000b44:	00178793          	addi	a5,a5,1
-80000b48:	fcf42e23          	sw	a5,-36(s0)
-80000b4c:	fdc42703          	lw	a4,-36(s0)
-80000b50:	fc842783          	lw	a5,-56(s0)
-80000b54:	f8f762e3          	bltu	a4,a5,80000ad8 <_vx_mat_mult+0x98>
-80000b58:	fa842703          	lw	a4,-88(s0)
-80000b5c:	fc842783          	lw	a5,-56(s0)
-80000b60:	02f70733          	mul	a4,a4,a5
-80000b64:	fe842783          	lw	a5,-24(s0)
-80000b68:	00f707b3          	add	a5,a4,a5
-80000b6c:	faf42e23          	sw	a5,-68(s0)
-80000b70:	fbc42783          	lw	a5,-68(s0)
-80000b74:	00279793          	slli	a5,a5,0x2
-80000b78:	fcc42703          	lw	a4,-52(s0)
-80000b7c:	00f707b3          	add	a5,a4,a5
-80000b80:	fe042703          	lw	a4,-32(s0)
-80000b84:	00e7a023          	sw	a4,0(a5)
-80000b88:	fe842783          	lw	a5,-24(s0)
-80000b8c:	00178793          	addi	a5,a5,1
-80000b90:	fef42423          	sw	a5,-24(s0)
-80000b94:	fe442783          	lw	a5,-28(s0)
-80000b98:	00178793          	addi	a5,a5,1
-80000b9c:	fef42223          	sw	a5,-28(s0)
-80000ba0:	fe442783          	lw	a5,-28(s0)
-80000ba4:	fec42703          	lw	a4,-20(s0)
-80000ba8:	f2e7e2e3          	bltu	a5,a4,80000acc <_vx_mat_mult+0x8c>
-80000bac:	00000013          	nop
-80000bb0:	05c12083          	lw	ra,92(sp)
-80000bb4:	05812403          	lw	s0,88(sp)
-80000bb8:	06010113          	addi	sp,sp,96
-80000bbc:	00008067          	ret
+80000a30 <_vx_mat_mult>:
+80000a30:	fa010113          	addi	sp,sp,-96
+80000a34:	04112e23          	sw	ra,92(sp)
+80000a38:	04812c23          	sw	s0,88(sp)
+80000a3c:	06010413          	addi	s0,sp,96
+80000a40:	faa42623          	sw	a0,-84(s0)
+80000a44:	fab42423          	sw	a1,-88(s0)
+80000a48:	bf9ff0ef          	jal	ra,80000640 <vx_get_arg_struct>
+80000a4c:	fca42c23          	sw	a0,-40(s0)
+80000a50:	fd842783          	lw	a5,-40(s0)
+80000a54:	0007a783          	lw	a5,0(a5)
+80000a58:	fcf42a23          	sw	a5,-44(s0)
+80000a5c:	fd842783          	lw	a5,-40(s0)
+80000a60:	0047a783          	lw	a5,4(a5)
+80000a64:	fcf42823          	sw	a5,-48(s0)
+80000a68:	fd842783          	lw	a5,-40(s0)
+80000a6c:	0087a783          	lw	a5,8(a5)
+80000a70:	fcf42623          	sw	a5,-52(s0)
+80000a74:	fd842783          	lw	a5,-40(s0)
+80000a78:	0107a783          	lw	a5,16(a5)
+80000a7c:	fef42623          	sw	a5,-20(s0)
+80000a80:	fec42703          	lw	a4,-20(s0)
+80000a84:	fac42783          	lw	a5,-84(s0)
+80000a88:	02f707b3          	mul	a5,a4,a5
+80000a8c:	fef42423          	sw	a5,-24(s0)
+80000a90:	fec42783          	lw	a5,-20(s0)
+80000a94:	00079a63          	bnez	a5,80000aa8 <_vx_mat_mult+0x78>
+80000a98:	00100793          	li	a5,1
+80000a9c:	fef42623          	sw	a5,-20(s0)
+80000aa0:	fac42783          	lw	a5,-84(s0)
+80000aa4:	fef42423          	sw	a5,-24(s0)
+80000aa8:	fd842783          	lw	a5,-40(s0)
+80000aac:	00c7a783          	lw	a5,12(a5)
+80000ab0:	fcf42423          	sw	a5,-56(s0)
+80000ab4:	fe042223          	sw	zero,-28(s0)
+80000ab8:	0d80006f          	j	80000b90 <_vx_mat_mult+0x160>
+80000abc:	fe042023          	sw	zero,-32(s0)
+80000ac0:	fc042e23          	sw	zero,-36(s0)
+80000ac4:	0780006f          	j	80000b3c <_vx_mat_mult+0x10c>
+80000ac8:	fa842703          	lw	a4,-88(s0)
+80000acc:	fc842783          	lw	a5,-56(s0)
+80000ad0:	02f707b3          	mul	a5,a4,a5
+80000ad4:	fdc42703          	lw	a4,-36(s0)
+80000ad8:	00f707b3          	add	a5,a4,a5
+80000adc:	fcf42223          	sw	a5,-60(s0)
+80000ae0:	fc842703          	lw	a4,-56(s0)
+80000ae4:	fdc42783          	lw	a5,-36(s0)
+80000ae8:	02f707b3          	mul	a5,a4,a5
+80000aec:	fe842703          	lw	a4,-24(s0)
+80000af0:	00f707b3          	add	a5,a4,a5
+80000af4:	fcf42023          	sw	a5,-64(s0)
+80000af8:	fc442783          	lw	a5,-60(s0)
+80000afc:	00279793          	slli	a5,a5,0x2
+80000b00:	fd442703          	lw	a4,-44(s0)
+80000b04:	00f707b3          	add	a5,a4,a5
+80000b08:	0007a703          	lw	a4,0(a5)
+80000b0c:	fc042783          	lw	a5,-64(s0)
+80000b10:	00279793          	slli	a5,a5,0x2
+80000b14:	fd042683          	lw	a3,-48(s0)
+80000b18:	00f687b3          	add	a5,a3,a5
+80000b1c:	0007a783          	lw	a5,0(a5)
+80000b20:	02f707b3          	mul	a5,a4,a5
+80000b24:	fe042703          	lw	a4,-32(s0)
+80000b28:	00f707b3          	add	a5,a4,a5
+80000b2c:	fef42023          	sw	a5,-32(s0)
+80000b30:	fdc42783          	lw	a5,-36(s0)
+80000b34:	00178793          	addi	a5,a5,1
+80000b38:	fcf42e23          	sw	a5,-36(s0)
+80000b3c:	fdc42703          	lw	a4,-36(s0)
+80000b40:	fc842783          	lw	a5,-56(s0)
+80000b44:	f8f762e3          	bltu	a4,a5,80000ac8 <_vx_mat_mult+0x98>
+80000b48:	fa842703          	lw	a4,-88(s0)
+80000b4c:	fc842783          	lw	a5,-56(s0)
+80000b50:	02f70733          	mul	a4,a4,a5
+80000b54:	fe842783          	lw	a5,-24(s0)
+80000b58:	00f707b3          	add	a5,a4,a5
+80000b5c:	faf42e23          	sw	a5,-68(s0)
+80000b60:	fbc42783          	lw	a5,-68(s0)
+80000b64:	00279793          	slli	a5,a5,0x2
+80000b68:	fcc42703          	lw	a4,-52(s0)
+80000b6c:	00f707b3          	add	a5,a4,a5
+80000b70:	fe042703          	lw	a4,-32(s0)
+80000b74:	00e7a023          	sw	a4,0(a5)
+80000b78:	fe842783          	lw	a5,-24(s0)
+80000b7c:	00178793          	addi	a5,a5,1
+80000b80:	fef42423          	sw	a5,-24(s0)
+80000b84:	fe442783          	lw	a5,-28(s0)
+80000b88:	00178793          	addi	a5,a5,1
+80000b8c:	fef42223          	sw	a5,-28(s0)
+80000b90:	fe442783          	lw	a5,-28(s0)
+80000b94:	fec42703          	lw	a4,-20(s0)
+80000b98:	f2e7e2e3          	bltu	a5,a4,80000abc <_vx_mat_mult+0x8c>
+80000b9c:	00000013          	nop
+80000ba0:	05c12083          	lw	ra,92(sp)
+80000ba4:	05812403          	lw	s0,88(sp)
+80000ba8:	06010113          	addi	sp,sp,96
+80000bac:	00008067          	ret
 
-80000bc0 <vx_mat_add>:
-80000bc0:	fc010113          	addi	sp,sp,-64
-80000bc4:	02112e23          	sw	ra,60(sp)
-80000bc8:	02812c23          	sw	s0,56(sp)
-80000bcc:	04010413          	addi	s0,sp,64
-80000bd0:	fca42e23          	sw	a0,-36(s0)
-80000bd4:	fcb42c23          	sw	a1,-40(s0)
-80000bd8:	fcc42a23          	sw	a2,-44(s0)
-80000bdc:	fcd42823          	sw	a3,-48(s0)
-80000be0:	fce42623          	sw	a4,-52(s0)
-80000be4:	810267b7          	lui	a5,0x81026
-80000be8:	fdc42703          	lw	a4,-36(s0)
-80000bec:	1ce7a623          	sw	a4,460(a5) # 810261cc <barrier_bool+0xffffcf08>
+80000bb0 <vx_mat_add>:
+80000bb0:	fc010113          	addi	sp,sp,-64
+80000bb4:	02112e23          	sw	ra,60(sp)
+80000bb8:	02812c23          	sw	s0,56(sp)
+80000bbc:	04010413          	addi	s0,sp,64
+80000bc0:	fca42e23          	sw	a0,-36(s0)
+80000bc4:	fcb42c23          	sw	a1,-40(s0)
+80000bc8:	fcc42a23          	sw	a2,-44(s0)
+80000bcc:	fcd42823          	sw	a3,-48(s0)
+80000bd0:	fce42623          	sw	a4,-52(s0)
+80000bd4:	810267b7          	lui	a5,0x81026
+80000bd8:	fdc42703          	lw	a4,-36(s0)
+80000bdc:	1ce7a623          	sw	a4,460(a5) # 810261cc <barrier_bool+0xffffcf08>
+80000be0:	810267b7          	lui	a5,0x81026
+80000be4:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
+80000be8:	fd842703          	lw	a4,-40(s0)
+80000bec:	00e7a223          	sw	a4,4(a5)
 80000bf0:	810267b7          	lui	a5,0x81026
 80000bf4:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000bf8:	fd842703          	lw	a4,-40(s0)
-80000bfc:	00e7a223          	sw	a4,4(a5)
+80000bf8:	fd442703          	lw	a4,-44(s0)
+80000bfc:	00e7a423          	sw	a4,8(a5)
 80000c00:	810267b7          	lui	a5,0x81026
 80000c04:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000c08:	fd442703          	lw	a4,-44(s0)
-80000c0c:	00e7a423          	sw	a4,8(a5)
+80000c08:	fcc42703          	lw	a4,-52(s0)
+80000c0c:	00e7a623          	sw	a4,12(a5)
 80000c10:	810267b7          	lui	a5,0x81026
 80000c14:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000c18:	fcc42703          	lw	a4,-52(s0)
-80000c1c:	00e7a623          	sw	a4,12(a5)
-80000c20:	810267b7          	lui	a5,0x81026
-80000c24:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000c28:	fd042703          	lw	a4,-48(s0)
-80000c2c:	00e7a823          	sw	a4,16(a5)
-80000c30:	dc8ff0ef          	jal	ra,800001f8 <vx_available_threads>
-80000c34:	fea42423          	sw	a0,-24(s0)
+80000c18:	fd042703          	lw	a4,-48(s0)
+80000c1c:	00e7a823          	sw	a4,16(a5)
+80000c20:	dc8ff0ef          	jal	ra,800001e8 <vx_available_threads>
+80000c24:	fea42423          	sw	a0,-24(s0)
+80000c28:	fcc42703          	lw	a4,-52(s0)
+80000c2c:	fe842783          	lw	a5,-24(s0)
+80000c30:	02f757b3          	divu	a5,a4,a5
+80000c34:	fef42623          	sw	a5,-20(s0)
 80000c38:	fcc42703          	lw	a4,-52(s0)
 80000c3c:	fe842783          	lw	a5,-24(s0)
-80000c40:	02f757b3          	divu	a5,a4,a5
-80000c44:	fef42623          	sw	a5,-20(s0)
-80000c48:	fcc42703          	lw	a4,-52(s0)
-80000c4c:	fe842783          	lw	a5,-24(s0)
-80000c50:	02f777b3          	remu	a5,a4,a5
-80000c54:	00078863          	beqz	a5,80000c64 <vx_mat_add+0xa4>
-80000c58:	fec42783          	lw	a5,-20(s0)
-80000c5c:	00178793          	addi	a5,a5,1
-80000c60:	fef42623          	sw	a5,-20(s0)
-80000c64:	810267b7          	lui	a5,0x81026
-80000c68:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000c6c:	fec42703          	lw	a4,-20(s0)
-80000c70:	00e7aa23          	sw	a4,20(a5)
-80000c74:	fcc42703          	lw	a4,-52(s0)
-80000c78:	fe842783          	lw	a5,-24(s0)
-80000c7c:	02f76263          	bltu	a4,a5,80000ca0 <vx_mat_add+0xe0>
-80000c80:	810267b7          	lui	a5,0x81026
-80000c84:	1cc78693          	addi	a3,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000c88:	800017b7          	lui	a5,0x80001
-80000c8c:	cf878613          	addi	a2,a5,-776 # 80000cf8 <barrier_bool+0xfefd7a34>
-80000c90:	fe842583          	lw	a1,-24(s0)
-80000c94:	fd042503          	lw	a0,-48(s0)
-80000c98:	fd8ff0ef          	jal	ra,80000470 <vx_spawnWarps>
-80000c9c:	0200006f          	j	80000cbc <vx_mat_add+0xfc>
-80000ca0:	810267b7          	lui	a5,0x81026
-80000ca4:	1cc78693          	addi	a3,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000ca8:	800017b7          	lui	a5,0x80001
-80000cac:	cf878613          	addi	a2,a5,-776 # 80000cf8 <barrier_bool+0xfefd7a34>
-80000cb0:	fcc42583          	lw	a1,-52(s0)
-80000cb4:	fd042503          	lw	a0,-48(s0)
-80000cb8:	fb8ff0ef          	jal	ra,80000470 <vx_spawnWarps>
-80000cbc:	d34ff0ef          	jal	ra,800001f0 <vx_available_warps>
-80000cc0:	fea42223          	sw	a0,-28(s0)
-80000cc4:	fd042703          	lw	a4,-48(s0)
-80000cc8:	fe442783          	lw	a5,-28(s0)
-80000ccc:	00e7f863          	bgeu	a5,a4,80000cdc <vx_mat_add+0x11c>
-80000cd0:	fe442503          	lw	a0,-28(s0)
-80000cd4:	88dff0ef          	jal	ra,80000560 <vx_wait_for_warps>
-80000cd8:	00c0006f          	j	80000ce4 <vx_mat_add+0x124>
-80000cdc:	fd042503          	lw	a0,-48(s0)
-80000ce0:	881ff0ef          	jal	ra,80000560 <vx_wait_for_warps>
-80000ce4:	00000013          	nop
-80000ce8:	03c12083          	lw	ra,60(sp)
-80000cec:	03812403          	lw	s0,56(sp)
-80000cf0:	04010113          	addi	sp,sp,64
-80000cf4:	00008067          	ret
+80000c40:	02f777b3          	remu	a5,a4,a5
+80000c44:	00078863          	beqz	a5,80000c54 <vx_mat_add+0xa4>
+80000c48:	fec42783          	lw	a5,-20(s0)
+80000c4c:	00178793          	addi	a5,a5,1
+80000c50:	fef42623          	sw	a5,-20(s0)
+80000c54:	810267b7          	lui	a5,0x81026
+80000c58:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
+80000c5c:	fec42703          	lw	a4,-20(s0)
+80000c60:	00e7aa23          	sw	a4,20(a5)
+80000c64:	fcc42703          	lw	a4,-52(s0)
+80000c68:	fe842783          	lw	a5,-24(s0)
+80000c6c:	02f76263          	bltu	a4,a5,80000c90 <vx_mat_add+0xe0>
+80000c70:	810267b7          	lui	a5,0x81026
+80000c74:	1cc78693          	addi	a3,a5,460 # 810261cc <barrier_bool+0xffffcf08>
+80000c78:	800017b7          	lui	a5,0x80001
+80000c7c:	ce878613          	addi	a2,a5,-792 # 80000ce8 <barrier_bool+0xfefd7a24>
+80000c80:	fe842583          	lw	a1,-24(s0)
+80000c84:	fd042503          	lw	a0,-48(s0)
+80000c88:	fd8ff0ef          	jal	ra,80000460 <vx_spawnWarps>
+80000c8c:	0200006f          	j	80000cac <vx_mat_add+0xfc>
+80000c90:	810267b7          	lui	a5,0x81026
+80000c94:	1cc78693          	addi	a3,a5,460 # 810261cc <barrier_bool+0xffffcf08>
+80000c98:	800017b7          	lui	a5,0x80001
+80000c9c:	ce878613          	addi	a2,a5,-792 # 80000ce8 <barrier_bool+0xfefd7a24>
+80000ca0:	fcc42583          	lw	a1,-52(s0)
+80000ca4:	fd042503          	lw	a0,-48(s0)
+80000ca8:	fb8ff0ef          	jal	ra,80000460 <vx_spawnWarps>
+80000cac:	d34ff0ef          	jal	ra,800001e0 <vx_available_warps>
+80000cb0:	fea42223          	sw	a0,-28(s0)
+80000cb4:	fd042703          	lw	a4,-48(s0)
+80000cb8:	fe442783          	lw	a5,-28(s0)
+80000cbc:	00e7f863          	bgeu	a5,a4,80000ccc <vx_mat_add+0x11c>
+80000cc0:	fe442503          	lw	a0,-28(s0)
+80000cc4:	88dff0ef          	jal	ra,80000550 <vx_wait_for_warps>
+80000cc8:	00c0006f          	j	80000cd4 <vx_mat_add+0x124>
+80000ccc:	fd042503          	lw	a0,-48(s0)
+80000cd0:	881ff0ef          	jal	ra,80000550 <vx_wait_for_warps>
+80000cd4:	00000013          	nop
+80000cd8:	03c12083          	lw	ra,60(sp)
+80000cdc:	03812403          	lw	s0,56(sp)
+80000ce0:	04010113          	addi	sp,sp,64
+80000ce4:	00008067          	ret
 
-80000cf8 <_vx_mat_add>:
-80000cf8:	fb010113          	addi	sp,sp,-80
-80000cfc:	04112623          	sw	ra,76(sp)
-80000d00:	04812423          	sw	s0,72(sp)
-80000d04:	05010413          	addi	s0,sp,80
-80000d08:	faa42e23          	sw	a0,-68(s0)
-80000d0c:	fab42c23          	sw	a1,-72(s0)
-80000d10:	941ff0ef          	jal	ra,80000650 <vx_get_arg_struct>
-80000d14:	fea42023          	sw	a0,-32(s0)
-80000d18:	fe042783          	lw	a5,-32(s0)
-80000d1c:	0007a783          	lw	a5,0(a5)
-80000d20:	fcf42e23          	sw	a5,-36(s0)
-80000d24:	fe042783          	lw	a5,-32(s0)
-80000d28:	0047a783          	lw	a5,4(a5)
-80000d2c:	fcf42c23          	sw	a5,-40(s0)
-80000d30:	fe042783          	lw	a5,-32(s0)
-80000d34:	0087a783          	lw	a5,8(a5)
-80000d38:	fcf42a23          	sw	a5,-44(s0)
-80000d3c:	fe042783          	lw	a5,-32(s0)
-80000d40:	0147a783          	lw	a5,20(a5)
-80000d44:	fef42623          	sw	a5,-20(s0)
-80000d48:	fec42703          	lw	a4,-20(s0)
-80000d4c:	fbc42783          	lw	a5,-68(s0)
-80000d50:	02f707b3          	mul	a5,a4,a5
-80000d54:	fef42423          	sw	a5,-24(s0)
-80000d58:	fec42783          	lw	a5,-20(s0)
-80000d5c:	00079a63          	bnez	a5,80000d70 <_vx_mat_add+0x78>
-80000d60:	00100793          	li	a5,1
-80000d64:	fef42623          	sw	a5,-20(s0)
-80000d68:	fbc42783          	lw	a5,-68(s0)
-80000d6c:	fef42423          	sw	a5,-24(s0)
-80000d70:	fe042783          	lw	a5,-32(s0)
-80000d74:	00c7a783          	lw	a5,12(a5)
-80000d78:	fcf42823          	sw	a5,-48(s0)
-80000d7c:	fe042223          	sw	zero,-28(s0)
-80000d80:	0c00006f          	j	80000e40 <_vx_mat_add+0x148>
-80000d84:	fb842703          	lw	a4,-72(s0)
-80000d88:	fd042783          	lw	a5,-48(s0)
-80000d8c:	02f70733          	mul	a4,a4,a5
-80000d90:	fe842783          	lw	a5,-24(s0)
-80000d94:	00f707b3          	add	a5,a4,a5
-80000d98:	fcf42623          	sw	a5,-52(s0)
-80000d9c:	fe842703          	lw	a4,-24(s0)
-80000da0:	fd042783          	lw	a5,-48(s0)
-80000da4:	00f737b3          	sltu	a5,a4,a5
-80000da8:	0ff7f793          	andi	a5,a5,255
-80000dac:	fcf42423          	sw	a5,-56(s0)
-80000db0:	fc842783          	lw	a5,-56(s0)
-80000db4:	0017b793          	seqz	a5,a5
-80000db8:	fcf403a3          	sb	a5,-57(s0)
-80000dbc:	fc744783          	lbu	a5,-57(s0)
-80000dc0:	00078f13          	mv	t5,a5
-80000dc4:	800017b7          	lui	a5,0x80001
-80000dc8:	e2c78f93          	addi	t6,a5,-468 # 80000e2c <barrier_bool+0xfefd7b68>
-80000dcc:	000f206b          	0xf206b
-80000dd0:	01ff707b          	0x1ff707b
-80000dd4:	fcc42783          	lw	a5,-52(s0)
-80000dd8:	00279793          	slli	a5,a5,0x2
-80000ddc:	fdc42703          	lw	a4,-36(s0)
-80000de0:	00f707b3          	add	a5,a4,a5
-80000de4:	0007a683          	lw	a3,0(a5)
-80000de8:	fcc42783          	lw	a5,-52(s0)
-80000dec:	00279793          	slli	a5,a5,0x2
-80000df0:	fd842703          	lw	a4,-40(s0)
-80000df4:	00f707b3          	add	a5,a4,a5
-80000df8:	0007a703          	lw	a4,0(a5)
-80000dfc:	fcc42783          	lw	a5,-52(s0)
-80000e00:	00279793          	slli	a5,a5,0x2
-80000e04:	fd442603          	lw	a2,-44(s0)
-80000e08:	00f607b3          	add	a5,a2,a5
-80000e0c:	00e68733          	add	a4,a3,a4
-80000e10:	00e7a023          	sw	a4,0(a5)
-80000e14:	fe842783          	lw	a5,-24(s0)
-80000e18:	00178793          	addi	a5,a5,1
-80000e1c:	fef42423          	sw	a5,-24(s0)
-80000e20:	800017b7          	lui	a5,0x80001
-80000e24:	e3078e13          	addi	t3,a5,-464 # 80000e30 <barrier_bool+0xfefd7b6c>
-80000e28:	000e0067          	jr	t3
-80000e2c:	00000013          	nop
-80000e30:	0000306b          	0x306b
-80000e34:	fe442783          	lw	a5,-28(s0)
-80000e38:	00178793          	addi	a5,a5,1
-80000e3c:	fef42223          	sw	a5,-28(s0)
-80000e40:	fe442783          	lw	a5,-28(s0)
-80000e44:	fec42703          	lw	a4,-20(s0)
-80000e48:	f2e7eee3          	bltu	a5,a4,80000d84 <_vx_mat_add+0x8c>
-80000e4c:	00000013          	nop
-80000e50:	04c12083          	lw	ra,76(sp)
-80000e54:	04812403          	lw	s0,72(sp)
-80000e58:	05010113          	addi	sp,sp,80
-80000e5c:	00008067          	ret
+80000ce8 <_vx_mat_add>:
+80000ce8:	fb010113          	addi	sp,sp,-80
+80000cec:	04112623          	sw	ra,76(sp)
+80000cf0:	04812423          	sw	s0,72(sp)
+80000cf4:	05010413          	addi	s0,sp,80
+80000cf8:	faa42e23          	sw	a0,-68(s0)
+80000cfc:	fab42c23          	sw	a1,-72(s0)
+80000d00:	941ff0ef          	jal	ra,80000640 <vx_get_arg_struct>
+80000d04:	fea42023          	sw	a0,-32(s0)
+80000d08:	fe042783          	lw	a5,-32(s0)
+80000d0c:	0007a783          	lw	a5,0(a5)
+80000d10:	fcf42e23          	sw	a5,-36(s0)
+80000d14:	fe042783          	lw	a5,-32(s0)
+80000d18:	0047a783          	lw	a5,4(a5)
+80000d1c:	fcf42c23          	sw	a5,-40(s0)
+80000d20:	fe042783          	lw	a5,-32(s0)
+80000d24:	0087a783          	lw	a5,8(a5)
+80000d28:	fcf42a23          	sw	a5,-44(s0)
+80000d2c:	fe042783          	lw	a5,-32(s0)
+80000d30:	0147a783          	lw	a5,20(a5)
+80000d34:	fef42623          	sw	a5,-20(s0)
+80000d38:	fec42703          	lw	a4,-20(s0)
+80000d3c:	fbc42783          	lw	a5,-68(s0)
+80000d40:	02f707b3          	mul	a5,a4,a5
+80000d44:	fef42423          	sw	a5,-24(s0)
+80000d48:	fec42783          	lw	a5,-20(s0)
+80000d4c:	00079a63          	bnez	a5,80000d60 <_vx_mat_add+0x78>
+80000d50:	00100793          	li	a5,1
+80000d54:	fef42623          	sw	a5,-20(s0)
+80000d58:	fbc42783          	lw	a5,-68(s0)
+80000d5c:	fef42423          	sw	a5,-24(s0)
+80000d60:	fe042783          	lw	a5,-32(s0)
+80000d64:	00c7a783          	lw	a5,12(a5)
+80000d68:	fcf42823          	sw	a5,-48(s0)
+80000d6c:	fe042223          	sw	zero,-28(s0)
+80000d70:	0c00006f          	j	80000e30 <_vx_mat_add+0x148>
+80000d74:	fb842703          	lw	a4,-72(s0)
+80000d78:	fd042783          	lw	a5,-48(s0)
+80000d7c:	02f70733          	mul	a4,a4,a5
+80000d80:	fe842783          	lw	a5,-24(s0)
+80000d84:	00f707b3          	add	a5,a4,a5
+80000d88:	fcf42623          	sw	a5,-52(s0)
+80000d8c:	fe842703          	lw	a4,-24(s0)
+80000d90:	fd042783          	lw	a5,-48(s0)
+80000d94:	00f737b3          	sltu	a5,a4,a5
+80000d98:	0ff7f793          	andi	a5,a5,255
+80000d9c:	fcf42423          	sw	a5,-56(s0)
+80000da0:	fc842783          	lw	a5,-56(s0)
+80000da4:	0017b793          	seqz	a5,a5
+80000da8:	fcf403a3          	sb	a5,-57(s0)
+80000dac:	fc744783          	lbu	a5,-57(s0)
+80000db0:	00078f13          	mv	t5,a5
+80000db4:	800017b7          	lui	a5,0x80001
+80000db8:	e1c78f93          	addi	t6,a5,-484 # 80000e1c <barrier_bool+0xfefd7b58>
+80000dbc:	000f206b          	0xf206b
+80000dc0:	01ff707b          	0x1ff707b
+80000dc4:	fcc42783          	lw	a5,-52(s0)
+80000dc8:	00279793          	slli	a5,a5,0x2
+80000dcc:	fdc42703          	lw	a4,-36(s0)
+80000dd0:	00f707b3          	add	a5,a4,a5
+80000dd4:	0007a683          	lw	a3,0(a5)
+80000dd8:	fcc42783          	lw	a5,-52(s0)
+80000ddc:	00279793          	slli	a5,a5,0x2
+80000de0:	fd842703          	lw	a4,-40(s0)
+80000de4:	00f707b3          	add	a5,a4,a5
+80000de8:	0007a703          	lw	a4,0(a5)
+80000dec:	fcc42783          	lw	a5,-52(s0)
+80000df0:	00279793          	slli	a5,a5,0x2
+80000df4:	fd442603          	lw	a2,-44(s0)
+80000df8:	00f607b3          	add	a5,a2,a5
+80000dfc:	00e68733          	add	a4,a3,a4
+80000e00:	00e7a023          	sw	a4,0(a5)
+80000e04:	fe842783          	lw	a5,-24(s0)
+80000e08:	00178793          	addi	a5,a5,1
+80000e0c:	fef42423          	sw	a5,-24(s0)
+80000e10:	800017b7          	lui	a5,0x80001
+80000e14:	e2078e13          	addi	t3,a5,-480 # 80000e20 <barrier_bool+0xfefd7b5c>
+80000e18:	000e0067          	jr	t3
+80000e1c:	00000013          	nop
+80000e20:	0000306b          	0x306b
+80000e24:	fe442783          	lw	a5,-28(s0)
+80000e28:	00178793          	addi	a5,a5,1
+80000e2c:	fef42223          	sw	a5,-28(s0)
+80000e30:	fe442783          	lw	a5,-28(s0)
+80000e34:	fec42703          	lw	a4,-20(s0)
+80000e38:	f2e7eee3          	bltu	a5,a4,80000d74 <_vx_mat_add+0x8c>
+80000e3c:	00000013          	nop
+80000e40:	04c12083          	lw	ra,76(sp)
+80000e44:	04812403          	lw	s0,72(sp)
+80000e48:	05010113          	addi	sp,sp,80
+80000e4c:	00008067          	ret
 
-80000e60 <vx_mat_sub>:
-80000e60:	fc010113          	addi	sp,sp,-64
-80000e64:	02112e23          	sw	ra,60(sp)
-80000e68:	02812c23          	sw	s0,56(sp)
-80000e6c:	04010413          	addi	s0,sp,64
-80000e70:	fca42e23          	sw	a0,-36(s0)
-80000e74:	fcb42c23          	sw	a1,-40(s0)
-80000e78:	fcc42a23          	sw	a2,-44(s0)
-80000e7c:	fcd42823          	sw	a3,-48(s0)
-80000e80:	fce42623          	sw	a4,-52(s0)
-80000e84:	810267b7          	lui	a5,0x81026
-80000e88:	fdc42703          	lw	a4,-36(s0)
-80000e8c:	1ce7a623          	sw	a4,460(a5) # 810261cc <barrier_bool+0xffffcf08>
+80000e50 <vx_mat_sub>:
+80000e50:	fc010113          	addi	sp,sp,-64
+80000e54:	02112e23          	sw	ra,60(sp)
+80000e58:	02812c23          	sw	s0,56(sp)
+80000e5c:	04010413          	addi	s0,sp,64
+80000e60:	fca42e23          	sw	a0,-36(s0)
+80000e64:	fcb42c23          	sw	a1,-40(s0)
+80000e68:	fcc42a23          	sw	a2,-44(s0)
+80000e6c:	fcd42823          	sw	a3,-48(s0)
+80000e70:	fce42623          	sw	a4,-52(s0)
+80000e74:	810267b7          	lui	a5,0x81026
+80000e78:	fdc42703          	lw	a4,-36(s0)
+80000e7c:	1ce7a623          	sw	a4,460(a5) # 810261cc <barrier_bool+0xffffcf08>
+80000e80:	810267b7          	lui	a5,0x81026
+80000e84:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
+80000e88:	fd842703          	lw	a4,-40(s0)
+80000e8c:	00e7a223          	sw	a4,4(a5)
 80000e90:	810267b7          	lui	a5,0x81026
 80000e94:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000e98:	fd842703          	lw	a4,-40(s0)
-80000e9c:	00e7a223          	sw	a4,4(a5)
+80000e98:	fd442703          	lw	a4,-44(s0)
+80000e9c:	00e7a423          	sw	a4,8(a5)
 80000ea0:	810267b7          	lui	a5,0x81026
 80000ea4:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000ea8:	fd442703          	lw	a4,-44(s0)
-80000eac:	00e7a423          	sw	a4,8(a5)
+80000ea8:	fcc42703          	lw	a4,-52(s0)
+80000eac:	00e7a623          	sw	a4,12(a5)
 80000eb0:	810267b7          	lui	a5,0x81026
 80000eb4:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000eb8:	fcc42703          	lw	a4,-52(s0)
-80000ebc:	00e7a623          	sw	a4,12(a5)
-80000ec0:	810267b7          	lui	a5,0x81026
-80000ec4:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000ec8:	fd042703          	lw	a4,-48(s0)
-80000ecc:	00e7a823          	sw	a4,16(a5)
-80000ed0:	b28ff0ef          	jal	ra,800001f8 <vx_available_threads>
-80000ed4:	fea42423          	sw	a0,-24(s0)
+80000eb8:	fd042703          	lw	a4,-48(s0)
+80000ebc:	00e7a823          	sw	a4,16(a5)
+80000ec0:	b28ff0ef          	jal	ra,800001e8 <vx_available_threads>
+80000ec4:	fea42423          	sw	a0,-24(s0)
+80000ec8:	fcc42703          	lw	a4,-52(s0)
+80000ecc:	fe842783          	lw	a5,-24(s0)
+80000ed0:	02f757b3          	divu	a5,a4,a5
+80000ed4:	fef42623          	sw	a5,-20(s0)
 80000ed8:	fcc42703          	lw	a4,-52(s0)
 80000edc:	fe842783          	lw	a5,-24(s0)
-80000ee0:	02f757b3          	divu	a5,a4,a5
-80000ee4:	fef42623          	sw	a5,-20(s0)
-80000ee8:	fcc42703          	lw	a4,-52(s0)
-80000eec:	fe842783          	lw	a5,-24(s0)
-80000ef0:	02f777b3          	remu	a5,a4,a5
-80000ef4:	00078863          	beqz	a5,80000f04 <vx_mat_sub+0xa4>
-80000ef8:	fec42783          	lw	a5,-20(s0)
-80000efc:	00178793          	addi	a5,a5,1
-80000f00:	fef42623          	sw	a5,-20(s0)
-80000f04:	810267b7          	lui	a5,0x81026
-80000f08:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000f0c:	fec42703          	lw	a4,-20(s0)
-80000f10:	00e7aa23          	sw	a4,20(a5)
-80000f14:	fcc42703          	lw	a4,-52(s0)
-80000f18:	fe842783          	lw	a5,-24(s0)
-80000f1c:	02f76263          	bltu	a4,a5,80000f40 <vx_mat_sub+0xe0>
-80000f20:	810267b7          	lui	a5,0x81026
-80000f24:	1cc78693          	addi	a3,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000f28:	800017b7          	lui	a5,0x80001
-80000f2c:	f9878613          	addi	a2,a5,-104 # 80000f98 <barrier_bool+0xfefd7cd4>
-80000f30:	fe842583          	lw	a1,-24(s0)
-80000f34:	fd042503          	lw	a0,-48(s0)
-80000f38:	d38ff0ef          	jal	ra,80000470 <vx_spawnWarps>
-80000f3c:	0200006f          	j	80000f5c <vx_mat_sub+0xfc>
-80000f40:	810267b7          	lui	a5,0x81026
-80000f44:	1cc78693          	addi	a3,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000f48:	800017b7          	lui	a5,0x80001
-80000f4c:	f9878613          	addi	a2,a5,-104 # 80000f98 <barrier_bool+0xfefd7cd4>
-80000f50:	fcc42583          	lw	a1,-52(s0)
-80000f54:	fd042503          	lw	a0,-48(s0)
-80000f58:	d18ff0ef          	jal	ra,80000470 <vx_spawnWarps>
-80000f5c:	a94ff0ef          	jal	ra,800001f0 <vx_available_warps>
-80000f60:	fea42223          	sw	a0,-28(s0)
-80000f64:	fd042703          	lw	a4,-48(s0)
-80000f68:	fe442783          	lw	a5,-28(s0)
-80000f6c:	00e7f863          	bgeu	a5,a4,80000f7c <vx_mat_sub+0x11c>
-80000f70:	fe442503          	lw	a0,-28(s0)
-80000f74:	decff0ef          	jal	ra,80000560 <vx_wait_for_warps>
-80000f78:	00c0006f          	j	80000f84 <vx_mat_sub+0x124>
-80000f7c:	fd042503          	lw	a0,-48(s0)
-80000f80:	de0ff0ef          	jal	ra,80000560 <vx_wait_for_warps>
-80000f84:	00000013          	nop
-80000f88:	03c12083          	lw	ra,60(sp)
-80000f8c:	03812403          	lw	s0,56(sp)
-80000f90:	04010113          	addi	sp,sp,64
-80000f94:	00008067          	ret
+80000ee0:	02f777b3          	remu	a5,a4,a5
+80000ee4:	00078863          	beqz	a5,80000ef4 <vx_mat_sub+0xa4>
+80000ee8:	fec42783          	lw	a5,-20(s0)
+80000eec:	00178793          	addi	a5,a5,1
+80000ef0:	fef42623          	sw	a5,-20(s0)
+80000ef4:	810267b7          	lui	a5,0x81026
+80000ef8:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
+80000efc:	fec42703          	lw	a4,-20(s0)
+80000f00:	00e7aa23          	sw	a4,20(a5)
+80000f04:	fcc42703          	lw	a4,-52(s0)
+80000f08:	fe842783          	lw	a5,-24(s0)
+80000f0c:	02f76263          	bltu	a4,a5,80000f30 <vx_mat_sub+0xe0>
+80000f10:	810267b7          	lui	a5,0x81026
+80000f14:	1cc78693          	addi	a3,a5,460 # 810261cc <barrier_bool+0xffffcf08>
+80000f18:	800017b7          	lui	a5,0x80001
+80000f1c:	f8878613          	addi	a2,a5,-120 # 80000f88 <barrier_bool+0xfefd7cc4>
+80000f20:	fe842583          	lw	a1,-24(s0)
+80000f24:	fd042503          	lw	a0,-48(s0)
+80000f28:	d38ff0ef          	jal	ra,80000460 <vx_spawnWarps>
+80000f2c:	0200006f          	j	80000f4c <vx_mat_sub+0xfc>
+80000f30:	810267b7          	lui	a5,0x81026
+80000f34:	1cc78693          	addi	a3,a5,460 # 810261cc <barrier_bool+0xffffcf08>
+80000f38:	800017b7          	lui	a5,0x80001
+80000f3c:	f8878613          	addi	a2,a5,-120 # 80000f88 <barrier_bool+0xfefd7cc4>
+80000f40:	fcc42583          	lw	a1,-52(s0)
+80000f44:	fd042503          	lw	a0,-48(s0)
+80000f48:	d18ff0ef          	jal	ra,80000460 <vx_spawnWarps>
+80000f4c:	a94ff0ef          	jal	ra,800001e0 <vx_available_warps>
+80000f50:	fea42223          	sw	a0,-28(s0)
+80000f54:	fd042703          	lw	a4,-48(s0)
+80000f58:	fe442783          	lw	a5,-28(s0)
+80000f5c:	00e7f863          	bgeu	a5,a4,80000f6c <vx_mat_sub+0x11c>
+80000f60:	fe442503          	lw	a0,-28(s0)
+80000f64:	decff0ef          	jal	ra,80000550 <vx_wait_for_warps>
+80000f68:	00c0006f          	j	80000f74 <vx_mat_sub+0x124>
+80000f6c:	fd042503          	lw	a0,-48(s0)
+80000f70:	de0ff0ef          	jal	ra,80000550 <vx_wait_for_warps>
+80000f74:	00000013          	nop
+80000f78:	03c12083          	lw	ra,60(sp)
+80000f7c:	03812403          	lw	s0,56(sp)
+80000f80:	04010113          	addi	sp,sp,64
+80000f84:	00008067          	ret
 
-80000f98 <_vx_mat_sub>:
-80000f98:	fb010113          	addi	sp,sp,-80
-80000f9c:	04112623          	sw	ra,76(sp)
-80000fa0:	04812423          	sw	s0,72(sp)
-80000fa4:	05010413          	addi	s0,sp,80
-80000fa8:	faa42e23          	sw	a0,-68(s0)
-80000fac:	fab42c23          	sw	a1,-72(s0)
-80000fb0:	ea0ff0ef          	jal	ra,80000650 <vx_get_arg_struct>
-80000fb4:	fea42023          	sw	a0,-32(s0)
-80000fb8:	fe042783          	lw	a5,-32(s0)
-80000fbc:	0007a783          	lw	a5,0(a5)
-80000fc0:	fcf42e23          	sw	a5,-36(s0)
-80000fc4:	fe042783          	lw	a5,-32(s0)
-80000fc8:	0047a783          	lw	a5,4(a5)
-80000fcc:	fcf42c23          	sw	a5,-40(s0)
-80000fd0:	fe042783          	lw	a5,-32(s0)
-80000fd4:	0087a783          	lw	a5,8(a5)
-80000fd8:	fcf42a23          	sw	a5,-44(s0)
-80000fdc:	fe042783          	lw	a5,-32(s0)
-80000fe0:	0147a783          	lw	a5,20(a5)
-80000fe4:	fef42623          	sw	a5,-20(s0)
-80000fe8:	fec42703          	lw	a4,-20(s0)
-80000fec:	fbc42783          	lw	a5,-68(s0)
-80000ff0:	02f707b3          	mul	a5,a4,a5
-80000ff4:	fef42423          	sw	a5,-24(s0)
-80000ff8:	fec42783          	lw	a5,-20(s0)
-80000ffc:	00079a63          	bnez	a5,80001010 <_vx_mat_sub+0x78>
-80001000:	00100793          	li	a5,1
-80001004:	fef42623          	sw	a5,-20(s0)
-80001008:	fbc42783          	lw	a5,-68(s0)
-8000100c:	fef42423          	sw	a5,-24(s0)
-80001010:	fe042783          	lw	a5,-32(s0)
-80001014:	00c7a783          	lw	a5,12(a5)
-80001018:	fcf42823          	sw	a5,-48(s0)
-8000101c:	fe042223          	sw	zero,-28(s0)
-80001020:	0c00006f          	j	800010e0 <_vx_mat_sub+0x148>
-80001024:	fb842703          	lw	a4,-72(s0)
-80001028:	fd042783          	lw	a5,-48(s0)
-8000102c:	02f70733          	mul	a4,a4,a5
-80001030:	fe842783          	lw	a5,-24(s0)
-80001034:	00f707b3          	add	a5,a4,a5
-80001038:	fcf42623          	sw	a5,-52(s0)
-8000103c:	fe842703          	lw	a4,-24(s0)
-80001040:	fd042783          	lw	a5,-48(s0)
-80001044:	00f737b3          	sltu	a5,a4,a5
-80001048:	0ff7f793          	andi	a5,a5,255
-8000104c:	fcf42423          	sw	a5,-56(s0)
-80001050:	fc842783          	lw	a5,-56(s0)
-80001054:	0017b793          	seqz	a5,a5
-80001058:	fcf403a3          	sb	a5,-57(s0)
-8000105c:	fc744783          	lbu	a5,-57(s0)
-80001060:	00078f13          	mv	t5,a5
-80001064:	800017b7          	lui	a5,0x80001
-80001068:	0cc78f93          	addi	t6,a5,204 # 800010cc <barrier_bool+0xfefd7e08>
-8000106c:	000f206b          	0xf206b
-80001070:	01ff707b          	0x1ff707b
-80001074:	fcc42783          	lw	a5,-52(s0)
-80001078:	00279793          	slli	a5,a5,0x2
-8000107c:	fdc42703          	lw	a4,-36(s0)
-80001080:	00f707b3          	add	a5,a4,a5
-80001084:	0007a683          	lw	a3,0(a5)
-80001088:	fcc42783          	lw	a5,-52(s0)
-8000108c:	00279793          	slli	a5,a5,0x2
-80001090:	fd842703          	lw	a4,-40(s0)
-80001094:	00f707b3          	add	a5,a4,a5
-80001098:	0007a703          	lw	a4,0(a5)
-8000109c:	fcc42783          	lw	a5,-52(s0)
-800010a0:	00279793          	slli	a5,a5,0x2
-800010a4:	fd442603          	lw	a2,-44(s0)
-800010a8:	00f607b3          	add	a5,a2,a5
-800010ac:	40e68733          	sub	a4,a3,a4
-800010b0:	00e7a023          	sw	a4,0(a5)
-800010b4:	fe842783          	lw	a5,-24(s0)
-800010b8:	00178793          	addi	a5,a5,1
-800010bc:	fef42423          	sw	a5,-24(s0)
-800010c0:	800017b7          	lui	a5,0x80001
-800010c4:	0d078e13          	addi	t3,a5,208 # 800010d0 <barrier_bool+0xfefd7e0c>
-800010c8:	000e0067          	jr	t3
-800010cc:	00000013          	nop
-800010d0:	0000306b          	0x306b
-800010d4:	fe442783          	lw	a5,-28(s0)
-800010d8:	00178793          	addi	a5,a5,1
-800010dc:	fef42223          	sw	a5,-28(s0)
-800010e0:	fe442783          	lw	a5,-28(s0)
-800010e4:	fec42703          	lw	a4,-20(s0)
-800010e8:	f2e7eee3          	bltu	a5,a4,80001024 <_vx_mat_sub+0x8c>
-800010ec:	00000013          	nop
-800010f0:	04c12083          	lw	ra,76(sp)
-800010f4:	04812403          	lw	s0,72(sp)
-800010f8:	05010113          	addi	sp,sp,80
-800010fc:	00008067          	ret
+80000f88 <_vx_mat_sub>:
+80000f88:	fb010113          	addi	sp,sp,-80
+80000f8c:	04112623          	sw	ra,76(sp)
+80000f90:	04812423          	sw	s0,72(sp)
+80000f94:	05010413          	addi	s0,sp,80
+80000f98:	faa42e23          	sw	a0,-68(s0)
+80000f9c:	fab42c23          	sw	a1,-72(s0)
+80000fa0:	ea0ff0ef          	jal	ra,80000640 <vx_get_arg_struct>
+80000fa4:	fea42023          	sw	a0,-32(s0)
+80000fa8:	fe042783          	lw	a5,-32(s0)
+80000fac:	0007a783          	lw	a5,0(a5)
+80000fb0:	fcf42e23          	sw	a5,-36(s0)
+80000fb4:	fe042783          	lw	a5,-32(s0)
+80000fb8:	0047a783          	lw	a5,4(a5)
+80000fbc:	fcf42c23          	sw	a5,-40(s0)
+80000fc0:	fe042783          	lw	a5,-32(s0)
+80000fc4:	0087a783          	lw	a5,8(a5)
+80000fc8:	fcf42a23          	sw	a5,-44(s0)
+80000fcc:	fe042783          	lw	a5,-32(s0)
+80000fd0:	0147a783          	lw	a5,20(a5)
+80000fd4:	fef42623          	sw	a5,-20(s0)
+80000fd8:	fec42703          	lw	a4,-20(s0)
+80000fdc:	fbc42783          	lw	a5,-68(s0)
+80000fe0:	02f707b3          	mul	a5,a4,a5
+80000fe4:	fef42423          	sw	a5,-24(s0)
+80000fe8:	fec42783          	lw	a5,-20(s0)
+80000fec:	00079a63          	bnez	a5,80001000 <_vx_mat_sub+0x78>
+80000ff0:	00100793          	li	a5,1
+80000ff4:	fef42623          	sw	a5,-20(s0)
+80000ff8:	fbc42783          	lw	a5,-68(s0)
+80000ffc:	fef42423          	sw	a5,-24(s0)
+80001000:	fe042783          	lw	a5,-32(s0)
+80001004:	00c7a783          	lw	a5,12(a5)
+80001008:	fcf42823          	sw	a5,-48(s0)
+8000100c:	fe042223          	sw	zero,-28(s0)
+80001010:	0c00006f          	j	800010d0 <_vx_mat_sub+0x148>
+80001014:	fb842703          	lw	a4,-72(s0)
+80001018:	fd042783          	lw	a5,-48(s0)
+8000101c:	02f70733          	mul	a4,a4,a5
+80001020:	fe842783          	lw	a5,-24(s0)
+80001024:	00f707b3          	add	a5,a4,a5
+80001028:	fcf42623          	sw	a5,-52(s0)
+8000102c:	fe842703          	lw	a4,-24(s0)
+80001030:	fd042783          	lw	a5,-48(s0)
+80001034:	00f737b3          	sltu	a5,a4,a5
+80001038:	0ff7f793          	andi	a5,a5,255
+8000103c:	fcf42423          	sw	a5,-56(s0)
+80001040:	fc842783          	lw	a5,-56(s0)
+80001044:	0017b793          	seqz	a5,a5
+80001048:	fcf403a3          	sb	a5,-57(s0)
+8000104c:	fc744783          	lbu	a5,-57(s0)
+80001050:	00078f13          	mv	t5,a5
+80001054:	800017b7          	lui	a5,0x80001
+80001058:	0bc78f93          	addi	t6,a5,188 # 800010bc <barrier_bool+0xfefd7df8>
+8000105c:	000f206b          	0xf206b
+80001060:	01ff707b          	0x1ff707b
+80001064:	fcc42783          	lw	a5,-52(s0)
+80001068:	00279793          	slli	a5,a5,0x2
+8000106c:	fdc42703          	lw	a4,-36(s0)
+80001070:	00f707b3          	add	a5,a4,a5
+80001074:	0007a683          	lw	a3,0(a5)
+80001078:	fcc42783          	lw	a5,-52(s0)
+8000107c:	00279793          	slli	a5,a5,0x2
+80001080:	fd842703          	lw	a4,-40(s0)
+80001084:	00f707b3          	add	a5,a4,a5
+80001088:	0007a703          	lw	a4,0(a5)
+8000108c:	fcc42783          	lw	a5,-52(s0)
+80001090:	00279793          	slli	a5,a5,0x2
+80001094:	fd442603          	lw	a2,-44(s0)
+80001098:	00f607b3          	add	a5,a2,a5
+8000109c:	40e68733          	sub	a4,a3,a4
+800010a0:	00e7a023          	sw	a4,0(a5)
+800010a4:	fe842783          	lw	a5,-24(s0)
+800010a8:	00178793          	addi	a5,a5,1
+800010ac:	fef42423          	sw	a5,-24(s0)
+800010b0:	800017b7          	lui	a5,0x80001
+800010b4:	0c078e13          	addi	t3,a5,192 # 800010c0 <barrier_bool+0xfefd7dfc>
+800010b8:	000e0067          	jr	t3
+800010bc:	00000013          	nop
+800010c0:	0000306b          	0x306b
+800010c4:	fe442783          	lw	a5,-28(s0)
+800010c8:	00178793          	addi	a5,a5,1
+800010cc:	fef42223          	sw	a5,-28(s0)
+800010d0:	fe442783          	lw	a5,-28(s0)
+800010d4:	fec42703          	lw	a4,-20(s0)
+800010d8:	f2e7eee3          	bltu	a5,a4,80001014 <_vx_mat_sub+0x8c>
+800010dc:	00000013          	nop
+800010e0:	04c12083          	lw	ra,76(sp)
+800010e4:	04812403          	lw	s0,72(sp)
+800010e8:	05010113          	addi	sp,sp,80
+800010ec:	00008067          	ret
 
-80001100 <vx_e_mat_add>:
-80001100:	fc010113          	addi	sp,sp,-64
-80001104:	02112e23          	sw	ra,60(sp)
-80001108:	02812c23          	sw	s0,56(sp)
-8000110c:	04010413          	addi	s0,sp,64
-80001110:	fca42e23          	sw	a0,-36(s0)
-80001114:	fcb42c23          	sw	a1,-40(s0)
-80001118:	fcc42a23          	sw	a2,-44(s0)
-8000111c:	fcd42823          	sw	a3,-48(s0)
-80001120:	fce42623          	sw	a4,-52(s0)
-80001124:	810267b7          	lui	a5,0x81026
-80001128:	fdc42703          	lw	a4,-36(s0)
-8000112c:	1ee7a223          	sw	a4,484(a5) # 810261e4 <barrier_bool+0xffffcf20>
+800010f0 <vx_e_mat_add>:
+800010f0:	fc010113          	addi	sp,sp,-64
+800010f4:	02112e23          	sw	ra,60(sp)
+800010f8:	02812c23          	sw	s0,56(sp)
+800010fc:	04010413          	addi	s0,sp,64
+80001100:	fca42e23          	sw	a0,-36(s0)
+80001104:	fcb42c23          	sw	a1,-40(s0)
+80001108:	fcc42a23          	sw	a2,-44(s0)
+8000110c:	fcd42823          	sw	a3,-48(s0)
+80001110:	fce42623          	sw	a4,-52(s0)
+80001114:	810267b7          	lui	a5,0x81026
+80001118:	fdc42703          	lw	a4,-36(s0)
+8000111c:	1ee7a223          	sw	a4,484(a5) # 810261e4 <barrier_bool+0xffffcf20>
+80001120:	810267b7          	lui	a5,0x81026
+80001124:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
+80001128:	fd842703          	lw	a4,-40(s0)
+8000112c:	00e7a223          	sw	a4,4(a5)
 80001130:	810267b7          	lui	a5,0x81026
 80001134:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-80001138:	fd842703          	lw	a4,-40(s0)
-8000113c:	00e7a223          	sw	a4,4(a5)
+80001138:	fd442703          	lw	a4,-44(s0)
+8000113c:	00e7a423          	sw	a4,8(a5)
 80001140:	810267b7          	lui	a5,0x81026
 80001144:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-80001148:	fd442703          	lw	a4,-44(s0)
-8000114c:	00e7a423          	sw	a4,8(a5)
+80001148:	fcc42703          	lw	a4,-52(s0)
+8000114c:	00e7a623          	sw	a4,12(a5)
 80001150:	810267b7          	lui	a5,0x81026
 80001154:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-80001158:	fcc42703          	lw	a4,-52(s0)
-8000115c:	00e7a623          	sw	a4,12(a5)
-80001160:	810267b7          	lui	a5,0x81026
-80001164:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-80001168:	fd042703          	lw	a4,-48(s0)
-8000116c:	00e7a823          	sw	a4,16(a5)
-80001170:	888ff0ef          	jal	ra,800001f8 <vx_available_threads>
-80001174:	fea42423          	sw	a0,-24(s0)
+80001158:	fd042703          	lw	a4,-48(s0)
+8000115c:	00e7a823          	sw	a4,16(a5)
+80001160:	888ff0ef          	jal	ra,800001e8 <vx_available_threads>
+80001164:	fea42423          	sw	a0,-24(s0)
+80001168:	fcc42703          	lw	a4,-52(s0)
+8000116c:	fe842783          	lw	a5,-24(s0)
+80001170:	02f757b3          	divu	a5,a4,a5
+80001174:	fef42623          	sw	a5,-20(s0)
 80001178:	fcc42703          	lw	a4,-52(s0)
 8000117c:	fe842783          	lw	a5,-24(s0)
-80001180:	02f757b3          	divu	a5,a4,a5
-80001184:	fef42623          	sw	a5,-20(s0)
-80001188:	fcc42703          	lw	a4,-52(s0)
-8000118c:	fe842783          	lw	a5,-24(s0)
-80001190:	02f777b3          	remu	a5,a4,a5
-80001194:	00078863          	beqz	a5,800011a4 <vx_e_mat_add+0xa4>
-80001198:	fec42783          	lw	a5,-20(s0)
-8000119c:	00178793          	addi	a5,a5,1
-800011a0:	fef42623          	sw	a5,-20(s0)
-800011a4:	810267b7          	lui	a5,0x81026
-800011a8:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-800011ac:	fec42703          	lw	a4,-20(s0)
-800011b0:	00e7aa23          	sw	a4,20(a5)
-800011b4:	fcc42703          	lw	a4,-52(s0)
-800011b8:	fe842783          	lw	a5,-24(s0)
-800011bc:	02f76263          	bltu	a4,a5,800011e0 <vx_e_mat_add+0xe0>
-800011c0:	810267b7          	lui	a5,0x81026
-800011c4:	1e478693          	addi	a3,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-800011c8:	800017b7          	lui	a5,0x80001
-800011cc:	23878613          	addi	a2,a5,568 # 80001238 <barrier_bool+0xfefd7f74>
-800011d0:	fe842583          	lw	a1,-24(s0)
-800011d4:	fd042503          	lw	a0,-48(s0)
-800011d8:	a98ff0ef          	jal	ra,80000470 <vx_spawnWarps>
-800011dc:	0200006f          	j	800011fc <vx_e_mat_add+0xfc>
-800011e0:	810267b7          	lui	a5,0x81026
-800011e4:	1e478693          	addi	a3,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-800011e8:	800017b7          	lui	a5,0x80001
-800011ec:	23878613          	addi	a2,a5,568 # 80001238 <barrier_bool+0xfefd7f74>
-800011f0:	fcc42583          	lw	a1,-52(s0)
-800011f4:	fd042503          	lw	a0,-48(s0)
-800011f8:	a78ff0ef          	jal	ra,80000470 <vx_spawnWarps>
-800011fc:	ff5fe0ef          	jal	ra,800001f0 <vx_available_warps>
-80001200:	fea42223          	sw	a0,-28(s0)
-80001204:	fd042703          	lw	a4,-48(s0)
-80001208:	fe442783          	lw	a5,-28(s0)
-8000120c:	00e7f863          	bgeu	a5,a4,8000121c <vx_e_mat_add+0x11c>
-80001210:	fe442503          	lw	a0,-28(s0)
-80001214:	b4cff0ef          	jal	ra,80000560 <vx_wait_for_warps>
-80001218:	00c0006f          	j	80001224 <vx_e_mat_add+0x124>
-8000121c:	fd042503          	lw	a0,-48(s0)
-80001220:	b40ff0ef          	jal	ra,80000560 <vx_wait_for_warps>
-80001224:	00000013          	nop
-80001228:	03c12083          	lw	ra,60(sp)
-8000122c:	03812403          	lw	s0,56(sp)
-80001230:	04010113          	addi	sp,sp,64
-80001234:	00008067          	ret
+80001180:	02f777b3          	remu	a5,a4,a5
+80001184:	00078863          	beqz	a5,80001194 <vx_e_mat_add+0xa4>
+80001188:	fec42783          	lw	a5,-20(s0)
+8000118c:	00178793          	addi	a5,a5,1
+80001190:	fef42623          	sw	a5,-20(s0)
+80001194:	810267b7          	lui	a5,0x81026
+80001198:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
+8000119c:	fec42703          	lw	a4,-20(s0)
+800011a0:	00e7aa23          	sw	a4,20(a5)
+800011a4:	fcc42703          	lw	a4,-52(s0)
+800011a8:	fe842783          	lw	a5,-24(s0)
+800011ac:	02f76263          	bltu	a4,a5,800011d0 <vx_e_mat_add+0xe0>
+800011b0:	810267b7          	lui	a5,0x81026
+800011b4:	1e478693          	addi	a3,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
+800011b8:	800017b7          	lui	a5,0x80001
+800011bc:	22878613          	addi	a2,a5,552 # 80001228 <barrier_bool+0xfefd7f64>
+800011c0:	fe842583          	lw	a1,-24(s0)
+800011c4:	fd042503          	lw	a0,-48(s0)
+800011c8:	a98ff0ef          	jal	ra,80000460 <vx_spawnWarps>
+800011cc:	0200006f          	j	800011ec <vx_e_mat_add+0xfc>
+800011d0:	810267b7          	lui	a5,0x81026
+800011d4:	1e478693          	addi	a3,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
+800011d8:	800017b7          	lui	a5,0x80001
+800011dc:	22878613          	addi	a2,a5,552 # 80001228 <barrier_bool+0xfefd7f64>
+800011e0:	fcc42583          	lw	a1,-52(s0)
+800011e4:	fd042503          	lw	a0,-48(s0)
+800011e8:	a78ff0ef          	jal	ra,80000460 <vx_spawnWarps>
+800011ec:	ff5fe0ef          	jal	ra,800001e0 <vx_available_warps>
+800011f0:	fea42223          	sw	a0,-28(s0)
+800011f4:	fd042703          	lw	a4,-48(s0)
+800011f8:	fe442783          	lw	a5,-28(s0)
+800011fc:	00e7f863          	bgeu	a5,a4,8000120c <vx_e_mat_add+0x11c>
+80001200:	fe442503          	lw	a0,-28(s0)
+80001204:	b4cff0ef          	jal	ra,80000550 <vx_wait_for_warps>
+80001208:	00c0006f          	j	80001214 <vx_e_mat_add+0x124>
+8000120c:	fd042503          	lw	a0,-48(s0)
+80001210:	b40ff0ef          	jal	ra,80000550 <vx_wait_for_warps>
+80001214:	00000013          	nop
+80001218:	03c12083          	lw	ra,60(sp)
+8000121c:	03812403          	lw	s0,56(sp)
+80001220:	04010113          	addi	sp,sp,64
+80001224:	00008067          	ret
 
-80001238 <_vx_e_mat_add>:
-80001238:	fb010113          	addi	sp,sp,-80
-8000123c:	04112623          	sw	ra,76(sp)
-80001240:	04812423          	sw	s0,72(sp)
-80001244:	05010413          	addi	s0,sp,80
-80001248:	faa42e23          	sw	a0,-68(s0)
-8000124c:	fab42c23          	sw	a1,-72(s0)
-80001250:	c00ff0ef          	jal	ra,80000650 <vx_get_arg_struct>
-80001254:	fea42023          	sw	a0,-32(s0)
-80001258:	fe042783          	lw	a5,-32(s0)
+80001228 <_vx_e_mat_add>:
+80001228:	fb010113          	addi	sp,sp,-80
+8000122c:	04112623          	sw	ra,76(sp)
+80001230:	04812423          	sw	s0,72(sp)
+80001234:	05010413          	addi	s0,sp,80
+80001238:	faa42e23          	sw	a0,-68(s0)
+8000123c:	fab42c23          	sw	a1,-72(s0)
+80001240:	c00ff0ef          	jal	ra,80000640 <vx_get_arg_struct>
+80001244:	fea42023          	sw	a0,-32(s0)
+80001248:	fe042783          	lw	a5,-32(s0)
+8000124c:	0007a783          	lw	a5,0(a5)
+80001250:	fcf42e23          	sw	a5,-36(s0)
+80001254:	fe042783          	lw	a5,-32(s0)
+80001258:	0047a783          	lw	a5,4(a5)
 8000125c:	0007a783          	lw	a5,0(a5)
-80001260:	fcf42e23          	sw	a5,-36(s0)
+80001260:	fcf42c23          	sw	a5,-40(s0)
 80001264:	fe042783          	lw	a5,-32(s0)
-80001268:	0047a783          	lw	a5,4(a5)
-8000126c:	0007a783          	lw	a5,0(a5)
-80001270:	fcf42c23          	sw	a5,-40(s0)
-80001274:	fe042783          	lw	a5,-32(s0)
-80001278:	0087a783          	lw	a5,8(a5)
-8000127c:	fcf42a23          	sw	a5,-44(s0)
-80001280:	fe042783          	lw	a5,-32(s0)
-80001284:	0147a783          	lw	a5,20(a5)
-80001288:	fef42623          	sw	a5,-20(s0)
-8000128c:	fec42703          	lw	a4,-20(s0)
-80001290:	fbc42783          	lw	a5,-68(s0)
-80001294:	02f707b3          	mul	a5,a4,a5
-80001298:	fef42423          	sw	a5,-24(s0)
-8000129c:	fec42783          	lw	a5,-20(s0)
-800012a0:	00079a63          	bnez	a5,800012b4 <_vx_e_mat_add+0x7c>
-800012a4:	00100793          	li	a5,1
-800012a8:	fef42623          	sw	a5,-20(s0)
-800012ac:	fbc42783          	lw	a5,-68(s0)
-800012b0:	fef42423          	sw	a5,-24(s0)
-800012b4:	fe042783          	lw	a5,-32(s0)
-800012b8:	00c7a783          	lw	a5,12(a5)
-800012bc:	fcf42823          	sw	a5,-48(s0)
-800012c0:	fe042223          	sw	zero,-28(s0)
-800012c4:	0b00006f          	j	80001374 <_vx_e_mat_add+0x13c>
-800012c8:	fb842703          	lw	a4,-72(s0)
-800012cc:	fd042783          	lw	a5,-48(s0)
-800012d0:	02f70733          	mul	a4,a4,a5
-800012d4:	fe842783          	lw	a5,-24(s0)
-800012d8:	00f707b3          	add	a5,a4,a5
-800012dc:	fcf42623          	sw	a5,-52(s0)
-800012e0:	fe842703          	lw	a4,-24(s0)
-800012e4:	fd042783          	lw	a5,-48(s0)
-800012e8:	00f737b3          	sltu	a5,a4,a5
-800012ec:	0ff7f793          	andi	a5,a5,255
-800012f0:	fcf42423          	sw	a5,-56(s0)
-800012f4:	fc842783          	lw	a5,-56(s0)
-800012f8:	0017b793          	seqz	a5,a5
-800012fc:	fcf403a3          	sb	a5,-57(s0)
-80001300:	fc744783          	lbu	a5,-57(s0)
-80001304:	00078f13          	mv	t5,a5
-80001308:	800017b7          	lui	a5,0x80001
-8000130c:	36078f93          	addi	t6,a5,864 # 80001360 <barrier_bool+0xfefd809c>
-80001310:	000f206b          	0xf206b
-80001314:	01ff707b          	0x1ff707b
-80001318:	fcc42783          	lw	a5,-52(s0)
-8000131c:	00279793          	slli	a5,a5,0x2
-80001320:	fdc42703          	lw	a4,-36(s0)
-80001324:	00f707b3          	add	a5,a4,a5
-80001328:	0007a683          	lw	a3,0(a5)
-8000132c:	fcc42783          	lw	a5,-52(s0)
-80001330:	00279793          	slli	a5,a5,0x2
-80001334:	fd442703          	lw	a4,-44(s0)
-80001338:	00f707b3          	add	a5,a4,a5
-8000133c:	fd842703          	lw	a4,-40(s0)
-80001340:	00e68733          	add	a4,a3,a4
-80001344:	00e7a023          	sw	a4,0(a5)
-80001348:	fe842783          	lw	a5,-24(s0)
-8000134c:	00178793          	addi	a5,a5,1
-80001350:	fef42423          	sw	a5,-24(s0)
-80001354:	800017b7          	lui	a5,0x80001
-80001358:	36478e13          	addi	t3,a5,868 # 80001364 <barrier_bool+0xfefd80a0>
-8000135c:	000e0067          	jr	t3
-80001360:	00000013          	nop
-80001364:	0000306b          	0x306b
-80001368:	fe442783          	lw	a5,-28(s0)
-8000136c:	00178793          	addi	a5,a5,1
-80001370:	fef42223          	sw	a5,-28(s0)
-80001374:	fe442783          	lw	a5,-28(s0)
-80001378:	fec42703          	lw	a4,-20(s0)
-8000137c:	f4e7e6e3          	bltu	a5,a4,800012c8 <_vx_e_mat_add+0x90>
-80001380:	00000013          	nop
-80001384:	04c12083          	lw	ra,76(sp)
-80001388:	04812403          	lw	s0,72(sp)
-8000138c:	05010113          	addi	sp,sp,80
-80001390:	00008067          	ret
+80001268:	0087a783          	lw	a5,8(a5)
+8000126c:	fcf42a23          	sw	a5,-44(s0)
+80001270:	fe042783          	lw	a5,-32(s0)
+80001274:	0147a783          	lw	a5,20(a5)
+80001278:	fef42623          	sw	a5,-20(s0)
+8000127c:	fec42703          	lw	a4,-20(s0)
+80001280:	fbc42783          	lw	a5,-68(s0)
+80001284:	02f707b3          	mul	a5,a4,a5
+80001288:	fef42423          	sw	a5,-24(s0)
+8000128c:	fec42783          	lw	a5,-20(s0)
+80001290:	00079a63          	bnez	a5,800012a4 <_vx_e_mat_add+0x7c>
+80001294:	00100793          	li	a5,1
+80001298:	fef42623          	sw	a5,-20(s0)
+8000129c:	fbc42783          	lw	a5,-68(s0)
+800012a0:	fef42423          	sw	a5,-24(s0)
+800012a4:	fe042783          	lw	a5,-32(s0)
+800012a8:	00c7a783          	lw	a5,12(a5)
+800012ac:	fcf42823          	sw	a5,-48(s0)
+800012b0:	fe042223          	sw	zero,-28(s0)
+800012b4:	0b00006f          	j	80001364 <_vx_e_mat_add+0x13c>
+800012b8:	fb842703          	lw	a4,-72(s0)
+800012bc:	fd042783          	lw	a5,-48(s0)
+800012c0:	02f70733          	mul	a4,a4,a5
+800012c4:	fe842783          	lw	a5,-24(s0)
+800012c8:	00f707b3          	add	a5,a4,a5
+800012cc:	fcf42623          	sw	a5,-52(s0)
+800012d0:	fe842703          	lw	a4,-24(s0)
+800012d4:	fd042783          	lw	a5,-48(s0)
+800012d8:	00f737b3          	sltu	a5,a4,a5
+800012dc:	0ff7f793          	andi	a5,a5,255
+800012e0:	fcf42423          	sw	a5,-56(s0)
+800012e4:	fc842783          	lw	a5,-56(s0)
+800012e8:	0017b793          	seqz	a5,a5
+800012ec:	fcf403a3          	sb	a5,-57(s0)
+800012f0:	fc744783          	lbu	a5,-57(s0)
+800012f4:	00078f13          	mv	t5,a5
+800012f8:	800017b7          	lui	a5,0x80001
+800012fc:	35078f93          	addi	t6,a5,848 # 80001350 <barrier_bool+0xfefd808c>
+80001300:	000f206b          	0xf206b
+80001304:	01ff707b          	0x1ff707b
+80001308:	fcc42783          	lw	a5,-52(s0)
+8000130c:	00279793          	slli	a5,a5,0x2
+80001310:	fdc42703          	lw	a4,-36(s0)
+80001314:	00f707b3          	add	a5,a4,a5
+80001318:	0007a683          	lw	a3,0(a5)
+8000131c:	fcc42783          	lw	a5,-52(s0)
+80001320:	00279793          	slli	a5,a5,0x2
+80001324:	fd442703          	lw	a4,-44(s0)
+80001328:	00f707b3          	add	a5,a4,a5
+8000132c:	fd842703          	lw	a4,-40(s0)
+80001330:	00e68733          	add	a4,a3,a4
+80001334:	00e7a023          	sw	a4,0(a5)
+80001338:	fe842783          	lw	a5,-24(s0)
+8000133c:	00178793          	addi	a5,a5,1
+80001340:	fef42423          	sw	a5,-24(s0)
+80001344:	800017b7          	lui	a5,0x80001
+80001348:	35478e13          	addi	t3,a5,852 # 80001354 <barrier_bool+0xfefd8090>
+8000134c:	000e0067          	jr	t3
+80001350:	00000013          	nop
+80001354:	0000306b          	0x306b
+80001358:	fe442783          	lw	a5,-28(s0)
+8000135c:	00178793          	addi	a5,a5,1
+80001360:	fef42223          	sw	a5,-28(s0)
+80001364:	fe442783          	lw	a5,-28(s0)
+80001368:	fec42703          	lw	a4,-20(s0)
+8000136c:	f4e7e6e3          	bltu	a5,a4,800012b8 <_vx_e_mat_add+0x90>
+80001370:	00000013          	nop
+80001374:	04c12083          	lw	ra,76(sp)
+80001378:	04812403          	lw	s0,72(sp)
+8000137c:	05010113          	addi	sp,sp,80
+80001380:	00008067          	ret
 
-80001394 <vx_e_mat_mult>:
-80001394:	fc010113          	addi	sp,sp,-64
-80001398:	02112e23          	sw	ra,60(sp)
-8000139c:	02812c23          	sw	s0,56(sp)
-800013a0:	04010413          	addi	s0,sp,64
-800013a4:	fca42e23          	sw	a0,-36(s0)
-800013a8:	fcb42c23          	sw	a1,-40(s0)
-800013ac:	fcc42a23          	sw	a2,-44(s0)
-800013b0:	fcd42823          	sw	a3,-48(s0)
-800013b4:	fce42623          	sw	a4,-52(s0)
-800013b8:	810267b7          	lui	a5,0x81026
-800013bc:	fdc42703          	lw	a4,-36(s0)
-800013c0:	1ee7a223          	sw	a4,484(a5) # 810261e4 <barrier_bool+0xffffcf20>
+80001384 <vx_e_mat_mult>:
+80001384:	fc010113          	addi	sp,sp,-64
+80001388:	02112e23          	sw	ra,60(sp)
+8000138c:	02812c23          	sw	s0,56(sp)
+80001390:	04010413          	addi	s0,sp,64
+80001394:	fca42e23          	sw	a0,-36(s0)
+80001398:	fcb42c23          	sw	a1,-40(s0)
+8000139c:	fcc42a23          	sw	a2,-44(s0)
+800013a0:	fcd42823          	sw	a3,-48(s0)
+800013a4:	fce42623          	sw	a4,-52(s0)
+800013a8:	810267b7          	lui	a5,0x81026
+800013ac:	fdc42703          	lw	a4,-36(s0)
+800013b0:	1ee7a223          	sw	a4,484(a5) # 810261e4 <barrier_bool+0xffffcf20>
+800013b4:	810267b7          	lui	a5,0x81026
+800013b8:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
+800013bc:	fd842703          	lw	a4,-40(s0)
+800013c0:	00e7a223          	sw	a4,4(a5)
 800013c4:	810267b7          	lui	a5,0x81026
 800013c8:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-800013cc:	fd842703          	lw	a4,-40(s0)
-800013d0:	00e7a223          	sw	a4,4(a5)
+800013cc:	fd442703          	lw	a4,-44(s0)
+800013d0:	00e7a423          	sw	a4,8(a5)
 800013d4:	810267b7          	lui	a5,0x81026
 800013d8:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-800013dc:	fd442703          	lw	a4,-44(s0)
-800013e0:	00e7a423          	sw	a4,8(a5)
+800013dc:	fcc42703          	lw	a4,-52(s0)
+800013e0:	00e7a623          	sw	a4,12(a5)
 800013e4:	810267b7          	lui	a5,0x81026
 800013e8:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-800013ec:	fcc42703          	lw	a4,-52(s0)
-800013f0:	00e7a623          	sw	a4,12(a5)
-800013f4:	810267b7          	lui	a5,0x81026
-800013f8:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-800013fc:	fd042703          	lw	a4,-48(s0)
-80001400:	00e7a823          	sw	a4,16(a5)
-80001404:	df5fe0ef          	jal	ra,800001f8 <vx_available_threads>
-80001408:	fea42423          	sw	a0,-24(s0)
+800013ec:	fd042703          	lw	a4,-48(s0)
+800013f0:	00e7a823          	sw	a4,16(a5)
+800013f4:	df5fe0ef          	jal	ra,800001e8 <vx_available_threads>
+800013f8:	fea42423          	sw	a0,-24(s0)
+800013fc:	fcc42703          	lw	a4,-52(s0)
+80001400:	fe842783          	lw	a5,-24(s0)
+80001404:	02f757b3          	divu	a5,a4,a5
+80001408:	fef42623          	sw	a5,-20(s0)
 8000140c:	fcc42703          	lw	a4,-52(s0)
 80001410:	fe842783          	lw	a5,-24(s0)
-80001414:	02f757b3          	divu	a5,a4,a5
-80001418:	fef42623          	sw	a5,-20(s0)
-8000141c:	fcc42703          	lw	a4,-52(s0)
-80001420:	fe842783          	lw	a5,-24(s0)
-80001424:	02f777b3          	remu	a5,a4,a5
-80001428:	00078863          	beqz	a5,80001438 <vx_e_mat_mult+0xa4>
-8000142c:	fec42783          	lw	a5,-20(s0)
-80001430:	00178793          	addi	a5,a5,1
-80001434:	fef42623          	sw	a5,-20(s0)
-80001438:	810267b7          	lui	a5,0x81026
-8000143c:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-80001440:	fec42703          	lw	a4,-20(s0)
-80001444:	00e7aa23          	sw	a4,20(a5)
-80001448:	fcc42703          	lw	a4,-52(s0)
-8000144c:	fe842783          	lw	a5,-24(s0)
-80001450:	02f76263          	bltu	a4,a5,80001474 <vx_e_mat_mult+0xe0>
-80001454:	810267b7          	lui	a5,0x81026
-80001458:	1e478693          	addi	a3,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-8000145c:	800017b7          	lui	a5,0x80001
-80001460:	4cc78613          	addi	a2,a5,1228 # 800014cc <barrier_bool+0xfefd8208>
-80001464:	fe842583          	lw	a1,-24(s0)
-80001468:	fd042503          	lw	a0,-48(s0)
-8000146c:	804ff0ef          	jal	ra,80000470 <vx_spawnWarps>
-80001470:	0200006f          	j	80001490 <vx_e_mat_mult+0xfc>
-80001474:	810267b7          	lui	a5,0x81026
-80001478:	1e478693          	addi	a3,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-8000147c:	800017b7          	lui	a5,0x80001
-80001480:	4cc78613          	addi	a2,a5,1228 # 800014cc <barrier_bool+0xfefd8208>
-80001484:	fcc42583          	lw	a1,-52(s0)
-80001488:	fd042503          	lw	a0,-48(s0)
-8000148c:	fe5fe0ef          	jal	ra,80000470 <vx_spawnWarps>
-80001490:	d61fe0ef          	jal	ra,800001f0 <vx_available_warps>
-80001494:	fea42223          	sw	a0,-28(s0)
-80001498:	fd042703          	lw	a4,-48(s0)
-8000149c:	fe442783          	lw	a5,-28(s0)
-800014a0:	00e7f863          	bgeu	a5,a4,800014b0 <vx_e_mat_mult+0x11c>
-800014a4:	fe442503          	lw	a0,-28(s0)
-800014a8:	8b8ff0ef          	jal	ra,80000560 <vx_wait_for_warps>
-800014ac:	00c0006f          	j	800014b8 <vx_e_mat_mult+0x124>
-800014b0:	fd042503          	lw	a0,-48(s0)
-800014b4:	8acff0ef          	jal	ra,80000560 <vx_wait_for_warps>
-800014b8:	00000013          	nop
-800014bc:	03c12083          	lw	ra,60(sp)
-800014c0:	03812403          	lw	s0,56(sp)
-800014c4:	04010113          	addi	sp,sp,64
-800014c8:	00008067          	ret
+80001414:	02f777b3          	remu	a5,a4,a5
+80001418:	00078863          	beqz	a5,80001428 <vx_e_mat_mult+0xa4>
+8000141c:	fec42783          	lw	a5,-20(s0)
+80001420:	00178793          	addi	a5,a5,1
+80001424:	fef42623          	sw	a5,-20(s0)
+80001428:	810267b7          	lui	a5,0x81026
+8000142c:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
+80001430:	fec42703          	lw	a4,-20(s0)
+80001434:	00e7aa23          	sw	a4,20(a5)
+80001438:	fcc42703          	lw	a4,-52(s0)
+8000143c:	fe842783          	lw	a5,-24(s0)
+80001440:	02f76263          	bltu	a4,a5,80001464 <vx_e_mat_mult+0xe0>
+80001444:	810267b7          	lui	a5,0x81026
+80001448:	1e478693          	addi	a3,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
+8000144c:	800017b7          	lui	a5,0x80001
+80001450:	4bc78613          	addi	a2,a5,1212 # 800014bc <barrier_bool+0xfefd81f8>
+80001454:	fe842583          	lw	a1,-24(s0)
+80001458:	fd042503          	lw	a0,-48(s0)
+8000145c:	804ff0ef          	jal	ra,80000460 <vx_spawnWarps>
+80001460:	0200006f          	j	80001480 <vx_e_mat_mult+0xfc>
+80001464:	810267b7          	lui	a5,0x81026
+80001468:	1e478693          	addi	a3,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
+8000146c:	800017b7          	lui	a5,0x80001
+80001470:	4bc78613          	addi	a2,a5,1212 # 800014bc <barrier_bool+0xfefd81f8>
+80001474:	fcc42583          	lw	a1,-52(s0)
+80001478:	fd042503          	lw	a0,-48(s0)
+8000147c:	fe5fe0ef          	jal	ra,80000460 <vx_spawnWarps>
+80001480:	d61fe0ef          	jal	ra,800001e0 <vx_available_warps>
+80001484:	fea42223          	sw	a0,-28(s0)
+80001488:	fd042703          	lw	a4,-48(s0)
+8000148c:	fe442783          	lw	a5,-28(s0)
+80001490:	00e7f863          	bgeu	a5,a4,800014a0 <vx_e_mat_mult+0x11c>
+80001494:	fe442503          	lw	a0,-28(s0)
+80001498:	8b8ff0ef          	jal	ra,80000550 <vx_wait_for_warps>
+8000149c:	00c0006f          	j	800014a8 <vx_e_mat_mult+0x124>
+800014a0:	fd042503          	lw	a0,-48(s0)
+800014a4:	8acff0ef          	jal	ra,80000550 <vx_wait_for_warps>
+800014a8:	00000013          	nop
+800014ac:	03c12083          	lw	ra,60(sp)
+800014b0:	03812403          	lw	s0,56(sp)
+800014b4:	04010113          	addi	sp,sp,64
+800014b8:	00008067          	ret
 
-800014cc <_vx_e_mat_mult>:
-800014cc:	fb010113          	addi	sp,sp,-80
-800014d0:	04112623          	sw	ra,76(sp)
-800014d4:	04812423          	sw	s0,72(sp)
-800014d8:	05010413          	addi	s0,sp,80
-800014dc:	faa42e23          	sw	a0,-68(s0)
-800014e0:	fab42c23          	sw	a1,-72(s0)
-800014e4:	96cff0ef          	jal	ra,80000650 <vx_get_arg_struct>
-800014e8:	fea42023          	sw	a0,-32(s0)
-800014ec:	fe042783          	lw	a5,-32(s0)
+800014bc <_vx_e_mat_mult>:
+800014bc:	fb010113          	addi	sp,sp,-80
+800014c0:	04112623          	sw	ra,76(sp)
+800014c4:	04812423          	sw	s0,72(sp)
+800014c8:	05010413          	addi	s0,sp,80
+800014cc:	faa42e23          	sw	a0,-68(s0)
+800014d0:	fab42c23          	sw	a1,-72(s0)
+800014d4:	96cff0ef          	jal	ra,80000640 <vx_get_arg_struct>
+800014d8:	fea42023          	sw	a0,-32(s0)
+800014dc:	fe042783          	lw	a5,-32(s0)
+800014e0:	0007a783          	lw	a5,0(a5)
+800014e4:	fcf42e23          	sw	a5,-36(s0)
+800014e8:	fe042783          	lw	a5,-32(s0)
+800014ec:	0047a783          	lw	a5,4(a5)
 800014f0:	0007a783          	lw	a5,0(a5)
-800014f4:	fcf42e23          	sw	a5,-36(s0)
+800014f4:	fcf42c23          	sw	a5,-40(s0)
 800014f8:	fe042783          	lw	a5,-32(s0)
-800014fc:	0047a783          	lw	a5,4(a5)
-80001500:	0007a783          	lw	a5,0(a5)
-80001504:	fcf42c23          	sw	a5,-40(s0)
-80001508:	fe042783          	lw	a5,-32(s0)
-8000150c:	0087a783          	lw	a5,8(a5)
-80001510:	fcf42a23          	sw	a5,-44(s0)
-80001514:	fe042783          	lw	a5,-32(s0)
-80001518:	0147a783          	lw	a5,20(a5)
-8000151c:	fef42623          	sw	a5,-20(s0)
-80001520:	fec42703          	lw	a4,-20(s0)
-80001524:	fbc42783          	lw	a5,-68(s0)
-80001528:	02f707b3          	mul	a5,a4,a5
-8000152c:	fef42423          	sw	a5,-24(s0)
-80001530:	fec42783          	lw	a5,-20(s0)
-80001534:	00079a63          	bnez	a5,80001548 <_vx_e_mat_mult+0x7c>
-80001538:	00100793          	li	a5,1
-8000153c:	fef42623          	sw	a5,-20(s0)
-80001540:	fbc42783          	lw	a5,-68(s0)
-80001544:	fef42423          	sw	a5,-24(s0)
-80001548:	fe042783          	lw	a5,-32(s0)
-8000154c:	00c7a783          	lw	a5,12(a5)
-80001550:	fcf42823          	sw	a5,-48(s0)
-80001554:	fe042223          	sw	zero,-28(s0)
-80001558:	0b00006f          	j	80001608 <_vx_e_mat_mult+0x13c>
-8000155c:	fb842703          	lw	a4,-72(s0)
-80001560:	fd042783          	lw	a5,-48(s0)
-80001564:	02f70733          	mul	a4,a4,a5
-80001568:	fe842783          	lw	a5,-24(s0)
-8000156c:	00f707b3          	add	a5,a4,a5
-80001570:	fcf42623          	sw	a5,-52(s0)
-80001574:	fe842703          	lw	a4,-24(s0)
-80001578:	fd042783          	lw	a5,-48(s0)
-8000157c:	00f737b3          	sltu	a5,a4,a5
-80001580:	0ff7f793          	andi	a5,a5,255
-80001584:	fcf42423          	sw	a5,-56(s0)
-80001588:	fc842783          	lw	a5,-56(s0)
-8000158c:	0017b793          	seqz	a5,a5
-80001590:	fcf403a3          	sb	a5,-57(s0)
-80001594:	fc744783          	lbu	a5,-57(s0)
-80001598:	00078f13          	mv	t5,a5
-8000159c:	800017b7          	lui	a5,0x80001
-800015a0:	5f478f93          	addi	t6,a5,1524 # 800015f4 <barrier_bool+0xfefd8330>
-800015a4:	000f206b          	0xf206b
-800015a8:	01ff707b          	0x1ff707b
-800015ac:	fcc42783          	lw	a5,-52(s0)
-800015b0:	00279793          	slli	a5,a5,0x2
-800015b4:	fdc42703          	lw	a4,-36(s0)
-800015b8:	00f707b3          	add	a5,a4,a5
-800015bc:	0007a683          	lw	a3,0(a5)
-800015c0:	fcc42783          	lw	a5,-52(s0)
-800015c4:	00279793          	slli	a5,a5,0x2
-800015c8:	fd442703          	lw	a4,-44(s0)
-800015cc:	00f707b3          	add	a5,a4,a5
-800015d0:	fd842703          	lw	a4,-40(s0)
-800015d4:	02e68733          	mul	a4,a3,a4
-800015d8:	00e7a023          	sw	a4,0(a5)
-800015dc:	fe842783          	lw	a5,-24(s0)
-800015e0:	00178793          	addi	a5,a5,1
-800015e4:	fef42423          	sw	a5,-24(s0)
-800015e8:	800017b7          	lui	a5,0x80001
-800015ec:	5f878e13          	addi	t3,a5,1528 # 800015f8 <barrier_bool+0xfefd8334>
-800015f0:	000e0067          	jr	t3
-800015f4:	00000013          	nop
-800015f8:	0000306b          	0x306b
-800015fc:	fe442783          	lw	a5,-28(s0)
-80001600:	00178793          	addi	a5,a5,1
-80001604:	fef42223          	sw	a5,-28(s0)
-80001608:	fe442783          	lw	a5,-28(s0)
-8000160c:	fec42703          	lw	a4,-20(s0)
-80001610:	f4e7e6e3          	bltu	a5,a4,8000155c <_vx_e_mat_mult+0x90>
-80001614:	00000013          	nop
-80001618:	04c12083          	lw	ra,76(sp)
-8000161c:	04812403          	lw	s0,72(sp)
-80001620:	05010113          	addi	sp,sp,80
-80001624:	00008067          	ret
+800014fc:	0087a783          	lw	a5,8(a5)
+80001500:	fcf42a23          	sw	a5,-44(s0)
+80001504:	fe042783          	lw	a5,-32(s0)
+80001508:	0147a783          	lw	a5,20(a5)
+8000150c:	fef42623          	sw	a5,-20(s0)
+80001510:	fec42703          	lw	a4,-20(s0)
+80001514:	fbc42783          	lw	a5,-68(s0)
+80001518:	02f707b3          	mul	a5,a4,a5
+8000151c:	fef42423          	sw	a5,-24(s0)
+80001520:	fec42783          	lw	a5,-20(s0)
+80001524:	00079a63          	bnez	a5,80001538 <_vx_e_mat_mult+0x7c>
+80001528:	00100793          	li	a5,1
+8000152c:	fef42623          	sw	a5,-20(s0)
+80001530:	fbc42783          	lw	a5,-68(s0)
+80001534:	fef42423          	sw	a5,-24(s0)
+80001538:	fe042783          	lw	a5,-32(s0)
+8000153c:	00c7a783          	lw	a5,12(a5)
+80001540:	fcf42823          	sw	a5,-48(s0)
+80001544:	fe042223          	sw	zero,-28(s0)
+80001548:	0b00006f          	j	800015f8 <_vx_e_mat_mult+0x13c>
+8000154c:	fb842703          	lw	a4,-72(s0)
+80001550:	fd042783          	lw	a5,-48(s0)
+80001554:	02f70733          	mul	a4,a4,a5
+80001558:	fe842783          	lw	a5,-24(s0)
+8000155c:	00f707b3          	add	a5,a4,a5
+80001560:	fcf42623          	sw	a5,-52(s0)
+80001564:	fe842703          	lw	a4,-24(s0)
+80001568:	fd042783          	lw	a5,-48(s0)
+8000156c:	00f737b3          	sltu	a5,a4,a5
+80001570:	0ff7f793          	andi	a5,a5,255
+80001574:	fcf42423          	sw	a5,-56(s0)
+80001578:	fc842783          	lw	a5,-56(s0)
+8000157c:	0017b793          	seqz	a5,a5
+80001580:	fcf403a3          	sb	a5,-57(s0)
+80001584:	fc744783          	lbu	a5,-57(s0)
+80001588:	00078f13          	mv	t5,a5
+8000158c:	800017b7          	lui	a5,0x80001
+80001590:	5e478f93          	addi	t6,a5,1508 # 800015e4 <barrier_bool+0xfefd8320>
+80001594:	000f206b          	0xf206b
+80001598:	01ff707b          	0x1ff707b
+8000159c:	fcc42783          	lw	a5,-52(s0)
+800015a0:	00279793          	slli	a5,a5,0x2
+800015a4:	fdc42703          	lw	a4,-36(s0)
+800015a8:	00f707b3          	add	a5,a4,a5
+800015ac:	0007a683          	lw	a3,0(a5)
+800015b0:	fcc42783          	lw	a5,-52(s0)
+800015b4:	00279793          	slli	a5,a5,0x2
+800015b8:	fd442703          	lw	a4,-44(s0)
+800015bc:	00f707b3          	add	a5,a4,a5
+800015c0:	fd842703          	lw	a4,-40(s0)
+800015c4:	02e68733          	mul	a4,a3,a4
+800015c8:	00e7a023          	sw	a4,0(a5)
+800015cc:	fe842783          	lw	a5,-24(s0)
+800015d0:	00178793          	addi	a5,a5,1
+800015d4:	fef42423          	sw	a5,-24(s0)
+800015d8:	800017b7          	lui	a5,0x80001
+800015dc:	5e878e13          	addi	t3,a5,1512 # 800015e8 <barrier_bool+0xfefd8324>
+800015e0:	000e0067          	jr	t3
+800015e4:	00000013          	nop
+800015e8:	0000306b          	0x306b
+800015ec:	fe442783          	lw	a5,-28(s0)
+800015f0:	00178793          	addi	a5,a5,1
+800015f4:	fef42223          	sw	a5,-28(s0)
+800015f8:	fe442783          	lw	a5,-28(s0)
+800015fc:	fec42703          	lw	a4,-20(s0)
+80001600:	f4e7e6e3          	bltu	a5,a4,8000154c <_vx_e_mat_mult+0x90>
+80001604:	00000013          	nop
+80001608:	04c12083          	lw	ra,76(sp)
+8000160c:	04812403          	lw	s0,72(sp)
+80001610:	05010113          	addi	sp,sp,80
+80001614:	00008067          	ret
 
-80001628 <sleep>:
-80001628:	fd010113          	addi	sp,sp,-48
-8000162c:	02812623          	sw	s0,44(sp)
-80001630:	03010413          	addi	s0,sp,48
-80001634:	fca42e23          	sw	a0,-36(s0)
-80001638:	fe042623          	sw	zero,-20(s0)
-8000163c:	0100006f          	j	8000164c <sleep+0x24>
-80001640:	fec42783          	lw	a5,-20(s0)
-80001644:	00178793          	addi	a5,a5,1
-80001648:	fef42623          	sw	a5,-20(s0)
-8000164c:	fec42703          	lw	a4,-20(s0)
-80001650:	fdc42783          	lw	a5,-36(s0)
-80001654:	fef746e3          	blt	a4,a5,80001640 <sleep+0x18>
-80001658:	00000013          	nop
-8000165c:	02c12403          	lw	s0,44(sp)
-80001660:	03010113          	addi	sp,sp,48
-80001664:	00008067          	ret
+80001618 <sleep>:
+80001618:	fd010113          	addi	sp,sp,-48
+8000161c:	02812623          	sw	s0,44(sp)
+80001620:	03010413          	addi	s0,sp,48
+80001624:	fca42e23          	sw	a0,-36(s0)
+80001628:	fe042623          	sw	zero,-20(s0)
+8000162c:	0100006f          	j	8000163c <sleep+0x24>
+80001630:	fec42783          	lw	a5,-20(s0)
+80001634:	00178793          	addi	a5,a5,1
+80001638:	fef42623          	sw	a5,-20(s0)
+8000163c:	fec42703          	lw	a4,-20(s0)
+80001640:	fdc42783          	lw	a5,-36(s0)
+80001644:	fef746e3          	blt	a4,a5,80001630 <sleep+0x18>
+80001648:	00000013          	nop
+8000164c:	02c12403          	lw	s0,44(sp)
+80001650:	03010113          	addi	sp,sp,48
+80001654:	00008067          	ret
 
-80001668 <barrier>:
-80001668:	fd010113          	addi	sp,sp,-48
-8000166c:	02112623          	sw	ra,44(sp)
-80001670:	02812423          	sw	s0,40(sp)
-80001674:	03010413          	addi	s0,sp,48
-80001678:	fca42e23          	sw	a0,-36(s0)
-8000167c:	fcb42c23          	sw	a1,-40(s0)
-80001680:	810267b7          	lui	a5,0x81026
-80001684:	1fc78713          	addi	a4,a5,508 # 810261fc <barrier_bool+0xffffcf38>
+80001658 <barrier>:
+80001658:	fd010113          	addi	sp,sp,-48
+8000165c:	02112623          	sw	ra,44(sp)
+80001660:	02812423          	sw	s0,40(sp)
+80001664:	03010413          	addi	s0,sp,48
+80001668:	fca42e23          	sw	a0,-36(s0)
+8000166c:	fcb42c23          	sw	a1,-40(s0)
+80001670:	810267b7          	lui	a5,0x81026
+80001674:	1fc78713          	addi	a4,a5,508 # 810261fc <barrier_bool+0xffffcf38>
+80001678:	fdc42783          	lw	a5,-36(s0)
+8000167c:	00f707b3          	add	a5,a4,a5
+80001680:	00100713          	li	a4,1
+80001684:	00e78023          	sb	a4,0(a5)
 80001688:	fdc42783          	lw	a5,-36(s0)
-8000168c:	00f707b3          	add	a5,a4,a5
-80001690:	00100713          	li	a4,1
-80001694:	00e78023          	sb	a4,0(a5)
-80001698:	fdc42783          	lw	a5,-36(s0)
-8000169c:	0c079063          	bnez	a5,8000175c <barrier+0xf4>
-800016a0:	fe0401a3          	sb	zero,-29(s0)
-800016a4:	fe042623          	sw	zero,-20(s0)
-800016a8:	0a80006f          	j	80001750 <barrier+0xe8>
-800016ac:	fe042623          	sw	zero,-20(s0)
-800016b0:	fe042423          	sw	zero,-24(s0)
-800016b4:	0340006f          	j	800016e8 <barrier+0x80>
-800016b8:	810267b7          	lui	a5,0x81026
-800016bc:	1fc78713          	addi	a4,a5,508 # 810261fc <barrier_bool+0xffffcf38>
-800016c0:	fe842783          	lw	a5,-24(s0)
-800016c4:	00f707b3          	add	a5,a4,a5
-800016c8:	0007c783          	lbu	a5,0(a5)
-800016cc:	00078863          	beqz	a5,800016dc <barrier+0x74>
-800016d0:	fec42783          	lw	a5,-20(s0)
-800016d4:	00178793          	addi	a5,a5,1
-800016d8:	fef42623          	sw	a5,-20(s0)
-800016dc:	fe842783          	lw	a5,-24(s0)
-800016e0:	00178793          	addi	a5,a5,1
-800016e4:	fef42423          	sw	a5,-24(s0)
-800016e8:	fe842703          	lw	a4,-24(s0)
-800016ec:	fd842783          	lw	a5,-40(s0)
-800016f0:	fcf744e3          	blt	a4,a5,800016b8 <barrier+0x50>
-800016f4:	fec42703          	lw	a4,-20(s0)
-800016f8:	fd842783          	lw	a5,-40(s0)
-800016fc:	04f71a63          	bne	a4,a5,80001750 <barrier+0xe8>
-80001700:	fe042223          	sw	zero,-28(s0)
-80001704:	0400006f          	j	80001744 <barrier+0xdc>
-80001708:	810267b7          	lui	a5,0x81026
-8000170c:	1fc78713          	addi	a4,a5,508 # 810261fc <barrier_bool+0xffffcf38>
-80001710:	fe442783          	lw	a5,-28(s0)
-80001714:	00f707b3          	add	a5,a4,a5
-80001718:	00078023          	sb	zero,0(a5)
-8000171c:	810297b7          	lui	a5,0x81029
-80001720:	00100713          	li	a4,1
-80001724:	2ce78223          	sb	a4,708(a5) # 810292c4 <barrier_bool+0x0>
-80001728:	04600513          	li	a0,70
-8000172c:	efdff0ef          	jal	ra,80001628 <sleep>
-80001730:	810297b7          	lui	a5,0x81029
-80001734:	2c078223          	sb	zero,708(a5) # 810292c4 <barrier_bool+0x0>
-80001738:	fe442783          	lw	a5,-28(s0)
-8000173c:	00178793          	addi	a5,a5,1
-80001740:	fef42223          	sw	a5,-28(s0)
-80001744:	fe442703          	lw	a4,-28(s0)
-80001748:	fd842783          	lw	a5,-40(s0)
-8000174c:	faf74ee3          	blt	a4,a5,80001708 <barrier+0xa0>
-80001750:	fe344783          	lbu	a5,-29(s0)
-80001754:	f4079ce3          	bnez	a5,800016ac <barrier+0x44>
-80001758:	0240006f          	j	8000177c <barrier+0x114>
-8000175c:	00000013          	nop
-80001760:	810297b7          	lui	a5,0x81029
-80001764:	2c47c783          	lbu	a5,708(a5) # 810292c4 <barrier_bool+0x0>
-80001768:	0017c793          	xori	a5,a5,1
-8000176c:	0ff7f793          	andi	a5,a5,255
-80001770:	fe0798e3          	bnez	a5,80001760 <barrier+0xf8>
-80001774:	06400513          	li	a0,100
-80001778:	eb1ff0ef          	jal	ra,80001628 <sleep>
-8000177c:	00000013          	nop
-80001780:	02c12083          	lw	ra,44(sp)
-80001784:	02812403          	lw	s0,40(sp)
-80001788:	03010113          	addi	sp,sp,48
-8000178c:	00008067          	ret
+8000168c:	0c079063          	bnez	a5,8000174c <barrier+0xf4>
+80001690:	fe0401a3          	sb	zero,-29(s0)
+80001694:	fe042623          	sw	zero,-20(s0)
+80001698:	0a80006f          	j	80001740 <barrier+0xe8>
+8000169c:	fe042623          	sw	zero,-20(s0)
+800016a0:	fe042423          	sw	zero,-24(s0)
+800016a4:	0340006f          	j	800016d8 <barrier+0x80>
+800016a8:	810267b7          	lui	a5,0x81026
+800016ac:	1fc78713          	addi	a4,a5,508 # 810261fc <barrier_bool+0xffffcf38>
+800016b0:	fe842783          	lw	a5,-24(s0)
+800016b4:	00f707b3          	add	a5,a4,a5
+800016b8:	0007c783          	lbu	a5,0(a5)
+800016bc:	00078863          	beqz	a5,800016cc <barrier+0x74>
+800016c0:	fec42783          	lw	a5,-20(s0)
+800016c4:	00178793          	addi	a5,a5,1
+800016c8:	fef42623          	sw	a5,-20(s0)
+800016cc:	fe842783          	lw	a5,-24(s0)
+800016d0:	00178793          	addi	a5,a5,1
+800016d4:	fef42423          	sw	a5,-24(s0)
+800016d8:	fe842703          	lw	a4,-24(s0)
+800016dc:	fd842783          	lw	a5,-40(s0)
+800016e0:	fcf744e3          	blt	a4,a5,800016a8 <barrier+0x50>
+800016e4:	fec42703          	lw	a4,-20(s0)
+800016e8:	fd842783          	lw	a5,-40(s0)
+800016ec:	04f71a63          	bne	a4,a5,80001740 <barrier+0xe8>
+800016f0:	fe042223          	sw	zero,-28(s0)
+800016f4:	0400006f          	j	80001734 <barrier+0xdc>
+800016f8:	810267b7          	lui	a5,0x81026
+800016fc:	1fc78713          	addi	a4,a5,508 # 810261fc <barrier_bool+0xffffcf38>
+80001700:	fe442783          	lw	a5,-28(s0)
+80001704:	00f707b3          	add	a5,a4,a5
+80001708:	00078023          	sb	zero,0(a5)
+8000170c:	810297b7          	lui	a5,0x81029
+80001710:	00100713          	li	a4,1
+80001714:	2ce78223          	sb	a4,708(a5) # 810292c4 <barrier_bool+0x0>
+80001718:	04600513          	li	a0,70
+8000171c:	efdff0ef          	jal	ra,80001618 <sleep>
+80001720:	810297b7          	lui	a5,0x81029
+80001724:	2c078223          	sb	zero,708(a5) # 810292c4 <barrier_bool+0x0>
+80001728:	fe442783          	lw	a5,-28(s0)
+8000172c:	00178793          	addi	a5,a5,1
+80001730:	fef42223          	sw	a5,-28(s0)
+80001734:	fe442703          	lw	a4,-28(s0)
+80001738:	fd842783          	lw	a5,-40(s0)
+8000173c:	faf74ee3          	blt	a4,a5,800016f8 <barrier+0xa0>
+80001740:	fe344783          	lbu	a5,-29(s0)
+80001744:	f4079ce3          	bnez	a5,8000169c <barrier+0x44>
+80001748:	0240006f          	j	8000176c <barrier+0x114>
+8000174c:	00000013          	nop
+80001750:	810297b7          	lui	a5,0x81029
+80001754:	2c47c783          	lbu	a5,708(a5) # 810292c4 <barrier_bool+0x0>
+80001758:	0017c793          	xori	a5,a5,1
+8000175c:	0ff7f793          	andi	a5,a5,255
+80001760:	fe0798e3          	bnez	a5,80001750 <barrier+0xf8>
+80001764:	06400513          	li	a0,100
+80001768:	eb1ff0ef          	jal	ra,80001618 <sleep>
+8000176c:	00000013          	nop
+80001770:	02c12083          	lw	ra,44(sp)
+80001774:	02812403          	lw	s0,40(sp)
+80001778:	03010113          	addi	sp,sp,48
+8000177c:	00008067          	ret
 
-80001790 <sc_time_stamp>:
-80001790:	ff010113          	addi	sp,sp,-16
-80001794:	00812623          	sw	s0,12(sp)
-80001798:	01010413          	addi	s0,sp,16
-8000179c:	00000793          	li	a5,0
-800017a0:	00000813          	li	a6,0
-800017a4:	00078513          	mv	a0,a5
-800017a8:	00080593          	mv	a1,a6
-800017ac:	00c12403          	lw	s0,12(sp)
-800017b0:	01010113          	addi	sp,sp,16
-800017b4:	00008067          	ret
+80001780 <sc_time_stamp>:
+80001780:	ff010113          	addi	sp,sp,-16
+80001784:	00812623          	sw	s0,12(sp)
+80001788:	01010413          	addi	s0,sp,16
+8000178c:	00000793          	li	a5,0
+80001790:	00000813          	li	a6,0
+80001794:	00078513          	mv	a0,a5
+80001798:	00080593          	mv	a1,a6
+8000179c:	00c12403          	lw	s0,12(sp)
+800017a0:	01010113          	addi	sp,sp,16
+800017a4:	00008067          	ret
 
-800017b8 <initialize_mats>:
-800017b8:	fe010113          	addi	sp,sp,-32
-800017bc:	00812e23          	sw	s0,28(sp)
-800017c0:	02010413          	addi	s0,sp,32
-800017c4:	fe042623          	sw	zero,-20(s0)
-800017c8:	0480006f          	j	80001810 <initialize_mats+0x58>
-800017cc:	810267b7          	lui	a5,0x81026
-800017d0:	fec42703          	lw	a4,-20(s0)
-800017d4:	00271713          	slli	a4,a4,0x2
-800017d8:	21c78793          	addi	a5,a5,540 # 8102621c <barrier_bool+0xffffcf58>
-800017dc:	00f707b3          	add	a5,a4,a5
-800017e0:	00300713          	li	a4,3
-800017e4:	00e7a023          	sw	a4,0(a5)
-800017e8:	810277b7          	lui	a5,0x81027
-800017ec:	fec42703          	lw	a4,-20(s0)
-800017f0:	00271713          	slli	a4,a4,0x2
-800017f4:	21c78793          	addi	a5,a5,540 # 8102721c <barrier_bool+0xffffdf58>
-800017f8:	00f707b3          	add	a5,a4,a5
-800017fc:	00200713          	li	a4,2
-80001800:	00e7a023          	sw	a4,0(a5)
-80001804:	fec42783          	lw	a5,-20(s0)
-80001808:	00178793          	addi	a5,a5,1
-8000180c:	fef42623          	sw	a5,-20(s0)
-80001810:	fec42703          	lw	a4,-20(s0)
-80001814:	0ff00793          	li	a5,255
-80001818:	fae7dae3          	bge	a5,a4,800017cc <initialize_mats+0x14>
-8000181c:	00000013          	nop
-80001820:	01c12403          	lw	s0,28(sp)
-80001824:	02010113          	addi	sp,sp,32
-80001828:	00008067          	ret
+800017a8 <initialize_mats>:
+800017a8:	fe010113          	addi	sp,sp,-32
+800017ac:	00812e23          	sw	s0,28(sp)
+800017b0:	02010413          	addi	s0,sp,32
+800017b4:	fe042623          	sw	zero,-20(s0)
+800017b8:	0480006f          	j	80001800 <initialize_mats+0x58>
+800017bc:	810267b7          	lui	a5,0x81026
+800017c0:	fec42703          	lw	a4,-20(s0)
+800017c4:	00271713          	slli	a4,a4,0x2
+800017c8:	21c78793          	addi	a5,a5,540 # 8102621c <barrier_bool+0xffffcf58>
+800017cc:	00f707b3          	add	a5,a4,a5
+800017d0:	00300713          	li	a4,3
+800017d4:	00e7a023          	sw	a4,0(a5)
+800017d8:	810277b7          	lui	a5,0x81027
+800017dc:	fec42703          	lw	a4,-20(s0)
+800017e0:	00271713          	slli	a4,a4,0x2
+800017e4:	21c78793          	addi	a5,a5,540 # 8102721c <barrier_bool+0xffffdf58>
+800017e8:	00f707b3          	add	a5,a4,a5
+800017ec:	00200713          	li	a4,2
+800017f0:	00e7a023          	sw	a4,0(a5)
+800017f4:	fec42783          	lw	a5,-20(s0)
+800017f8:	00178793          	addi	a5,a5,1
+800017fc:	fef42623          	sw	a5,-20(s0)
+80001800:	fec42703          	lw	a4,-20(s0)
+80001804:	0ff00793          	li	a5,255
+80001808:	fae7dae3          	bge	a5,a4,800017bc <initialize_mats+0x14>
+8000180c:	00000013          	nop
+80001810:	01c12403          	lw	s0,28(sp)
+80001814:	02010113          	addi	sp,sp,32
+80001818:	00008067          	ret
 
-8000182c <print_matrix>:
-8000182c:	fd010113          	addi	sp,sp,-48
-80001830:	02112623          	sw	ra,44(sp)
-80001834:	02812423          	sw	s0,40(sp)
-80001838:	03010413          	addi	s0,sp,48
-8000183c:	fca42e23          	sw	a0,-36(s0)
-80001840:	810007b7          	lui	a5,0x81000
-80001844:	11878513          	addi	a0,a5,280 # 81000118 <barrier_bool+0xfffd6e54>
-80001848:	f8dfe0ef          	jal	ra,800007d4 <vx_print_str>
-8000184c:	fe042623          	sw	zero,-20(s0)
-80001850:	0580006f          	j	800018a8 <print_matrix+0x7c>
-80001854:	fec42783          	lw	a5,-20(s0)
-80001858:	00078e63          	beqz	a5,80001874 <print_matrix+0x48>
-8000185c:	fec42783          	lw	a5,-20(s0)
-80001860:	00f7f793          	andi	a5,a5,15
-80001864:	00079863          	bnez	a5,80001874 <print_matrix+0x48>
-80001868:	810007b7          	lui	a5,0x81000
-8000186c:	13c78513          	addi	a0,a5,316 # 8100013c <barrier_bool+0xfffd6e78>
-80001870:	f65fe0ef          	jal	ra,800007d4 <vx_print_str>
-80001874:	fec42783          	lw	a5,-20(s0)
-80001878:	00279793          	slli	a5,a5,0x2
-8000187c:	fdc42703          	lw	a4,-36(s0)
-80001880:	00f707b3          	add	a5,a4,a5
-80001884:	0007a783          	lw	a5,0(a5)
-80001888:	00078513          	mv	a0,a5
-8000188c:	f85fe0ef          	jal	ra,80000810 <vx_print_hex>
-80001890:	810007b7          	lui	a5,0x81000
-80001894:	14078513          	addi	a0,a5,320 # 81000140 <barrier_bool+0xfffd6e7c>
-80001898:	f3dfe0ef          	jal	ra,800007d4 <vx_print_str>
-8000189c:	fec42783          	lw	a5,-20(s0)
-800018a0:	00178793          	addi	a5,a5,1
-800018a4:	fef42623          	sw	a5,-20(s0)
-800018a8:	fec42703          	lw	a4,-20(s0)
-800018ac:	0ff00793          	li	a5,255
-800018b0:	fae7d2e3          	bge	a5,a4,80001854 <print_matrix+0x28>
-800018b4:	810007b7          	lui	a5,0x81000
-800018b8:	14478513          	addi	a0,a5,324 # 81000144 <barrier_bool+0xfffd6e80>
-800018bc:	f19fe0ef          	jal	ra,800007d4 <vx_print_str>
-800018c0:	00000013          	nop
-800018c4:	02c12083          	lw	ra,44(sp)
-800018c8:	02812403          	lw	s0,40(sp)
-800018cc:	03010113          	addi	sp,sp,48
-800018d0:	00008067          	ret
+8000181c <print_matrix>:
+8000181c:	fd010113          	addi	sp,sp,-48
+80001820:	02112623          	sw	ra,44(sp)
+80001824:	02812423          	sw	s0,40(sp)
+80001828:	03010413          	addi	s0,sp,48
+8000182c:	fca42e23          	sw	a0,-36(s0)
+80001830:	810007b7          	lui	a5,0x81000
+80001834:	11878513          	addi	a0,a5,280 # 81000118 <barrier_bool+0xfffd6e54>
+80001838:	f8dfe0ef          	jal	ra,800007c4 <vx_print_str>
+8000183c:	fe042623          	sw	zero,-20(s0)
+80001840:	0580006f          	j	80001898 <print_matrix+0x7c>
+80001844:	fec42783          	lw	a5,-20(s0)
+80001848:	00078e63          	beqz	a5,80001864 <print_matrix+0x48>
+8000184c:	fec42783          	lw	a5,-20(s0)
+80001850:	00f7f793          	andi	a5,a5,15
+80001854:	00079863          	bnez	a5,80001864 <print_matrix+0x48>
+80001858:	810007b7          	lui	a5,0x81000
+8000185c:	13c78513          	addi	a0,a5,316 # 8100013c <barrier_bool+0xfffd6e78>
+80001860:	f65fe0ef          	jal	ra,800007c4 <vx_print_str>
+80001864:	fec42783          	lw	a5,-20(s0)
+80001868:	00279793          	slli	a5,a5,0x2
+8000186c:	fdc42703          	lw	a4,-36(s0)
+80001870:	00f707b3          	add	a5,a4,a5
+80001874:	0007a783          	lw	a5,0(a5)
+80001878:	00078513          	mv	a0,a5
+8000187c:	f85fe0ef          	jal	ra,80000800 <vx_print_hex>
+80001880:	810007b7          	lui	a5,0x81000
+80001884:	14078513          	addi	a0,a5,320 # 81000140 <barrier_bool+0xfffd6e7c>
+80001888:	f3dfe0ef          	jal	ra,800007c4 <vx_print_str>
+8000188c:	fec42783          	lw	a5,-20(s0)
+80001890:	00178793          	addi	a5,a5,1
+80001894:	fef42623          	sw	a5,-20(s0)
+80001898:	fec42703          	lw	a4,-20(s0)
+8000189c:	0ff00793          	li	a5,255
+800018a0:	fae7d2e3          	bge	a5,a4,80001844 <print_matrix+0x28>
+800018a4:	810007b7          	lui	a5,0x81000
+800018a8:	14478513          	addi	a0,a5,324 # 81000144 <barrier_bool+0xfffd6e80>
+800018ac:	f19fe0ef          	jal	ra,800007c4 <vx_print_str>
+800018b0:	00000013          	nop
+800018b4:	02c12083          	lw	ra,44(sp)
+800018b8:	02812403          	lw	s0,40(sp)
+800018bc:	03010113          	addi	sp,sp,48
+800018c0:	00008067          	ret
 
-800018d4 <main>:
-800018d4:	ff010113          	addi	sp,sp,-16
-800018d8:	00112623          	sw	ra,12(sp)
-800018dc:	00812423          	sw	s0,8(sp)
-800018e0:	01010413          	addi	s0,sp,16
-800018e4:	ed5ff0ef          	jal	ra,800017b8 <initialize_mats>
-800018e8:	810267b7          	lui	a5,0x81026
-800018ec:	21c78513          	addi	a0,a5,540 # 8102621c <barrier_bool+0xffffcf58>
-800018f0:	f3dff0ef          	jal	ra,8000182c <print_matrix>
-800018f4:	00000793          	li	a5,0
-800018f8:	00078513          	mv	a0,a5
-800018fc:	00c12083          	lw	ra,12(sp)
-80001900:	00812403          	lw	s0,8(sp)
-80001904:	01010113          	addi	sp,sp,16
-80001908:	00008067          	ret
+800018c4 <main>:
+800018c4:	ff010113          	addi	sp,sp,-16
+800018c8:	00112623          	sw	ra,12(sp)
+800018cc:	00812423          	sw	s0,8(sp)
+800018d0:	01010413          	addi	s0,sp,16
+800018d4:	ed5ff0ef          	jal	ra,800017a8 <initialize_mats>
+800018d8:	810267b7          	lui	a5,0x81026
+800018dc:	21c78513          	addi	a0,a5,540 # 8102621c <barrier_bool+0xffffcf58>
+800018e0:	f3dff0ef          	jal	ra,8000181c <print_matrix>
+800018e4:	00000793          	li	a5,0
+800018e8:	00078513          	mv	a0,a5
+800018ec:	00c12083          	lw	ra,12(sp)
+800018f0:	00812403          	lw	s0,8(sp)
+800018f4:	01010113          	addi	sp,sp,16
+800018f8:	00008067          	ret
 
 Disassembly of section .rodata:
 
@@ -1732,7 +1728,7 @@ Disassembly of section .rodata:
 8100002a:	0000                	unimp
 8100002c:	0062                	c.slli	zero,0x18
 8100002e:	0000                	unimp
-81000030:	00000063          	beqz	zero,81000030 <main+0xffe75c>
+81000030:	00000063          	beqz	zero,81000030 <main+0xffe76c>
 81000034:	0064                	addi	s1,sp,12
 81000036:	0000                	unimp
 81000038:	0065                	c.nop	25
@@ -1769,7 +1765,7 @@ Disassembly of section .rodata:
 8100007e:	0000                	unimp
 81000080:	0062                	c.slli	zero,0x18
 81000082:	0000                	unimp
-81000084:	00000063          	beqz	zero,81000084 <main+0xffe7b0>
+81000084:	00000063          	beqz	zero,81000084 <main+0xffe7c0>
 81000088:	0064                	addi	s1,sp,12
 8100008a:	0000                	unimp
 8100008c:	0065                	c.nop	25
@@ -1800,7 +1796,7 @@ Disassembly of section .rodata:
 810000c2:	0000                	unimp
 810000c4:	0062                	c.slli	zero,0x18
 810000c6:	0000                	unimp
-810000c8:	00000063          	beqz	zero,810000c8 <main+0xffe7f4>
+810000c8:	00000063          	beqz	zero,810000c8 <main+0xffe804>
 810000cc:	0064                	addi	s1,sp,12
 810000ce:	0000                	unimp
 810000d0:	0065                	c.nop	25
@@ -1829,7 +1825,7 @@ Disassembly of section .rodata:
 81000102:	0000                	unimp
 81000104:	0062                	c.slli	zero,0x18
 81000106:	0000                	unimp
-81000108:	00000063          	beqz	zero,81000108 <main+0xffe834>
+81000108:	00000063          	beqz	zero,81000108 <main+0xffe844>
 8100010c:	0064                	addi	s1,sp,12
 8100010e:	0000                	unimp
 81000110:	0065                	c.nop	25
diff --git a/kernel/vortex_test.elf b/kernel/vortex_test.elf
index b186b4f3..a17eedbb 100755
Binary files a/kernel/vortex_test.elf and b/kernel/vortex_test.elf differ
diff --git a/kernel/vortex_test.hex b/kernel/vortex_test.hex
index 5fa7a125..ac16634b 100644
--- a/kernel/vortex_test.hex
+++ b/kernel/vortex_test.hex
@@ -1,405 +1,404 @@
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diff --git a/kernel/vx_os/vx_back/vx_back.s b/kernel/vx_os/vx_back/vx_back.s
index 49597a5c..9f9ae284 100644
--- a/kernel/vx_os/vx_back/vx_back.s
+++ b/kernel/vx_os/vx_back/vx_back.s
@@ -6,20 +6,21 @@
 .type _start, @function
 .global _start
 _start:
-    # li  a0, 7
-    # sw  a0, 0(zero)
-    # lw  a1, 0(zero)
-    # ecall
-    li a0, 8          # Num Warps
-    csrw 0x20, a0     # Setting the number of available warps 
-    li a0, 4          # Num Threads
-    csrw 0x21, a0     # Setting the number of available threads
-    csrw mhartid,zero
-    csrw misa,zero
-    lui  sp, 0x7ffff
-    # jal  vx_before_main
-    jal  main
+    li a0, 4
+    .word 0x0005006b    # tmc a0
+    csrr a1, 0x20       # read thread IDs
+    csrr a2, 0x21       # read warp   IDs
     ecall
+    # li a0, 8          # Num Warps
+    # csrw 0x20, a0     # Setting the number of available warps 
+    # li a0, 4          # Num Threads
+    # csrw 0x21, a0     # Setting the number of available threads
+    # csrw mhartid,zero
+    # csrw misa,zero
+    # lui  sp, 0x7ffff
+    # # jal  vx_before_main
+    # jal  main
+    # ecall
 
 # Hi:
 #     li a2, 7
diff --git a/rtl/VX_alu.v b/rtl/VX_alu.v
index ce06e29a..3b308297 100644
--- a/rtl/VX_alu.v
+++ b/rtl/VX_alu.v
@@ -8,7 +8,6 @@ module VX_alu(
 	input wire[31:0]  in_itype_immed,
 	input wire[19:0]  in_upper_immed,
 	input wire[4:0]   in_alu_op,
-	input wire[31:0]  in_csr_data, // done
 	input wire[31:0]  in_curr_PC,
 	output reg[31:0]  out_alu_result
 	);
@@ -60,9 +59,6 @@ module VX_alu(
 				`SUBU:       out_alu_result = (ALU_in1 >= ALU_in2) ? 32'h0 : 32'hffffffff;
 				`LUI_ALU:    out_alu_result = upper_immed;
 				`AUIPC_ALU:  out_alu_result = $signed(in_curr_PC) + $signed(upper_immed);
-				`CSR_ALU_RW: out_alu_result = in_csr_data;
-				`CSR_ALU_RS: out_alu_result = in_csr_data;
-				`CSR_ALU_RC: out_alu_result = in_csr_data;
 				`MUL:        begin out_alu_result = mult_signed_result[31:0]; end
 				`MULH:       out_alu_result = mult_signed_result[63:32];
 				`MULHSU:     out_alu_result = mult_signed_un_result[63:32];
diff --git a/rtl/VX_back_end.v b/rtl/VX_back_end.v
index 4e6e173b..d36f2332 100644
--- a/rtl/VX_back_end.v
+++ b/rtl/VX_back_end.v
@@ -3,7 +3,6 @@ module VX_back_end (
 	input wire reset, 
 	input wire schedule_delay,
 
-	input wire[31:0]          csr_decode_csr_data,
 	output wire               out_mem_delay,
 
 	VX_jal_response_inter     VX_jal_rsp,
@@ -16,20 +15,11 @@ module VX_back_end (
 	VX_warp_ctl_inter         VX_warp_ctl,
 
 	VX_dcache_response_inter  VX_dcache_rsp,
-	VX_dcache_request_inter   VX_dcache_req,
+	VX_dcache_request_inter   VX_dcache_req
 
-
-	VX_csr_write_request_inter VX_csr_w_req
 );
 
 
-wire[11:0]      execute_csr_address;
-wire            execute_is_csr;
-reg[31:0]       execute_csr_result;
-wire            execute_jal;
-wire[31:0]      execute_jal_dest;
-
-
 VX_wb_inter             VX_writeback_temp();
 assign VX_writeback_inter.wb           = VX_writeback_temp.wb;
 assign VX_writeback_inter.rd           = VX_writeback_temp.rd;
@@ -63,6 +53,10 @@ VX_inst_exec_wb_inter    VX_inst_exec_wb();
 // GPU unit input
 VX_gpu_inst_req_inter    VX_gpu_inst_req();
 
+// CSR unit inputs
+VX_csr_req_inter         VX_csr_req();
+VX_csr_wb_inter          VX_csr_wb();
+
 VX_gpr_stage VX_gpr_stage(
 	.clk               (clk),
 	.schedule_delay    (schedule_delay),
@@ -78,7 +72,8 @@ VX_inst_multiplex VX_inst_mult(
 	.VX_gpr_data     (VX_gpr_data),
 	.VX_exec_unit_req(VX_exec_unit_req),
 	.VX_lsu_req      (VX_lsu_req),
-	.VX_gpu_inst_req (VX_gpu_inst_req)
+	.VX_gpu_inst_req (VX_gpu_inst_req),
+	.VX_csr_req      (VX_csr_req)
 	);
 
 
@@ -97,12 +92,7 @@ VX_execute_unit VX_execUnit(
 	.VX_exec_unit_req(VX_exec_unit_req),
 	.VX_inst_exec_wb (VX_inst_exec_wb),
 	.VX_jal_rsp      (VX_jal_rsp),
-	.VX_branch_rsp   (VX_branch_rsp),
-
-	.in_csr_data     (csr_decode_csr_data),
-	.out_csr_address (VX_csr_w_req.csr_address),
-	.out_is_csr      (VX_csr_w_req.is_csr),
-	.out_csr_result  (VX_csr_w_req.csr_result)
+	.VX_branch_rsp   (VX_branch_rsp)
 	);
 
 
@@ -111,9 +101,15 @@ VX_gpgpu_inst VX_gpgpu_inst(
 	.VX_warp_ctl    (VX_warp_ctl)
 	);
 
+VX_csr_wrapper VX_csr_wrapper(
+	.VX_csr_req(VX_csr_req),
+	.VX_csr_wb (VX_csr_wb)
+	);
+
 VX_writeback VX_wb(
 	.VX_mem_wb         (VX_mem_wb),
 	.VX_inst_exec_wb   (VX_inst_exec_wb),
+	.VX_csr_wb         (VX_csr_wb),
 
 	.VX_writeback_inter(VX_writeback_temp)
 	);
diff --git a/rtl/VX_csr_wrapper.v b/rtl/VX_csr_wrapper.v
new file mode 100644
index 00000000..32b52d09
--- /dev/null
+++ b/rtl/VX_csr_wrapper.v
@@ -0,0 +1,35 @@
+module VX_csr_wrapper (
+	VX_csr_req_inter VX_csr_req,
+
+	VX_csr_wb_inter  VX_csr_wb
+);
+
+
+	wire[`NT_M1:0][31:0] thread_ids;
+	wire[`NT_M1:0][31:0] warp_ids;
+
+	genvar cur_t;
+	for (cur_t = 0; cur_t < `NT; cur_t = cur_t + 1) begin
+		assign thread_ids[cur_t] = cur_t;
+	end
+
+	genvar cur_tw;
+	for (cur_tw = 0; cur_tw < `NT; cur_tw = cur_tw + 1) begin
+		assign warp_ids[cur_tw] = {{(31-`NW_M1){1'b0}}, VX_csr_req.warp_num};
+	end
+
+
+	assign VX_csr_wb.valid    = VX_csr_req.valid;
+	assign VX_csr_wb.warp_num = VX_csr_req.warp_num;
+	assign VX_csr_wb.rd       = VX_csr_req.rd;
+	assign VX_csr_wb.wb       = VX_csr_req.wb;
+
+
+	wire thread_select        = VX_csr_req.csr_address == 12'h20;
+	wire warp_select          = VX_csr_req.csr_address == 12'h21;
+
+	assign VX_csr_wb.csr_result = thread_select ? thread_ids :
+						          warp_select   ? warp_ids   :
+						          0;
+
+endmodule
\ No newline at end of file
diff --git a/rtl/VX_decode.v b/rtl/VX_decode.v
index 2dec804f..88fc9884 100644
--- a/rtl/VX_decode.v
+++ b/rtl/VX_decode.v
@@ -126,8 +126,7 @@ module VX_decode(
 
 
 		assign VX_frE_to_bckE_req.csr_immed = is_csr_immed;
-
-
+		assign VX_frE_to_bckE_req.is_csr    = is_csr;
 
 
 		assign VX_frE_to_bckE_req.wb       = (is_jal || is_jalr || is_e_inst) ? `WB_JAL :
diff --git a/rtl/VX_execute_unit.v b/rtl/VX_execute_unit.v
index 20172229..e1cc8b97 100644
--- a/rtl/VX_execute_unit.v
+++ b/rtl/VX_execute_unit.v
@@ -10,12 +10,7 @@ module VX_execute_unit (
 		// JAL Response
 	VX_jal_response_inter    VX_jal_rsp,
 		// Branch Response
-	VX_branch_response_inter VX_branch_rsp,
-
-	input  wire[31:0]        in_csr_data,
-	output wire[11:0]        out_csr_address,
-	output wire              out_is_csr,
-	output reg[31:0]         out_csr_result
+	VX_branch_response_inter VX_branch_rsp
 );
 
 
@@ -27,7 +22,6 @@ module VX_execute_unit (
 		wire[31:0]           in_itype_immed;
 		wire[2:0]            in_branch_type;
 		wire[19:0]           in_upper_immed;
-		wire[31:0]           in_csr_mask;
 		wire                 in_jal;
 		wire[31:0]           in_jal_offset;
 		wire[31:0]           in_curr_PC;
@@ -39,7 +33,6 @@ module VX_execute_unit (
 		assign in_itype_immed = VX_exec_unit_req.itype_immed;
 		assign in_branch_type = VX_exec_unit_req.branch_type;
 		assign in_upper_immed = VX_exec_unit_req.upper_immed;
-		assign in_csr_mask    = VX_exec_unit_req.csr_mask;
 		assign in_jal         = VX_exec_unit_req.jal;
 		assign in_jal_offset  = VX_exec_unit_req.jal_offset;
 		assign in_curr_PC     = VX_exec_unit_req.curr_PC;
@@ -58,7 +51,6 @@ module VX_execute_unit (
 						.in_itype_immed(in_itype_immed),
 						.in_upper_immed(in_upper_immed),
 						.in_alu_op     (in_alu_op),
-						.in_csr_data   (in_csr_data),
 						.in_curr_PC    (in_curr_PC),
 						.out_alu_result(alu_result[index_out_reg])
 					);
@@ -110,18 +102,18 @@ module VX_execute_unit (
 		assign VX_branch_rsp.branch_dest     = $signed(VX_exec_unit_req.curr_PC) + ($signed(VX_exec_unit_req.itype_immed) << 1); // itype_immed = branch_offset
 
 
-		always @(*) begin
-			case(in_alu_op)
-				`CSR_ALU_RW: out_csr_result = in_csr_mask;
-				`CSR_ALU_RS: out_csr_result = in_csr_data | in_csr_mask;
-				`CSR_ALU_RC: out_csr_result = in_csr_data & (32'hFFFFFFFF - in_csr_mask);
-				default:     out_csr_result = 32'hdeadbeef;
-			endcase
+		// always @(*) begin
+		// 	case(in_alu_op)
+		// 		`CSR_ALU_RW: out_csr_result = in_csr_mask;
+		// 		`CSR_ALU_RS: out_csr_result = in_csr_data | in_csr_mask;
+		// 		`CSR_ALU_RC: out_csr_result = in_csr_data & (32'hFFFFFFFF - in_csr_mask);
+		// 		default:     out_csr_result = 32'hdeadbeef;
+		// 	endcase
 		
-		end
+		// end
 
 
-		assign out_is_csr        = VX_exec_unit_req.is_csr;
-		assign out_csr_address   = VX_exec_unit_req.csr_address;
+		// assign out_is_csr        = VX_exec_unit_req.is_csr;
+		// assign out_csr_address   = VX_exec_unit_req.csr_address;
 
 endmodule
\ No newline at end of file
diff --git a/rtl/VX_fetch.v b/rtl/VX_fetch.v
index f7ae63fe..6ef5539b 100644
--- a/rtl/VX_fetch.v
+++ b/rtl/VX_fetch.v
@@ -42,6 +42,12 @@ module VX_fetch (
 			.wstall         (VX_wstall.wstall),
 			.wstall_warp_num(VX_wstall.warp_num),
 
+			// Split
+			.is_split        (VX_warp_ctl.is_split),
+			.split_new_mask  (VX_warp_ctl.split_new_mask),
+			.split_later_mask(VX_warp_ctl.split_later_mask),
+			.split_save_pc   (VX_warp_ctl.split_save_pc),
+
 			// JAL
 			.jal            (VX_jal_rsp.jal),
 			.jal_dest       (VX_jal_rsp.jal_dest),
diff --git a/rtl/VX_front_end.v b/rtl/VX_front_end.v
index ea97d04d..ce6f7716 100644
--- a/rtl/VX_front_end.v
+++ b/rtl/VX_front_end.v
@@ -16,8 +16,6 @@ module VX_front_end (
 
 	VX_frE_to_bckE_req_inter  VX_bckE_req,
 
-
-	output wire[11:0] decode_csr_address,
 	output wire fetch_ebreak
 );
 
@@ -81,10 +79,6 @@ VX_d_e_reg vx_d_e_reg(
 		.VX_bckE_req       (VX_bckE_req)
 	);
 
-
-assign decode_csr_address = VX_frE_to_bckE_req.csr_address;
-
-
 endmodule
 
 
diff --git a/rtl/VX_generic_stack.v b/rtl/VX_generic_stack.v
new file mode 100644
index 00000000..de5f0529
--- /dev/null
+++ b/rtl/VX_generic_stack.v
@@ -0,0 +1,40 @@
+module VX_generic_stack
+	#(
+		parameter WIDTH = 40,
+		parameter DEPTH = 2
+	)
+	(
+	input  wire              clk,
+	input  wire              reset,
+	input  wire              push,
+	input  wire              pop,
+	input  wire[WIDTH - 1:0] d,
+	output reg [WIDTH - 1:0] q,
+	);
+
+
+	reg [DEPTH - 1:0] ptr;
+	reg [WIDTH - 1:0] stack [0:(1 << DEPTH) - 1];
+
+	always @(posedge clk) begin
+		if (reset)
+			ptr <= 0;
+		else if (push)
+			ptr <= ptr + 1;
+		else if (pop)
+			ptr <= ptr - 1;
+	end
+
+	always @(posedge clk) begin
+		if (push) begin
+			if(push)
+				stack[ptr] <= q;
+		end
+	end
+
+	always @(*) begin
+		if (pop)
+			q <= stack[ptr - 1];
+	end
+
+endmodule
\ No newline at end of file
diff --git a/rtl/VX_gpgpu_inst.v b/rtl/VX_gpgpu_inst.v
index 6f83f5b6..694bc630 100644
--- a/rtl/VX_gpgpu_inst.v
+++ b/rtl/VX_gpgpu_inst.v
@@ -26,6 +26,32 @@ module VX_gpgpu_inst (
 	assign VX_warp_ctl.wspawn_pc = 0;
 
 
+	wire[`NT_M1:0] split_new_use_mask;
+	wire[`NT_M1:0] split_new_later_mask;
+
+	// VX_gpu_inst_req.pc
+	genvar curr_s_t;
+	for (curr_s_t = 0; curr_s_t < `NT; curr_s_t=curr_s_t+1) begin
+		wire curr_bool = (VX_gpu_inst_req.a_reg_data == 32'b1);
+
+		assign split_new_use_mask[curr_s_t]   = VX_gpu_inst_req.valid[curr_s_t] & (curr_bool);
+		assign split_new_later_mask[curr_s_t] = VX_gpu_inst_req.valid[curr_s_t] & (!curr_bool);
+	end
+
+	reg[$clog2(`NT)-1:0] num_valids;
+	integer z;
+	always @(*) begin
+		num_valids = 0;
+		for (z = 0; z < `NT; z=z+1) begin
+			if (VX_gpu_inst_req.valid) num_valids = num_valids + 1
+		end
+	end
+	
+	assign VX_warp_ctl.is_split         = (VX_gpu_inst_req.is_split) && (num_valids > 1);
+	assign VX_warp_ctl.split_new_mask   = split_new_use_mask;
+	assign VX_warp_ctl.split_later_mask = split_new_later_mask;
+	assign VX_warp_ctl.split_save_pc    = VX_gpu_inst_req.pc_next;
+
 	// VX_gpu_inst_req.is_wspawn
 	// VX_gpu_inst_req.is_split
 	// VX_gpu_inst_req.is_barrier
diff --git a/rtl/VX_gpr.v b/rtl/VX_gpr.v
index 96592049..c3ac3e84 100644
--- a/rtl/VX_gpr.v
+++ b/rtl/VX_gpr.v
@@ -15,112 +15,112 @@ module VX_gpr (
 
 	assign write_enable = valid_write_request && ((VX_writeback_inter.wb != 0) && (VX_writeback_inter.rd != 5'h0));
 	
-	// byte_enabled_simple_dual_port_ram first_ram(
-	// 	.we    (write_enable),
-	// 	.clk   (clk),
-	// 	.waddr (VX_writeback_inter.rd),
-	// 	.raddr1(VX_gpr_read.rs1),
-	// 	.raddr2(VX_gpr_read.rs2),
-	// 	.be    (VX_writeback_inter.wb_valid),
-	// 	.wdata (VX_writeback_inter.write_data),
-	// 	.q1    (out_a_reg_data),
-	// 	.q2    (out_b_reg_data)
-	// );
+	byte_enabled_simple_dual_port_ram first_ram(
+		.we    (write_enable),
+		.clk   (clk),
+		.waddr (VX_writeback_inter.rd),
+		.raddr1(VX_gpr_read.rs1),
+		.raddr2(VX_gpr_read.rs2),
+		.be    (VX_writeback_inter.wb_valid),
+		.wdata (VX_writeback_inter.write_data),
+		.q1    (out_a_reg_data),
+		.q2    (out_b_reg_data)
+	);
 
 
-	wire[`NT_M1:0][31:0] write_bit_mask;
+	// wire[`NT_M1:0][31:0] write_bit_mask;
 
-	genvar curr_t;
-	for (curr_t = 0; curr_t < `NT; curr_t=curr_t+1) begin
-		wire local_write = write_enable & VX_writeback_inter.wb_valid[curr_t];
-		assign write_bit_mask[curr_t] = {32{~local_write}};
-	end
+	// genvar curr_t;
+	// for (curr_t = 0; curr_t < `NT; curr_t=curr_t+1) begin
+	// 	wire local_write = write_enable & VX_writeback_inter.wb_valid[curr_t];
+	// 	assign write_bit_mask[curr_t] = {32{~local_write}};
+	// end
 
-	wire going_to_write = write_enable & (|VX_writeback_inter.wb_valid);
+	// wire going_to_write = write_enable & (|VX_writeback_inter.wb_valid);
 
 
-	wire cenb    = !going_to_write;
+	// wire cenb    = !going_to_write;
 
-	wire cena_1  = (VX_gpr_read.rs1 == 0);
-	wire cena_2  = (VX_gpr_read.rs2 == 0);
+	// wire cena_1  = (VX_gpr_read.rs1 == 0);
+	// wire cena_2  = (VX_gpr_read.rs2 == 0);
 
-	// wire[127:0] write_bit_mask = {{32{~(VX_writeback_inter.wb_valid[3])}}, {32{~(VX_writeback_inter.wb_valid[2])}}, {32{~(VX_writeback_inter.wb_valid[1])}}, {32{~(VX_writeback_inter.wb_valid[0])}}};
-	/* verilator lint_off PINCONNECTEMPTY */
-   rf2_32x128_wm1 first_ram (
-         .CENYA(),
-         .AYA(),
-         .CENYB(),
-         .WENYB(),
-         .AYB(),
-         .QA(out_a_reg_data),
-         .SOA(),
-         .SOB(),
-         .CLKA(clk),
-         .CENA(cena_1),
-         .AA(VX_gpr_read.rs1),
-         .CLKB(clk),
-         .CENB(cenb),
-         .WENB(write_bit_mask),
-         .AB(VX_writeback_inter.rd),
-         .DB(VX_writeback_inter.write_data),
-         .EMAA(3'b011),
-         .EMASA(1'b0),
-         .EMAB(3'b011),
-         .TENA(1'b1),
-         .TCENA(1'b0),
-         .TAA(5'b0),
-         .TENB(1'b1),
-         .TCENB(1'b0),
-         .TWENB(128'b0),
-         .TAB(5'b0),
-         .TDB(128'b0),
-         .RET1N(1'b1),
-         .SIA(2'b0),
-         .SEA(1'b0),
-         .DFTRAMBYP(1'b0),
-         .SIB(2'b0),
-         .SEB(1'b0),
-         .COLLDISN(1'b1)
-   );
-   /* verilator lint_on PINCONNECTEMPTY */
+	// // wire[127:0] write_bit_mask = {{32{~(VX_writeback_inter.wb_valid[3])}}, {32{~(VX_writeback_inter.wb_valid[2])}}, {32{~(VX_writeback_inter.wb_valid[1])}}, {32{~(VX_writeback_inter.wb_valid[0])}}};
+	// /* verilator lint_off PINCONNECTEMPTY */
+ //   rf2_32x128_wm1 first_ram (
+ //         .CENYA(),
+ //         .AYA(),
+ //         .CENYB(),
+ //         .WENYB(),
+ //         .AYB(),
+ //         .QA(out_a_reg_data),
+ //         .SOA(),
+ //         .SOB(),
+ //         .CLKA(clk),
+ //         .CENA(cena_1),
+ //         .AA(VX_gpr_read.rs1),
+ //         .CLKB(clk),
+ //         .CENB(cenb),
+ //         .WENB(write_bit_mask),
+ //         .AB(VX_writeback_inter.rd),
+ //         .DB(VX_writeback_inter.write_data),
+ //         .EMAA(3'b011),
+ //         .EMASA(1'b0),
+ //         .EMAB(3'b011),
+ //         .TENA(1'b1),
+ //         .TCENA(1'b0),
+ //         .TAA(5'b0),
+ //         .TENB(1'b1),
+ //         .TCENB(1'b0),
+ //         .TWENB(128'b0),
+ //         .TAB(5'b0),
+ //         .TDB(128'b0),
+ //         .RET1N(1'b1),
+ //         .SIA(2'b0),
+ //         .SEA(1'b0),
+ //         .DFTRAMBYP(1'b0),
+ //         .SIB(2'b0),
+ //         .SEB(1'b0),
+ //         .COLLDISN(1'b1)
+ //   );
+ //   /* verilator lint_on PINCONNECTEMPTY */
 
-   /* verilator lint_off PINCONNECTEMPTY */
-   rf2_32x128_wm1 second_ram (
-         .CENYA(),
-         .AYA(),
-         .CENYB(),
-         .WENYB(),
-         .AYB(),
-         .QA(out_b_reg_data),
-         .SOA(),
-         .SOB(),
-         .CLKA(clk),
-         .CENA(cena_2),
-         .AA(VX_gpr_read.rs2),
-         .CLKB(clk),
-         .CENB(cenb),
-         .WENB(write_bit_mask),
-         .AB(VX_writeback_inter.rd),
-         .DB(VX_writeback_inter.write_data),
-         .EMAA(3'b011),
-         .EMASA(1'b0),
-         .EMAB(3'b011),
-         .TENA(1'b1),
-         .TCENA(1'b0),
-         .TAA(5'b0),
-         .TENB(1'b1),
-         .TCENB(1'b0),
-         .TWENB(128'b0),
-         .TAB(5'b0),
-         .TDB(128'b0),
-         .RET1N(1'b1),
-         .SIA(2'b0),
-         .SEA(1'b0),
-         .DFTRAMBYP(1'b0),
-         .SIB(2'b0),
-         .SEB(1'b0),
-         .COLLDISN(1'b1)
-   );
-   /* verilator lint_on PINCONNECTEMPTY */
+ //   /* verilator lint_off PINCONNECTEMPTY */
+ //   rf2_32x128_wm1 second_ram (
+ //         .CENYA(),
+ //         .AYA(),
+ //         .CENYB(),
+ //         .WENYB(),
+ //         .AYB(),
+ //         .QA(out_b_reg_data),
+ //         .SOA(),
+ //         .SOB(),
+ //         .CLKA(clk),
+ //         .CENA(cena_2),
+ //         .AA(VX_gpr_read.rs2),
+ //         .CLKB(clk),
+ //         .CENB(cenb),
+ //         .WENB(write_bit_mask),
+ //         .AB(VX_writeback_inter.rd),
+ //         .DB(VX_writeback_inter.write_data),
+ //         .EMAA(3'b011),
+ //         .EMASA(1'b0),
+ //         .EMAB(3'b011),
+ //         .TENA(1'b1),
+ //         .TCENA(1'b0),
+ //         .TAA(5'b0),
+ //         .TENB(1'b1),
+ //         .TCENB(1'b0),
+ //         .TWENB(128'b0),
+ //         .TAB(5'b0),
+ //         .TDB(128'b0),
+ //         .RET1N(1'b1),
+ //         .SIA(2'b0),
+ //         .SEA(1'b0),
+ //         .DFTRAMBYP(1'b0),
+ //         .SIB(2'b0),
+ //         .SEB(1'b0),
+ //         .COLLDISN(1'b1)
+ //   );
+ //   /* verilator lint_on PINCONNECTEMPTY */
 
 endmodule
diff --git a/rtl/VX_inst_multiplex.v b/rtl/VX_inst_multiplex.v
index 7a9f2c24..e774a423 100644
--- a/rtl/VX_inst_multiplex.v
+++ b/rtl/VX_inst_multiplex.v
@@ -6,21 +6,24 @@ module VX_inst_multiplex (
 	// Outputs
 	VX_exec_unit_req_inter   VX_exec_unit_req,
 	VX_lsu_req_inter         VX_lsu_req,
-	VX_gpu_inst_req_inter    VX_gpu_inst_req
-	
+	VX_gpu_inst_req_inter    VX_gpu_inst_req,
+	VX_csr_req_inter         VX_csr_req
 );
 
 	wire[`NT_M1:0] is_mem_mask;
 	wire[`NT_M1:0] is_gpu_mask;
+	wire[`NT_M1:0] is_csr_mask;
 
 	wire is_mem = (VX_bckE_req.mem_write != `NO_MEM_WRITE) || (VX_bckE_req.mem_read != `NO_MEM_READ);
 	wire is_gpu = (VX_bckE_req.is_wspawn || VX_bckE_req.is_tmc || VX_bckE_req.is_barrier || VX_bckE_req.is_split);
+	wire is_csr = VX_bckE_req.is_csr;
 	// wire is_gpu = 0;
 
 	genvar currT;
 	for (currT = 0; currT < `NT; currT = currT + 1) begin
 		assign is_mem_mask[currT] = is_mem;
 		assign is_gpu_mask[currT] = is_gpu;
+		assign is_csr_mask[currT] = is_csr;
 	end
 
 	// LSU Unit
@@ -38,7 +41,7 @@ module VX_inst_multiplex (
 
 
 	// Execute Unit
-	assign VX_exec_unit_req.valid       = VX_bckE_req.valid & (~is_mem_mask & ~is_gpu_mask);
+	assign VX_exec_unit_req.valid       = VX_bckE_req.valid & (~is_mem_mask & ~is_gpu_mask & ~is_csr_mask);
 	assign VX_exec_unit_req.warp_num    = VX_bckE_req.warp_num;
 	assign VX_exec_unit_req.curr_PC     = VX_bckE_req.curr_PC;
 	assign VX_exec_unit_req.PC_next     = VX_bckE_req.PC_next;
@@ -57,10 +60,6 @@ module VX_inst_multiplex (
 	assign VX_exec_unit_req.jal         = VX_bckE_req.jal;
 	assign VX_exec_unit_req.jal_offset  = VX_bckE_req.jal_offset;
 	assign VX_exec_unit_req.ebreak      = VX_bckE_req.ebreak;
-	assign VX_exec_unit_req.is_csr      = VX_bckE_req.is_csr;
-	assign VX_exec_unit_req.csr_address = VX_bckE_req.csr_address;
-	assign VX_exec_unit_req.csr_immed   = VX_bckE_req.csr_immed;
-	assign VX_exec_unit_req.csr_mask    = VX_bckE_req.csr_mask;
 
 
 	// GPR Req
@@ -72,6 +71,18 @@ module VX_inst_multiplex (
 	assign VX_gpu_inst_req.is_barrier  = VX_bckE_req.is_barrier;
 	assign VX_gpu_inst_req.a_reg_data  = VX_gpr_data.a_reg_data;
 	assign VX_gpu_inst_req.rd2         = VX_gpr_data.b_reg_data[0];
+	assign VX_gpu_inst_req.pc_next     = VX_bckE_req.PC_next;
+
+
+	// CSR Req
+	assign VX_csr_req.valid           = VX_bckE_req.valid & is_csr_mask;
+	assign VX_csr_req.warp_num        = VX_bckE_req.warp_num;
+	assign VX_csr_req.rd              = VX_bckE_req.rd;
+	assign VX_csr_req.wb              = VX_bckE_req.wb;
+	assign VX_csr_req.is_csr          = VX_bckE_req.is_csr;
+	assign VX_csr_req.csr_address     = VX_bckE_req.csr_address;
+	assign VX_csr_req.csr_immed       = VX_bckE_req.csr_immed;
+	assign VX_csr_req.csr_mask        = VX_bckE_req.csr_mask;
 
 endmodule
 
diff --git a/rtl/VX_warp_scheduler.v b/rtl/VX_warp_scheduler.v
index c5d6dc6b..40e99b5b 100644
--- a/rtl/VX_warp_scheduler.v
+++ b/rtl/VX_warp_scheduler.v
@@ -20,6 +20,12 @@ module VX_warp_scheduler (
 	input  wire           wstall,
 	input  wire[`NW_M1:0] wstall_warp_num,
 
+	// Split
+	input wire           is_split,
+	input wire[`NT_M1:0] split_new_mask,
+	input wire[`NT_M1:0] split_later_mask,
+	input wire[31:0]     split_save_pc,	
+
 	// JAL
 	input wire           jal,
 	input wire[31:0]     jal_dest,
diff --git a/rtl/VX_writeback.v b/rtl/VX_writeback.v
index 2d0e2b6d..f12d9c42 100644
--- a/rtl/VX_writeback.v
+++ b/rtl/VX_writeback.v
@@ -7,6 +7,8 @@ module VX_writeback (
 		VX_inst_mem_wb_inter     VX_mem_wb,
 		// EXEC Unit WB info
 		VX_inst_exec_wb_inter    VX_inst_exec_wb,
+		// CSR Unit WB info
+		VX_csr_wb_inter          VX_csr_wb,
 
 		// Actual WB to GPR
 		VX_wb_inter              VX_writeback_inter
@@ -16,66 +18,34 @@ module VX_writeback (
 
 		wire exec_wb = (VX_inst_exec_wb.wb != 0) && (|VX_inst_exec_wb.wb_valid);
 		wire mem_wb  = (VX_mem_wb.wb       != 0) && (|VX_mem_wb.wb_valid);
+		wire csr_wb  = (VX_csr_wb.wb       != 0) && (|VX_csr_wb.valid);
 
 
 		assign VX_writeback_inter.write_data  = exec_wb ? VX_inst_exec_wb.alu_result :
 		                                        mem_wb  ? VX_mem_wb.loaded_data      :
+		                                        csr_wb  ? VX_csr_wb.csr_result       :
 		                                        0;
 
 
 		assign VX_writeback_inter.wb_valid    = exec_wb ? VX_inst_exec_wb.wb_valid :
 		                                        mem_wb  ? VX_mem_wb.wb_valid       :
+		                                        csr_wb  ? VX_csr_wb.valid          :
 		                                        0;                             
 
 		assign VX_writeback_inter.rd          = exec_wb ? VX_inst_exec_wb.rd :
 		                                        mem_wb  ? VX_mem_wb.rd       :
+		                                        csr_wb  ? VX_csr_wb.rd       :
 		                                        0;
 
 		assign VX_writeback_inter.wb          = exec_wb ? VX_inst_exec_wb.wb :
 		                                        mem_wb  ? VX_mem_wb.wb       :
+		                                        csr_wb  ? VX_csr_wb.wb       :
 		                                        0;   
 
 		assign VX_writeback_inter.wb_warp_num = exec_wb ? VX_inst_exec_wb.wb_warp_num :
 		                                        mem_wb  ? VX_mem_wb.wb_warp_num       :
+		                                        csr_wb  ? VX_csr_wb.warp_num          :
 		                                        0;    		
 
-		// wire[`NT_M1:0][31:0] in_alu_result = VX_mw_wb.alu_result;
-		// wire[`NT_M1:0][31:0] in_mem_result = VX_mw_wb.mem_result;
-		// wire[4:0]            in_rd         = VX_mw_wb.rd;
-		// wire[1:0]            in_wb         = VX_mw_wb.wb;
-		// wire[31:0]           in_PC_next    = VX_mw_wb.PC_next;
-		// wire[`NT_M1:0]       in_valid      = VX_mw_wb.valid;
-		// wire [`NW_M1:0]      in_warp_num   = VX_mw_wb.warp_num;
-
-		// wire is_jal;
-		// wire uses_alu;
-
-		// wire[`NT_M1:0][31:0] out_pc_data;
-
-
-		// genvar i;
-		// generate
-		// 	for (i = 0; i < `NT; i=i+1)
-		// 	begin
-		// 		assign out_pc_data[i] = in_PC_next;
-		// 	end
-		// endgenerate
-
-		// // assign out_pc_data[0] = in_PC_next;
-
-		// // assign out_pc_data[1] = in_PC_next;
-
-		// assign is_jal   = in_wb == `WB_JAL;
-		// assign uses_alu = in_wb == `WB_ALU;
-
-		// assign VX_writeback_inter.write_data = is_jal ? out_pc_data :
-		// 								uses_alu ? in_alu_result :
-		// 											in_mem_result;
-
-		// assign VX_writeback_inter.wb_valid    = in_valid;
-		// assign VX_writeback_inter.rd          = in_rd;
-		// assign VX_writeback_inter.wb          = in_wb;
-		// assign VX_writeback_inter.wb_warp_num = in_warp_num;
-
 
 endmodule // VX_writeback
\ No newline at end of file
diff --git a/rtl/Vortex.v b/rtl/Vortex.v
index 2d4c7914..f965a3ff 100644
--- a/rtl/Vortex.v
+++ b/rtl/Vortex.v
@@ -51,9 +51,7 @@ VX_branch_response_inter      VX_branch_rsp();      // Branch Resolution to Fetc
 VX_jal_response_inter         VX_jal_rsp();         // Jump resolution to Fetch
 
 // CSR Buses
-VX_csr_write_request_inter VX_csr_w_req();
-wire[31:0]                 csr_decode_csr_data;
-wire[11:0]                 decode_csr_address;
+// VX_csr_write_request_inter VX_csr_w_req();
 
 
 VX_warp_ctl_inter        VX_warp_ctl();
@@ -68,7 +66,6 @@ VX_front_end vx_front_end(
 	.reset               (reset),
 	.VX_warp_ctl         (VX_warp_ctl),
 	.VX_bckE_req         (VX_bckE_req),
-	.decode_csr_address  (decode_csr_address),
 	.schedule_delay      (schedule_delay),
 	.icache_response_fe  (icache_response_fe),
 	.icache_request_fe   (icache_request_fe),
@@ -91,24 +88,22 @@ VX_back_end vx_back_end(
 	.schedule_delay      (schedule_delay),
 	.VX_warp_ctl         (VX_warp_ctl),
 	.VX_bckE_req         (VX_bckE_req),
-	.csr_decode_csr_data (csr_decode_csr_data),
 	.VX_jal_rsp          (VX_jal_rsp),
 	.VX_branch_rsp       (VX_branch_rsp),
 	.VX_dcache_rsp       (VX_dcache_rsp),
 	.VX_dcache_req       (VX_dcache_req),
-	.VX_csr_w_req        (VX_csr_w_req),
 	.VX_writeback_inter  (VX_writeback_inter),
 	.out_mem_delay       (memory_delay)
 	);
 
-VX_csr_handler vx_csr_handler(
-		.clk                  (clk),
-		.in_decode_csr_address(decode_csr_address),
-		.VX_csr_w_req         (VX_csr_w_req),
-		.in_wb_valid          (VX_writeback_inter.wb_valid[0]),
+// VX_csr_handler vx_csr_handler(
+// 		.clk                  (clk),
+// 		.in_decode_csr_address(decode_csr_address),
+// 		.VX_csr_w_req         (VX_csr_w_req),
+// 		.in_wb_valid          (VX_writeback_inter.wb_valid[0]),
 
-		.out_decode_csr_data  (csr_decode_csr_data)
-	);
+// 		.out_decode_csr_data  (csr_decode_csr_data)
+// 	);
 
 
 
diff --git a/rtl/interfaces/VX_csr_req_inter.v b/rtl/interfaces/VX_csr_req_inter.v
new file mode 100644
index 00000000..c8daf257
--- /dev/null
+++ b/rtl/interfaces/VX_csr_req_inter.v
@@ -0,0 +1,24 @@
+
+`include "../VX_define.v"
+
+`ifndef VX_CSR_REQ
+
+`define VX_CSR_REQ
+
+interface VX_csr_req_inter ();
+
+	wire[`NT_M1:0] valid;
+	wire[`NW_M1:0] warp_num;
+	wire[4:0]      rd;
+	wire[1:0]      wb;
+
+	wire           is_csr;
+	wire[11:0]     csr_address;
+	wire           csr_immed;
+	wire[31:0]     csr_mask;
+
+
+endinterface
+
+
+`endif
\ No newline at end of file
diff --git a/rtl/interfaces/VX_csr_wb_inter.v b/rtl/interfaces/VX_csr_wb_inter.v
new file mode 100644
index 00000000..d8389cdb
--- /dev/null
+++ b/rtl/interfaces/VX_csr_wb_inter.v
@@ -0,0 +1,21 @@
+
+`include "../VX_define.v"
+
+`ifndef VX_CSR_WB_REQ
+
+`define VX_CSR_WB_REQ
+
+interface VX_csr_wb_inter ();
+
+	wire[`NT_M1:0]        valid;
+	wire[`NW_M1:0]        warp_num;
+	wire[4:0]             rd;
+	wire[1:0]             wb;
+	
+	wire[`NT_M1:0][31:0]  csr_result;
+
+
+endinterface
+
+
+`endif
\ No newline at end of file
diff --git a/rtl/interfaces/VX_csr_write_request_inter.v b/rtl/interfaces/VX_csr_write_request_inter.v
deleted file mode 100644
index 99a76e7e..00000000
--- a/rtl/interfaces/VX_csr_write_request_inter.v
+++ /dev/null
@@ -1,18 +0,0 @@
-
-`include "../VX_define.v"
-
-`ifndef VX_CSR_W_REQ
-
-`define VX_CSR_W_REQ
-
-interface VX_csr_write_request_inter ();
-
-		wire        is_csr;
-		wire[11:0]  csr_address;
-		wire[31:0]  csr_result;
-
-
-endinterface
-
-
-`endif
\ No newline at end of file
diff --git a/rtl/interfaces/VX_gpu_inst_req_inter.v b/rtl/interfaces/VX_gpu_inst_req_inter.v
index 01793b2b..66b4c191 100644
--- a/rtl/interfaces/VX_gpu_inst_req_inter.v
+++ b/rtl/interfaces/VX_gpu_inst_req_inter.v
@@ -13,6 +13,8 @@ interface VX_gpu_inst_req_inter();
 	wire                 is_split; 
 	wire                 is_barrier;
 
+	wire                 pc_next;
+
 	wire[`NT_M1:0][31:0] a_reg_data;
 	wire[31:0]           rd2;
 
diff --git a/rtl/interfaces/VX_warp_ctl_inter.v b/rtl/interfaces/VX_warp_ctl_inter.v
index 9908384e..a25d7aa0 100644
--- a/rtl/interfaces/VX_warp_ctl_inter.v
+++ b/rtl/interfaces/VX_warp_ctl_inter.v
@@ -16,6 +16,13 @@ interface VX_warp_ctl_inter ();
 
 	wire           ebreak;
 
+
+	wire           is_split;
+	wire[`NT_M1:0] split_new_mask;
+	wire[`NT_M1:0] split_later_mask;
+	wire[31:0]     split_save_pc;
+
+
 endinterface
 
 
diff --git a/rtl/results.txt b/rtl/results.txt
index e3d4ce87..ff40d42b 100644
--- a/rtl/results.txt
+++ b/rtl/results.txt
@@ -1,7 +1,7 @@
-# Dynamic Instructions: 15
-# of total cycles:      28
+# Dynamic Instructions: 12
+# of total cycles:      25
 # of forwarding stalls: 0
 # of branch stalls:     0
-# CPI:                  1.86667
-# time to simulate:     6.95313e-310 milliseconds
+# CPI:                  2.08333
+# time to simulate:     6.95312e-310 milliseconds
 # GRADE:                Failed on test: 4294967295
diff --git a/syn/syn.tcl b/syn/syn.tcl
index bbd4ef0f..be8d09a1 100755
--- a/syn/syn.tcl
+++ b/syn/syn.tcl
@@ -3,7 +3,7 @@ set link_library		[concat * sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_
 set symbol_library		{}
 set target_library		[concat sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c.db]
 
-set verilog_files 	[ list VX_gpgpu_inst.v VX_gpu_inst_req_inter.v VX_wstall_inter.v VX_inst_exec_wb_inter.v VX_lsu.v VX_execute_unit.v VX_lsu_addr_gen.v VX_inst_multiplex.v VX_exec_unit_req_inter.v VX_lsu_req_inter.v VX_alu.v VX_back_end.v VX_gpr_stage.v VX_gpr_data_inter.v VX_csr_handler.v VX_decode.v VX_define.v VX_scheduler.v VX_fetch.v VX_front_end.v VX_generic_register.v VX_gpr.v VX_gpr_wrapper.v VX_one_counter.v VX_priority_encoder.v VX_warp.v VX_warp_scheduler.v VX_writeback.v Vortex.v byte_enabled_simple_dual_port_ram.v VX_branch_response_inter.v VX_csr_write_request_inter.v VX_dcache_request_inter.v VX_dcache_response_inter.v VX_frE_to_bckE_req_inter.v VX_gpr_clone_inter.v VX_gpr_jal_inter.v VX_gpr_read_inter.v VX_gpr_wspawn_inter.v VX_icache_request_inter.v VX_icache_response_inter.v VX_inst_mem_wb_inter.v VX_inst_meta_inter.v VX_jal_response_inter.v VX_mem_req_inter.v VX_mw_wb_inter.v VX_warp_ctl_inter.v VX_wb_inter.v VX_d_e_reg.v VX_f_d_reg.v \
+set verilog_files 	[ list VX_csr_wrapper.v VX_csr_req_inter.v VX_csr_wb_inter.v  VX_gpgpu_inst.v VX_gpu_inst_req_inter.v VX_wstall_inter.v VX_inst_exec_wb_inter.v VX_lsu.v VX_execute_unit.v VX_lsu_addr_gen.v VX_inst_multiplex.v VX_exec_unit_req_inter.v VX_lsu_req_inter.v VX_alu.v VX_back_end.v VX_gpr_stage.v VX_gpr_data_inter.v VX_csr_handler.v VX_decode.v VX_define.v VX_scheduler.v VX_fetch.v VX_front_end.v VX_generic_register.v VX_gpr.v VX_gpr_wrapper.v VX_one_counter.v VX_priority_encoder.v VX_warp.v VX_warp_scheduler.v VX_writeback.v Vortex.v byte_enabled_simple_dual_port_ram.v VX_branch_response_inter.v VX_dcache_request_inter.v VX_dcache_response_inter.v VX_frE_to_bckE_req_inter.v VX_gpr_clone_inter.v VX_gpr_jal_inter.v VX_gpr_read_inter.v VX_gpr_wspawn_inter.v VX_icache_request_inter.v VX_icache_response_inter.v VX_inst_mem_wb_inter.v VX_inst_meta_inter.v VX_jal_response_inter.v VX_mem_req_inter.v VX_mw_wb_inter.v VX_warp_ctl_inter.v VX_wb_inter.v VX_d_e_reg.v VX_f_d_reg.v \
 					]
 
 analyze -format sverilog $verilog_files