wu-arch/vortex
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

minor updates

Browse Source
This commit is contained in:
Blaise Tine
2021-01-17 12:50:07 -08:00
parent a69ba5ad7b
commit 98945df5ae
2 changed files with 20 additions and 16 deletions
Download Patch File Download Diff File Expand all files Collapse all files

13
hw/rtl/VX_decode.v
View File

@@ -305,8 +305,7 @@ module VX_decode #(
/////////////////////////////////////////////////////////////////////////// ///////////////////////////////////////////////////////////////////////////
assign decode_if.valid = ifetch_rsp_if.valid assign decode_if.valid = ifetch_rsp_if.valid;
&& (decode_if.ex_type != `EX_NOP); // skip noop
assign decode_if.wid = ifetch_rsp_if.wid; assign decode_if.wid = ifetch_rsp_if.wid;
assign decode_if.tmask = ifetch_rsp_if.tmask; assign decode_if.tmask = ifetch_rsp_if.tmask;
@@ -348,10 +347,12 @@ module VX_decode #(
assign decode_if.rs3 = rs3; assign decode_if.rs3 = rs3;
`endif `endif
assign decode_if.used_regs = ((`NUM_REGS)'(use_rd) << decode_if.rd) wire is_nop = (decode_if.ex_type == `EX_NOP);
| ((`NUM_REGS)'(use_rs1) << decode_if.rs1)
| ((`NUM_REGS)'(use_rs2) << decode_if.rs2) assign decode_if.used_regs = ((`NUM_REGS)'(use_rd && !is_nop) << decode_if.rd)
| ((`NUM_REGS)'(use_rs3) << decode_if.rs3); | ((`NUM_REGS)'(use_rs1 && !is_nop) << decode_if.rs1)
| ((`NUM_REGS)'(use_rs2 && !is_nop) << decode_if.rs2)
| ((`NUM_REGS)'(use_rs3 && !is_nop) << decode_if.rs3);
assign decode_if.imm = (is_lui || is_auipc) ? {upper_imm, 12'(0)} : assign decode_if.imm = (is_lui || is_auipc) ? {upper_imm, 12'(0)} :
(is_jal || is_jalr || is_jals) ? jalx_offset : (is_jal || is_jalr || is_jals) ? jalx_offset :

23
hw/rtl/VX_instr_demux.v
View File

@@ -145,15 +145,18 @@ module VX_instr_demux (
); );
// can take next request? // can take next request?
assign execute_if.ready = (alu_req_ready && (execute_if.ex_type == `EX_ALU)) reg ready_r;
|| (lsu_req_ready && (execute_if.ex_type == `EX_LSU)) always @(*) begin
|| (csr_req_ready && (execute_if.ex_type == `EX_CSR)) case (execute_if.ex_type)
`ifdef EXT_M_ENABLE `EX_ALU: ready_r = alu_req_ready;
|| (mul_req_ready && (execute_if.ex_type == `EX_MUL)) `EX_LSU: ready_r = lsu_req_ready;
`endif `EX_CSR: ready_r = csr_req_ready;
`ifdef EXT_F_ENABLE `EX_MUL: ready_r = mul_req_ready;
|| (fpu_req_ready && (execute_if.ex_type == `EX_FPU)) `EX_FPU: ready_r = fpu_req_ready;
`endif `EX_GPU: ready_r = gpu_req_ready;
|| (gpu_req_ready && (execute_if.ex_type == `EX_GPU)); default: ready_r = 1'b1; // ignore NOPs
endcase
end
assign execute_if.ready = ready_r;
endmodule endmodule