cache optimization - moved read requests to stage1 and eliminating stage3
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@@ -204,10 +204,7 @@ module VX_cluster #(
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.dram_rsp_valid (dram_rsp_valid),
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.dram_rsp_tag (dram_rsp_tag),
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.dram_rsp_data (dram_rsp_data),
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.dram_rsp_ready (dram_rsp_ready),
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// Miss status
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`UNUSED_PIN (miss_vec)
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.dram_rsp_ready (dram_rsp_ready)
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);
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end else begin
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