From b7af8c3f34f7e7222eb3a7b194cd858a904fe855 Mon Sep 17 00:00:00 2001
From: felsabbagh3 <felsabbagh3@gatech.edu>
Date: Tue, 22 Oct 2019 05:03:47 -0400
Subject: [PATCH] Integrated Shared Memory

---
 kernel/vortex_test.dump                       | 3215 ++++++++---------
 kernel/vortex_test.elf                        |  Bin 15636 -> 15636 bytes
 kernel/vortex_test.hex                        |  800 ++--
 kernel/vx_os/vx_back/vx_back.s                |   28 +-
 .../cln28hpc/rf2_32x128_wm1/rf2_32x128_wm1.v  |    4 +-
 .../rf2_128x128_wm1/rf2_128x128_wm1.v         |    8 +-
 .../rf2_256x128_wm1/rf2_256x128_wm1.v         |    8 +-
 .../cln28hpm/rf2_256x19_wm0/rf2_256x19_wm0.v  |    8 +-
 .../cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.v  |    8 +-
 rtl/Makefile                                  |    7 +-
 rtl/VX_dmem_controller.v                      |   51 +
 rtl/VX_gpr.v                                  |   39 -
 rtl/VX_lsu.v                                  |    2 +-
 rtl/Vortex.v                                  |   32 +-
 rtl/interfaces/VX_dcache_request_inter.v      |   10 +-
 rtl/interfaces/VX_dcache_response_inter.v     |    3 +-
 rtl/results.txt                               |    8 +-
 rtl/shared_memory/VX_bank_valids.v            |   36 +
 rtl/shared_memory/VX_priority_encoder_sm.v    |   88 +
 rtl/shared_memory/VX_set_bit.v                |   21 +
 rtl/shared_memory/VX_shared_memory.v          |  135 +
 rtl/shared_memory/VX_shared_memory_block.v    |   81 +
 syn/syn.tcl                                   |    2 +-
 23 files changed, 2493 insertions(+), 2101 deletions(-)
 create mode 100644 rtl/VX_dmem_controller.v
 create mode 100644 rtl/shared_memory/VX_bank_valids.v
 create mode 100644 rtl/shared_memory/VX_priority_encoder_sm.v
 create mode 100644 rtl/shared_memory/VX_set_bit.v
 create mode 100644 rtl/shared_memory/VX_shared_memory.v
 create mode 100644 rtl/shared_memory/VX_shared_memory_block.v

diff --git a/kernel/vortex_test.dump b/kernel/vortex_test.dump
index d20ce978..d20e551b 100644
--- a/kernel/vortex_test.dump
+++ b/kernel/vortex_test.dump
@@ -5,1708 +5,1705 @@ vortex_test.elf:     file format elf32-littleriscv
 Disassembly of section .text:
 
 80000000 <_start>:
-80000000:	00800513          	li	a0,8
-80000004:	02051073          	csrw	0x20,a0
-80000008:	00400513          	li	a0,4
-8000000c:	02151073          	csrw	0x21,a0
-80000010:	f1401073          	csrw	mhartid,zero
-80000014:	30101073          	csrw	misa,zero
-80000018:	7ffff137          	lui	sp,0x7ffff
-8000001c:	0bd010ef          	jal	ra,800018d8 <main>
-80000020:	00000513          	li	a0,0
-80000024:	0005006b          	0x5006b
+80000000:	ff003537          	lui	a0,0xff003
+80000004:	30050513          	addi	a0,a0,768 # ff003300 <barrier_bool+0x7dfda03c>
+80000008:	00700593          	li	a1,7
+8000000c:	00b52223          	sw	a1,4(a0)
+80000010:	00452603          	lw	a2,4(a0)
+80000014:	00000513          	li	a0,0
+80000018:	0005006b          	0x5006b
 
-80000028 <vx_createThreads>:
-80000028:	00068b93          	mv	s7,a3
-8000002c:	00070d13          	mv	s10,a4
-80000030:	00010f13          	mv	t5,sp
-80000034:	00050393          	mv	t2,a0
+8000001c <vx_createThreads>:
+8000001c:	00068b93          	mv	s7,a3
+80000020:	00070d13          	mv	s10,a4
+80000024:	00010f13          	mv	t5,sp
+80000028:	00050393          	mv	t2,a0
 
-80000038 <loop_init>:
-80000038:	00100513          	li	a0,1
+8000002c <loop_init>:
+8000002c:	00100513          	li	a0,1
 
-8000003c <loop_cond>:
-8000003c:	00755c63          	bge	a0,t2,80000054 <loop_done>
+80000030 <loop_cond>:
+80000030:	00755c63          	bge	a0,t2,80000048 <loop_done>
 
-80000040 <loop_body>:
-80000040:	80010113          	addi	sp,sp,-2048 # 7fffe800 <SIZE+0x7fffe7ce>
-80000044:	00050313          	mv	t1,a0
-80000048:	0003506b          	0x3506b
+80000034 <loop_body>:
+80000034:	80010113          	addi	sp,sp,-2048
+80000038:	00050313          	mv	t1,a0
+8000003c:	0003506b          	0x3506b
 
-8000004c <loop_inc>:
-8000004c:	00150513          	addi	a0,a0,1
-80000050:	fedff06f          	j	8000003c <loop_cond>
+80000040 <loop_inc>:
+80000040:	00150513          	addi	a0,a0,1
+80000044:	fedff06f          	j	80000030 <loop_cond>
 
-80000054 <loop_done>:
+80000048 <loop_done>:
+80000048:	00000013          	nop
+8000004c:	00000013          	nop
+80000050:	00000013          	nop
 80000054:	00000013          	nop
 80000058:	00000013          	nop
 8000005c:	00000013          	nop
-80000060:	00000013          	nop
-80000064:	00000013          	nop
-80000068:	00000013          	nop
-8000006c:	000f0113          	mv	sp,t5
-80000070:	00000513          	li	a0,0
-80000074:	00060f93          	mv	t6,a2
-80000078:	00038d93          	mv	s11,t2
+80000060:	000f0113          	mv	sp,t5
+80000064:	00000513          	li	a0,0
+80000068:	00060f93          	mv	t6,a2
+8000006c:	00038d93          	mv	s11,t2
+80000070:	00000013          	nop
+80000074:	00000013          	nop
+80000078:	00000013          	nop
 8000007c:	00000013          	nop
 80000080:	00000013          	nop
 80000084:	00000013          	nop
 80000088:	00000013          	nop
 8000008c:	00000013          	nop
-80000090:	00000013          	nop
+80000090:	01bfe0eb          	0x1bfe0eb
 80000094:	00000013          	nop
 80000098:	00000013          	nop
-8000009c:	01bfe0eb          	0x1bfe0eb
+8000009c:	00000013          	nop
 800000a0:	00000013          	nop
 800000a4:	00000013          	nop
 800000a8:	00000013          	nop
-800000ac:	00000013          	nop
-800000b0:	00000013          	nop
-800000b4:	00000013          	nop
-800000b8:	00000517          	auipc	a0,0x0
-800000bc:	1b450513          	addi	a0,a0,436 # 8000026c <vx_reschedule_warps>
-800000c0:	0005406b          	0x5406b
+800000ac:	00000517          	auipc	a0,0x0
+800000b0:	1b450513          	addi	a0,a0,436 # 80000260 <vx_reschedule_warps>
+800000b4:	0005406b          	0x5406b
 
-800000c4 <vx_wspawn>:
-800000c4:	00000317          	auipc	t1,0x0
-800000c8:	f6430313          	addi	t1,t1,-156 # 80000028 <vx_createThreads>
-800000cc:	0003006b          	0x3006b
-800000d0:	00008067          	ret
+800000b8 <vx_wspawn>:
+800000b8:	00000317          	auipc	t1,0x0
+800000bc:	f6430313          	addi	t1,t1,-156 # 8000001c <vx_createThreads>
+800000c0:	0003006b          	0x3006b
+800000c4:	00008067          	ret
 
-800000d4 <vx_save_context>:
-800000d4:	01000217          	auipc	tp,0x1000
-800000d8:	23c20213          	addi	tp,tp,572 # 81000310 <context>
-800000dc:	00022023          	sw	zero,0(tp) # 0 <A_WARPS-0x7>
-800000e0:	00122223          	sw	ra,4(tp) # 4 <A_WARPS-0x3>
-800000e4:	00222423          	sw	sp,8(tp) # 8 <A_WARPS+0x1>
-800000e8:	00322623          	sw	gp,12(tp) # c <A_WARPS+0x5>
-800000ec:	00422823          	sw	tp,16(tp) # 10 <A_WARPS+0x9>
-800000f0:	00522a23          	sw	t0,20(tp) # 14 <A_WARPS+0xd>
-800000f4:	00622c23          	sw	t1,24(tp) # 18 <A_WARPS+0x11>
-800000f8:	00722e23          	sw	t2,28(tp) # 1c <A_WARPS+0x15>
-800000fc:	02822023          	sw	s0,32(tp) # 20 <A_WARPS+0x19>
-80000100:	02922223          	sw	s1,36(tp) # 24 <A_WARPS+0x1d>
-80000104:	02a22423          	sw	a0,40(tp) # 28 <A_WARPS+0x21>
-80000108:	02b22623          	sw	a1,44(tp) # 2c <A_WARPS+0x25>
-8000010c:	02c22823          	sw	a2,48(tp) # 30 <A_WARPS+0x29>
-80000110:	02d22a23          	sw	a3,52(tp) # 34 <SIZE+0x2>
-80000114:	02e22c23          	sw	a4,56(tp) # 38 <SIZE+0x6>
-80000118:	02f22e23          	sw	a5,60(tp) # 3c <SIZE+0xa>
-8000011c:	05022023          	sw	a6,64(tp) # 40 <SIZE+0xe>
-80000120:	05122223          	sw	a7,68(tp) # 44 <SIZE+0x12>
-80000124:	05222423          	sw	s2,72(tp) # 48 <SIZE+0x16>
-80000128:	05322623          	sw	s3,76(tp) # 4c <SIZE+0x1a>
-8000012c:	05422823          	sw	s4,80(tp) # 50 <SIZE+0x1e>
-80000130:	05522a23          	sw	s5,84(tp) # 54 <SIZE+0x22>
-80000134:	05622c23          	sw	s6,88(tp) # 58 <SIZE+0x26>
-80000138:	05722e23          	sw	s7,92(tp) # 5c <SIZE+0x2a>
-8000013c:	07822023          	sw	s8,96(tp) # 60 <SIZE+0x2e>
-80000140:	07922223          	sw	s9,100(tp) # 64 <SIZE+0x32>
-80000144:	07a22423          	sw	s10,104(tp) # 68 <SIZE+0x36>
-80000148:	07b22623          	sw	s11,108(tp) # 6c <SIZE+0x3a>
-8000014c:	07c22823          	sw	t3,112(tp) # 70 <SIZE+0x3e>
-80000150:	07d22a23          	sw	t4,116(tp) # 74 <SIZE+0x42>
-80000154:	07e22c23          	sw	t5,120(tp) # 78 <SIZE+0x46>
-80000158:	07f22e23          	sw	t6,124(tp) # 7c <SIZE+0x4a>
-8000015c:	00100213          	li	tp,1
-80000160:	00008067          	ret
+800000c8 <vx_save_context>:
+800000c8:	01000217          	auipc	tp,0x1000
+800000cc:	24820213          	addi	tp,tp,584 # 81000310 <context>
+800000d0:	00022023          	sw	zero,0(tp) # 0 <A_WARPS-0x7>
+800000d4:	00122223          	sw	ra,4(tp) # 4 <A_WARPS-0x3>
+800000d8:	00222423          	sw	sp,8(tp) # 8 <A_WARPS+0x1>
+800000dc:	00322623          	sw	gp,12(tp) # c <A_WARPS+0x5>
+800000e0:	00422823          	sw	tp,16(tp) # 10 <A_WARPS+0x9>
+800000e4:	00522a23          	sw	t0,20(tp) # 14 <A_WARPS+0xd>
+800000e8:	00622c23          	sw	t1,24(tp) # 18 <A_WARPS+0x11>
+800000ec:	00722e23          	sw	t2,28(tp) # 1c <A_WARPS+0x15>
+800000f0:	02822023          	sw	s0,32(tp) # 20 <A_WARPS+0x19>
+800000f4:	02922223          	sw	s1,36(tp) # 24 <A_WARPS+0x1d>
+800000f8:	02a22423          	sw	a0,40(tp) # 28 <A_WARPS+0x21>
+800000fc:	02b22623          	sw	a1,44(tp) # 2c <A_WARPS+0x25>
+80000100:	02c22823          	sw	a2,48(tp) # 30 <A_WARPS+0x29>
+80000104:	02d22a23          	sw	a3,52(tp) # 34 <SIZE+0x2>
+80000108:	02e22c23          	sw	a4,56(tp) # 38 <SIZE+0x6>
+8000010c:	02f22e23          	sw	a5,60(tp) # 3c <SIZE+0xa>
+80000110:	05022023          	sw	a6,64(tp) # 40 <SIZE+0xe>
+80000114:	05122223          	sw	a7,68(tp) # 44 <SIZE+0x12>
+80000118:	05222423          	sw	s2,72(tp) # 48 <SIZE+0x16>
+8000011c:	05322623          	sw	s3,76(tp) # 4c <SIZE+0x1a>
+80000120:	05422823          	sw	s4,80(tp) # 50 <SIZE+0x1e>
+80000124:	05522a23          	sw	s5,84(tp) # 54 <SIZE+0x22>
+80000128:	05622c23          	sw	s6,88(tp) # 58 <SIZE+0x26>
+8000012c:	05722e23          	sw	s7,92(tp) # 5c <SIZE+0x2a>
+80000130:	07822023          	sw	s8,96(tp) # 60 <SIZE+0x2e>
+80000134:	07922223          	sw	s9,100(tp) # 64 <SIZE+0x32>
+80000138:	07a22423          	sw	s10,104(tp) # 68 <SIZE+0x36>
+8000013c:	07b22623          	sw	s11,108(tp) # 6c <SIZE+0x3a>
+80000140:	07c22823          	sw	t3,112(tp) # 70 <SIZE+0x3e>
+80000144:	07d22a23          	sw	t4,116(tp) # 74 <SIZE+0x42>
+80000148:	07e22c23          	sw	t5,120(tp) # 78 <SIZE+0x46>
+8000014c:	07f22e23          	sw	t6,124(tp) # 7c <SIZE+0x4a>
+80000150:	00100213          	li	tp,1
+80000154:	00008067          	ret
 
-80000164 <vx_load_context>:
-80000164:	01000217          	auipc	tp,0x1000
-80000168:	1ac20213          	addi	tp,tp,428 # 81000310 <context>
-8000016c:	00022003          	lw	zero,0(tp) # 0 <A_WARPS-0x7>
-80000170:	00422083          	lw	ra,4(tp) # 4 <A_WARPS-0x3>
-80000174:	00822103          	lw	sp,8(tp) # 8 <A_WARPS+0x1>
-80000178:	00c22183          	lw	gp,12(tp) # c <A_WARPS+0x5>
-8000017c:	01022203          	lw	tp,16(tp) # 10 <A_WARPS+0x9>
-80000180:	01422283          	lw	t0,20(tp) # 14 <A_WARPS+0xd>
-80000184:	01822303          	lw	t1,24(tp) # 18 <A_WARPS+0x11>
-80000188:	01c22383          	lw	t2,28(tp) # 1c <A_WARPS+0x15>
-8000018c:	02022403          	lw	s0,32(tp) # 20 <A_WARPS+0x19>
-80000190:	02422483          	lw	s1,36(tp) # 24 <A_WARPS+0x1d>
-80000194:	02822503          	lw	a0,40(tp) # 28 <A_WARPS+0x21>
-80000198:	02c22583          	lw	a1,44(tp) # 2c <A_WARPS+0x25>
-8000019c:	03022603          	lw	a2,48(tp) # 30 <A_WARPS+0x29>
-800001a0:	03422683          	lw	a3,52(tp) # 34 <SIZE+0x2>
-800001a4:	03822703          	lw	a4,56(tp) # 38 <SIZE+0x6>
-800001a8:	03c22783          	lw	a5,60(tp) # 3c <SIZE+0xa>
-800001ac:	04022803          	lw	a6,64(tp) # 40 <SIZE+0xe>
-800001b0:	04422883          	lw	a7,68(tp) # 44 <SIZE+0x12>
-800001b4:	04822903          	lw	s2,72(tp) # 48 <SIZE+0x16>
-800001b8:	04c22983          	lw	s3,76(tp) # 4c <SIZE+0x1a>
-800001bc:	05022a03          	lw	s4,80(tp) # 50 <SIZE+0x1e>
-800001c0:	05422a83          	lw	s5,84(tp) # 54 <SIZE+0x22>
-800001c4:	05822b03          	lw	s6,88(tp) # 58 <SIZE+0x26>
-800001c8:	05c22b83          	lw	s7,92(tp) # 5c <SIZE+0x2a>
-800001cc:	06022c03          	lw	s8,96(tp) # 60 <SIZE+0x2e>
-800001d0:	06422c83          	lw	s9,100(tp) # 64 <SIZE+0x32>
-800001d4:	06822d03          	lw	s10,104(tp) # 68 <SIZE+0x36>
-800001d8:	06c22d83          	lw	s11,108(tp) # 6c <SIZE+0x3a>
-800001dc:	07022e03          	lw	t3,112(tp) # 70 <SIZE+0x3e>
-800001e0:	07422e83          	lw	t4,116(tp) # 74 <SIZE+0x42>
-800001e4:	07822f03          	lw	t5,120(tp) # 78 <SIZE+0x46>
-800001e8:	07c22f83          	lw	t6,124(tp) # 7c <SIZE+0x4a>
-800001ec:	00000213          	li	tp,0
-800001f0:	00008067          	ret
+80000158 <vx_load_context>:
+80000158:	01000217          	auipc	tp,0x1000
+8000015c:	1b820213          	addi	tp,tp,440 # 81000310 <context>
+80000160:	00022003          	lw	zero,0(tp) # 0 <A_WARPS-0x7>
+80000164:	00422083          	lw	ra,4(tp) # 4 <A_WARPS-0x3>
+80000168:	00822103          	lw	sp,8(tp) # 8 <A_WARPS+0x1>
+8000016c:	00c22183          	lw	gp,12(tp) # c <A_WARPS+0x5>
+80000170:	01022203          	lw	tp,16(tp) # 10 <A_WARPS+0x9>
+80000174:	01422283          	lw	t0,20(tp) # 14 <A_WARPS+0xd>
+80000178:	01822303          	lw	t1,24(tp) # 18 <A_WARPS+0x11>
+8000017c:	01c22383          	lw	t2,28(tp) # 1c <A_WARPS+0x15>
+80000180:	02022403          	lw	s0,32(tp) # 20 <A_WARPS+0x19>
+80000184:	02422483          	lw	s1,36(tp) # 24 <A_WARPS+0x1d>
+80000188:	02822503          	lw	a0,40(tp) # 28 <A_WARPS+0x21>
+8000018c:	02c22583          	lw	a1,44(tp) # 2c <A_WARPS+0x25>
+80000190:	03022603          	lw	a2,48(tp) # 30 <A_WARPS+0x29>
+80000194:	03422683          	lw	a3,52(tp) # 34 <SIZE+0x2>
+80000198:	03822703          	lw	a4,56(tp) # 38 <SIZE+0x6>
+8000019c:	03c22783          	lw	a5,60(tp) # 3c <SIZE+0xa>
+800001a0:	04022803          	lw	a6,64(tp) # 40 <SIZE+0xe>
+800001a4:	04422883          	lw	a7,68(tp) # 44 <SIZE+0x12>
+800001a8:	04822903          	lw	s2,72(tp) # 48 <SIZE+0x16>
+800001ac:	04c22983          	lw	s3,76(tp) # 4c <SIZE+0x1a>
+800001b0:	05022a03          	lw	s4,80(tp) # 50 <SIZE+0x1e>
+800001b4:	05422a83          	lw	s5,84(tp) # 54 <SIZE+0x22>
+800001b8:	05822b03          	lw	s6,88(tp) # 58 <SIZE+0x26>
+800001bc:	05c22b83          	lw	s7,92(tp) # 5c <SIZE+0x2a>
+800001c0:	06022c03          	lw	s8,96(tp) # 60 <SIZE+0x2e>
+800001c4:	06422c83          	lw	s9,100(tp) # 64 <SIZE+0x32>
+800001c8:	06822d03          	lw	s10,104(tp) # 68 <SIZE+0x36>
+800001cc:	06c22d83          	lw	s11,108(tp) # 6c <SIZE+0x3a>
+800001d0:	07022e03          	lw	t3,112(tp) # 70 <SIZE+0x3e>
+800001d4:	07422e83          	lw	t4,116(tp) # 74 <SIZE+0x42>
+800001d8:	07822f03          	lw	t5,120(tp) # 78 <SIZE+0x46>
+800001dc:	07c22f83          	lw	t6,124(tp) # 7c <SIZE+0x4a>
+800001e0:	00000213          	li	tp,0
+800001e4:	00008067          	ret
 
-800001f4 <vx_available_warps>:
-800001f4:	02002573          	csrr	a0,0x20
-800001f8:	00008067          	ret
+800001e8 <vx_available_warps>:
+800001e8:	02002573          	csrr	a0,0x20
+800001ec:	00008067          	ret
 
-800001fc <vx_available_threads>:
-800001fc:	02102573          	csrr	a0,0x21
-80000200:	00008067          	ret
+800001f0 <vx_available_threads>:
+800001f0:	02102573          	csrr	a0,0x21
+800001f4:	00008067          	ret
 
-80000204 <vx_before_main>:
-80000204:	fe010113          	addi	sp,sp,-32
-80000208:	00112e23          	sw	ra,28(sp)
-8000020c:	00812c23          	sw	s0,24(sp)
-80000210:	02010413          	addi	s0,sp,32
-80000214:	fe042623          	sw	zero,-20(s0)
-80000218:	0340006f          	j	8000024c <vx_before_main+0x48>
-8000021c:	fec42703          	lw	a4,-20(s0)
-80000220:	000017b7          	lui	a5,0x1
-80000224:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
-80000228:	02f70733          	mul	a4,a4,a5
-8000022c:	810007b7          	lui	a5,0x81000
-80000230:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
-80000234:	00f707b3          	add	a5,a4,a5
-80000238:	00078513          	mv	a0,a5
-8000023c:	440000ef          	jal	ra,8000067c <queue_initialize>
-80000240:	fec42783          	lw	a5,-20(s0)
-80000244:	00178793          	addi	a5,a5,1
-80000248:	fef42623          	sw	a5,-20(s0)
-8000024c:	fec42703          	lw	a4,-20(s0)
-80000250:	01f00793          	li	a5,31
-80000254:	fce7d4e3          	bge	a5,a4,8000021c <vx_before_main+0x18>
-80000258:	00000013          	nop
-8000025c:	01c12083          	lw	ra,28(sp)
-80000260:	01812403          	lw	s0,24(sp)
-80000264:	02010113          	addi	sp,sp,32
-80000268:	00008067          	ret
+800001f8 <vx_before_main>:
+800001f8:	fe010113          	addi	sp,sp,-32
+800001fc:	00112e23          	sw	ra,28(sp)
+80000200:	00812c23          	sw	s0,24(sp)
+80000204:	02010413          	addi	s0,sp,32
+80000208:	fe042623          	sw	zero,-20(s0)
+8000020c:	0340006f          	j	80000240 <vx_before_main+0x48>
+80000210:	fec42703          	lw	a4,-20(s0)
+80000214:	000017b7          	lui	a5,0x1
+80000218:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
+8000021c:	02f70733          	mul	a4,a4,a5
+80000220:	810007b7          	lui	a5,0x81000
+80000224:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
+80000228:	00f707b3          	add	a5,a4,a5
+8000022c:	00078513          	mv	a0,a5
+80000230:	440000ef          	jal	ra,80000670 <queue_initialize>
+80000234:	fec42783          	lw	a5,-20(s0)
+80000238:	00178793          	addi	a5,a5,1
+8000023c:	fef42623          	sw	a5,-20(s0)
+80000240:	fec42703          	lw	a4,-20(s0)
+80000244:	01f00793          	li	a5,31
+80000248:	fce7d4e3          	bge	a5,a4,80000210 <vx_before_main+0x18>
+8000024c:	00000013          	nop
+80000250:	01c12083          	lw	ra,28(sp)
+80000254:	01812403          	lw	s0,24(sp)
+80000258:	02010113          	addi	sp,sp,32
+8000025c:	00008067          	ret
 
-8000026c <vx_reschedule_warps>:
-8000026c:	fd010113          	addi	sp,sp,-48
-80000270:	02112623          	sw	ra,44(sp)
-80000274:	02812423          	sw	s0,40(sp)
-80000278:	03a12223          	sw	s10,36(sp)
-8000027c:	03010413          	addi	s0,sp,48
-80000280:	00000013          	nop
-80000284:	000d0713          	mv	a4,s10
-80000288:	000017b7          	lui	a5,0x1
-8000028c:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
-80000290:	02f70733          	mul	a4,a4,a5
-80000294:	810007b7          	lui	a5,0x81000
-80000298:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
-8000029c:	00f707b3          	add	a5,a4,a5
-800002a0:	00078513          	mv	a0,a5
-800002a4:	504000ef          	jal	ra,800007a8 <queue_isEmpty>
-800002a8:	00050793          	mv	a5,a0
-800002ac:	02078a63          	beqz	a5,800002e0 <vx_reschedule_warps+0x74>
-800002b0:	000d0713          	mv	a4,s10
-800002b4:	810007b7          	lui	a5,0x81000
-800002b8:	00271713          	slli	a4,a4,0x2
-800002bc:	26878793          	addi	a5,a5,616 # 81000268 <barrier_bool+0xfffd6fa4>
-800002c0:	00f707b3          	add	a5,a4,a5
-800002c4:	00100713          	li	a4,1
-800002c8:	00e7a023          	sw	a4,0(a5)
-800002cc:	000d0793          	mv	a5,s10
-800002d0:	00079663          	bnez	a5,800002dc <vx_reschedule_warps+0x70>
-800002d4:	e91ff0ef          	jal	ra,80000164 <vx_load_context>
-800002d8:	05c0006f          	j	80000334 <vx_reschedule_warps+0xc8>
-800002dc:	00000073          	ecall
-800002e0:	000d0713          	mv	a4,s10
-800002e4:	000017b7          	lui	a5,0x1
-800002e8:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
-800002ec:	02f70733          	mul	a4,a4,a5
-800002f0:	810007b7          	lui	a5,0x81000
-800002f4:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
-800002f8:	00f707b3          	add	a5,a4,a5
-800002fc:	fd840713          	addi	a4,s0,-40
-80000300:	00070593          	mv	a1,a4
-80000304:	00078513          	mv	a0,a5
-80000308:	400000ef          	jal	ra,80000708 <queue_dequeue>
-8000030c:	fe042783          	lw	a5,-32(s0)
-80000310:	00078113          	mv	sp,a5
-80000314:	fdc42783          	lw	a5,-36(s0)
-80000318:	fd842583          	lw	a1,-40(s0)
-8000031c:	fe442603          	lw	a2,-28(s0)
-80000320:	fe842683          	lw	a3,-24(s0)
-80000324:	fec42703          	lw	a4,-20(s0)
-80000328:	00078513          	mv	a0,a5
-8000032c:	cfdff0ef          	jal	ra,80000028 <vx_createThreads>
-80000330:	00000073          	ecall
-80000334:	02c12083          	lw	ra,44(sp)
-80000338:	02812403          	lw	s0,40(sp)
-8000033c:	02412d03          	lw	s10,36(sp)
-80000340:	03010113          	addi	sp,sp,48
-80000344:	00008067          	ret
+80000260 <vx_reschedule_warps>:
+80000260:	fd010113          	addi	sp,sp,-48
+80000264:	02112623          	sw	ra,44(sp)
+80000268:	02812423          	sw	s0,40(sp)
+8000026c:	03a12223          	sw	s10,36(sp)
+80000270:	03010413          	addi	s0,sp,48
+80000274:	00000013          	nop
+80000278:	000d0713          	mv	a4,s10
+8000027c:	000017b7          	lui	a5,0x1
+80000280:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
+80000284:	02f70733          	mul	a4,a4,a5
+80000288:	810007b7          	lui	a5,0x81000
+8000028c:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
+80000290:	00f707b3          	add	a5,a4,a5
+80000294:	00078513          	mv	a0,a5
+80000298:	504000ef          	jal	ra,8000079c <queue_isEmpty>
+8000029c:	00050793          	mv	a5,a0
+800002a0:	02078a63          	beqz	a5,800002d4 <vx_reschedule_warps+0x74>
+800002a4:	000d0713          	mv	a4,s10
+800002a8:	810007b7          	lui	a5,0x81000
+800002ac:	00271713          	slli	a4,a4,0x2
+800002b0:	26878793          	addi	a5,a5,616 # 81000268 <barrier_bool+0xfffd6fa4>
+800002b4:	00f707b3          	add	a5,a4,a5
+800002b8:	00100713          	li	a4,1
+800002bc:	00e7a023          	sw	a4,0(a5)
+800002c0:	000d0793          	mv	a5,s10
+800002c4:	00079663          	bnez	a5,800002d0 <vx_reschedule_warps+0x70>
+800002c8:	e91ff0ef          	jal	ra,80000158 <vx_load_context>
+800002cc:	05c0006f          	j	80000328 <vx_reschedule_warps+0xc8>
+800002d0:	00000073          	ecall
+800002d4:	000d0713          	mv	a4,s10
+800002d8:	000017b7          	lui	a5,0x1
+800002dc:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
+800002e0:	02f70733          	mul	a4,a4,a5
+800002e4:	810007b7          	lui	a5,0x81000
+800002e8:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
+800002ec:	00f707b3          	add	a5,a4,a5
+800002f0:	fd840713          	addi	a4,s0,-40
+800002f4:	00070593          	mv	a1,a4
+800002f8:	00078513          	mv	a0,a5
+800002fc:	400000ef          	jal	ra,800006fc <queue_dequeue>
+80000300:	fe042783          	lw	a5,-32(s0)
+80000304:	00078113          	mv	sp,a5
+80000308:	fdc42783          	lw	a5,-36(s0)
+8000030c:	fd842583          	lw	a1,-40(s0)
+80000310:	fe442603          	lw	a2,-28(s0)
+80000314:	fe842683          	lw	a3,-24(s0)
+80000318:	fec42703          	lw	a4,-20(s0)
+8000031c:	00078513          	mv	a0,a5
+80000320:	cfdff0ef          	jal	ra,8000001c <vx_createThreads>
+80000324:	00000073          	ecall
+80000328:	02c12083          	lw	ra,44(sp)
+8000032c:	02812403          	lw	s0,40(sp)
+80000330:	02412d03          	lw	s10,36(sp)
+80000334:	03010113          	addi	sp,sp,48
+80000338:	00008067          	ret
 
-80000348 <vx_schedule_warps>:
-80000348:	fb010113          	addi	sp,sp,-80
-8000034c:	04112623          	sw	ra,76(sp)
-80000350:	04812423          	sw	s0,72(sp)
-80000354:	05010413          	addi	s0,sp,80
-80000358:	e9dff0ef          	jal	ra,800001f4 <vx_available_warps>
-8000035c:	fea42423          	sw	a0,-24(s0)
-80000360:	00010993          	mv	s3,sp
-80000364:	00100793          	li	a5,1
-80000368:	fef42623          	sw	a5,-20(s0)
-8000036c:	08c0006f          	j	800003f8 <vx_schedule_warps+0xb0>
-80000370:	fec42703          	lw	a4,-20(s0)
-80000374:	000017b7          	lui	a5,0x1
-80000378:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
-8000037c:	02f70733          	mul	a4,a4,a5
-80000380:	810007b7          	lui	a5,0x81000
-80000384:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
-80000388:	00f707b3          	add	a5,a4,a5
-8000038c:	00078513          	mv	a0,a5
-80000390:	418000ef          	jal	ra,800007a8 <queue_isEmpty>
-80000394:	00050793          	mv	a5,a0
-80000398:	04079a63          	bnez	a5,800003ec <vx_schedule_warps+0xa4>
-8000039c:	fec42703          	lw	a4,-20(s0)
-800003a0:	000017b7          	lui	a5,0x1
-800003a4:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
-800003a8:	02f70733          	mul	a4,a4,a5
-800003ac:	810007b7          	lui	a5,0x81000
-800003b0:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
-800003b4:	00f707b3          	add	a5,a4,a5
-800003b8:	fd040713          	addi	a4,s0,-48
-800003bc:	00070593          	mv	a1,a4
-800003c0:	00078513          	mv	a0,a5
-800003c4:	344000ef          	jal	ra,80000708 <queue_dequeue>
-800003c8:	fd842783          	lw	a5,-40(s0)
-800003cc:	00078113          	mv	sp,a5
-800003d0:	fd442783          	lw	a5,-44(s0)
-800003d4:	fd042583          	lw	a1,-48(s0)
-800003d8:	fdc42603          	lw	a2,-36(s0)
-800003dc:	fe042683          	lw	a3,-32(s0)
-800003e0:	fe442703          	lw	a4,-28(s0)
-800003e4:	00078513          	mv	a0,a5
-800003e8:	cddff0ef          	jal	ra,800000c4 <vx_wspawn>
+8000033c <vx_schedule_warps>:
+8000033c:	fb010113          	addi	sp,sp,-80
+80000340:	04112623          	sw	ra,76(sp)
+80000344:	04812423          	sw	s0,72(sp)
+80000348:	05010413          	addi	s0,sp,80
+8000034c:	e9dff0ef          	jal	ra,800001e8 <vx_available_warps>
+80000350:	fea42423          	sw	a0,-24(s0)
+80000354:	00010993          	mv	s3,sp
+80000358:	00100793          	li	a5,1
+8000035c:	fef42623          	sw	a5,-20(s0)
+80000360:	08c0006f          	j	800003ec <vx_schedule_warps+0xb0>
+80000364:	fec42703          	lw	a4,-20(s0)
+80000368:	000017b7          	lui	a5,0x1
+8000036c:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
+80000370:	02f70733          	mul	a4,a4,a5
+80000374:	810007b7          	lui	a5,0x81000
+80000378:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
+8000037c:	00f707b3          	add	a5,a4,a5
+80000380:	00078513          	mv	a0,a5
+80000384:	418000ef          	jal	ra,8000079c <queue_isEmpty>
+80000388:	00050793          	mv	a5,a0
+8000038c:	04079a63          	bnez	a5,800003e0 <vx_schedule_warps+0xa4>
+80000390:	fec42703          	lw	a4,-20(s0)
+80000394:	000017b7          	lui	a5,0x1
+80000398:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
+8000039c:	02f70733          	mul	a4,a4,a5
+800003a0:	810007b7          	lui	a5,0x81000
+800003a4:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
+800003a8:	00f707b3          	add	a5,a4,a5
+800003ac:	fd040713          	addi	a4,s0,-48
+800003b0:	00070593          	mv	a1,a4
+800003b4:	00078513          	mv	a0,a5
+800003b8:	344000ef          	jal	ra,800006fc <queue_dequeue>
+800003bc:	fd842783          	lw	a5,-40(s0)
+800003c0:	00078113          	mv	sp,a5
+800003c4:	fd442783          	lw	a5,-44(s0)
+800003c8:	fd042583          	lw	a1,-48(s0)
+800003cc:	fdc42603          	lw	a2,-36(s0)
+800003d0:	fe042683          	lw	a3,-32(s0)
+800003d4:	fe442703          	lw	a4,-28(s0)
+800003d8:	00078513          	mv	a0,a5
+800003dc:	cddff0ef          	jal	ra,800000b8 <vx_wspawn>
+800003e0:	fec42783          	lw	a5,-20(s0)
+800003e4:	00178793          	addi	a5,a5,1
+800003e8:	fef42623          	sw	a5,-20(s0)
 800003ec:	fec42783          	lw	a5,-20(s0)
-800003f0:	00178793          	addi	a5,a5,1
-800003f4:	fef42623          	sw	a5,-20(s0)
-800003f8:	fec42783          	lw	a5,-20(s0)
-800003fc:	fe842703          	lw	a4,-24(s0)
-80000400:	f6e7e8e3          	bltu	a5,a4,80000370 <vx_schedule_warps+0x28>
-80000404:	00098113          	mv	sp,s3
-80000408:	ccdff0ef          	jal	ra,800000d4 <vx_save_context>
-8000040c:	00020793          	mv	a5,tp
-80000410:	04078863          	beqz	a5,80000460 <vx_schedule_warps+0x118>
-80000414:	810007b7          	lui	a5,0x81000
-80000418:	41078513          	addi	a0,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
-8000041c:	38c000ef          	jal	ra,800007a8 <queue_isEmpty>
-80000420:	00050793          	mv	a5,a0
-80000424:	02079e63          	bnez	a5,80000460 <vx_schedule_warps+0x118>
-80000428:	fb840793          	addi	a5,s0,-72
-8000042c:	00078593          	mv	a1,a5
-80000430:	810007b7          	lui	a5,0x81000
-80000434:	41078513          	addi	a0,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
-80000438:	2d0000ef          	jal	ra,80000708 <queue_dequeue>
-8000043c:	fc042783          	lw	a5,-64(s0)
-80000440:	00078113          	mv	sp,a5
-80000444:	fbc42783          	lw	a5,-68(s0)
-80000448:	fb842583          	lw	a1,-72(s0)
-8000044c:	fc442603          	lw	a2,-60(s0)
-80000450:	fc842683          	lw	a3,-56(s0)
-80000454:	fcc42703          	lw	a4,-52(s0)
-80000458:	00078513          	mv	a0,a5
-8000045c:	bcdff0ef          	jal	ra,80000028 <vx_createThreads>
-80000460:	00000013          	nop
-80000464:	04c12083          	lw	ra,76(sp)
-80000468:	04812403          	lw	s0,72(sp)
-8000046c:	05010113          	addi	sp,sp,80
-80000470:	00008067          	ret
+800003f0:	fe842703          	lw	a4,-24(s0)
+800003f4:	f6e7e8e3          	bltu	a5,a4,80000364 <vx_schedule_warps+0x28>
+800003f8:	00098113          	mv	sp,s3
+800003fc:	ccdff0ef          	jal	ra,800000c8 <vx_save_context>
+80000400:	00020793          	mv	a5,tp
+80000404:	04078863          	beqz	a5,80000454 <vx_schedule_warps+0x118>
+80000408:	810007b7          	lui	a5,0x81000
+8000040c:	41078513          	addi	a0,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
+80000410:	38c000ef          	jal	ra,8000079c <queue_isEmpty>
+80000414:	00050793          	mv	a5,a0
+80000418:	02079e63          	bnez	a5,80000454 <vx_schedule_warps+0x118>
+8000041c:	fb840793          	addi	a5,s0,-72
+80000420:	00078593          	mv	a1,a5
+80000424:	810007b7          	lui	a5,0x81000
+80000428:	41078513          	addi	a0,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
+8000042c:	2d0000ef          	jal	ra,800006fc <queue_dequeue>
+80000430:	fc042783          	lw	a5,-64(s0)
+80000434:	00078113          	mv	sp,a5
+80000438:	fbc42783          	lw	a5,-68(s0)
+8000043c:	fb842583          	lw	a1,-72(s0)
+80000440:	fc442603          	lw	a2,-60(s0)
+80000444:	fc842683          	lw	a3,-56(s0)
+80000448:	fcc42703          	lw	a4,-52(s0)
+8000044c:	00078513          	mv	a0,a5
+80000450:	bcdff0ef          	jal	ra,8000001c <vx_createThreads>
+80000454:	00000013          	nop
+80000458:	04c12083          	lw	ra,76(sp)
+8000045c:	04812403          	lw	s0,72(sp)
+80000460:	05010113          	addi	sp,sp,80
+80000464:	00008067          	ret
 
-80000474 <vx_spawnWarps>:
-80000474:	fb010113          	addi	sp,sp,-80
-80000478:	04112623          	sw	ra,76(sp)
-8000047c:	04812423          	sw	s0,72(sp)
-80000480:	05010413          	addi	s0,sp,80
-80000484:	faa42e23          	sw	a0,-68(s0)
-80000488:	fab42c23          	sw	a1,-72(s0)
-8000048c:	fac42a23          	sw	a2,-76(s0)
-80000490:	fad42823          	sw	a3,-80(s0)
-80000494:	d71ff0ef          	jal	ra,80000204 <vx_before_main>
-80000498:	d5dff0ef          	jal	ra,800001f4 <vx_available_warps>
-8000049c:	fea42223          	sw	a0,-28(s0)
-800004a0:	00010913          	mv	s2,sp
-800004a4:	fe042623          	sw	zero,-20(s0)
-800004a8:	fe042423          	sw	zero,-24(s0)
-800004ac:	0900006f          	j	8000053c <vx_spawnWarps+0xc8>
-800004b0:	ffff09b7          	lui	s3,0xffff0
-800004b4:	01310133          	add	sp,sp,s3
-800004b8:	fe842783          	lw	a5,-24(s0)
-800004bc:	fcf42623          	sw	a5,-52(s0)
-800004c0:	fb842783          	lw	a5,-72(s0)
-800004c4:	fcf42823          	sw	a5,-48(s0)
-800004c8:	00010793          	mv	a5,sp
-800004cc:	fcf42a23          	sw	a5,-44(s0)
-800004d0:	fb442783          	lw	a5,-76(s0)
-800004d4:	fcf42c23          	sw	a5,-40(s0)
-800004d8:	fb042783          	lw	a5,-80(s0)
-800004dc:	fcf42e23          	sw	a5,-36(s0)
-800004e0:	fec42783          	lw	a5,-20(s0)
-800004e4:	fef42023          	sw	a5,-32(s0)
-800004e8:	fec42703          	lw	a4,-20(s0)
-800004ec:	000017b7          	lui	a5,0x1
-800004f0:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
-800004f4:	02f70733          	mul	a4,a4,a5
-800004f8:	810007b7          	lui	a5,0x81000
-800004fc:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
-80000500:	00f707b3          	add	a5,a4,a5
-80000504:	fcc40713          	addi	a4,s0,-52
-80000508:	00070593          	mv	a1,a4
-8000050c:	00078513          	mv	a0,a5
-80000510:	190000ef          	jal	ra,800006a0 <queue_enqueue>
+80000468 <vx_spawnWarps>:
+80000468:	fb010113          	addi	sp,sp,-80
+8000046c:	04112623          	sw	ra,76(sp)
+80000470:	04812423          	sw	s0,72(sp)
+80000474:	05010413          	addi	s0,sp,80
+80000478:	faa42e23          	sw	a0,-68(s0)
+8000047c:	fab42c23          	sw	a1,-72(s0)
+80000480:	fac42a23          	sw	a2,-76(s0)
+80000484:	fad42823          	sw	a3,-80(s0)
+80000488:	d71ff0ef          	jal	ra,800001f8 <vx_before_main>
+8000048c:	d5dff0ef          	jal	ra,800001e8 <vx_available_warps>
+80000490:	fea42223          	sw	a0,-28(s0)
+80000494:	00010913          	mv	s2,sp
+80000498:	fe042623          	sw	zero,-20(s0)
+8000049c:	fe042423          	sw	zero,-24(s0)
+800004a0:	0900006f          	j	80000530 <vx_spawnWarps+0xc8>
+800004a4:	ffff09b7          	lui	s3,0xffff0
+800004a8:	01310133          	add	sp,sp,s3
+800004ac:	fe842783          	lw	a5,-24(s0)
+800004b0:	fcf42623          	sw	a5,-52(s0)
+800004b4:	fb842783          	lw	a5,-72(s0)
+800004b8:	fcf42823          	sw	a5,-48(s0)
+800004bc:	00010793          	mv	a5,sp
+800004c0:	fcf42a23          	sw	a5,-44(s0)
+800004c4:	fb442783          	lw	a5,-76(s0)
+800004c8:	fcf42c23          	sw	a5,-40(s0)
+800004cc:	fb042783          	lw	a5,-80(s0)
+800004d0:	fcf42e23          	sw	a5,-36(s0)
+800004d4:	fec42783          	lw	a5,-20(s0)
+800004d8:	fef42023          	sw	a5,-32(s0)
+800004dc:	fec42703          	lw	a4,-20(s0)
+800004e0:	000017b7          	lui	a5,0x1
+800004e4:	97478793          	addi	a5,a5,-1676 # 974 <SIZE+0x942>
+800004e8:	02f70733          	mul	a4,a4,a5
+800004ec:	810007b7          	lui	a5,0x81000
+800004f0:	41078793          	addi	a5,a5,1040 # 81000410 <barrier_bool+0xfffd714c>
+800004f4:	00f707b3          	add	a5,a4,a5
+800004f8:	fcc40713          	addi	a4,s0,-52
+800004fc:	00070593          	mv	a1,a4
+80000500:	00078513          	mv	a0,a5
+80000504:	190000ef          	jal	ra,80000694 <queue_enqueue>
+80000508:	fec42783          	lw	a5,-20(s0)
+8000050c:	00178793          	addi	a5,a5,1
+80000510:	fef42623          	sw	a5,-20(s0)
 80000514:	fec42783          	lw	a5,-20(s0)
-80000518:	00178793          	addi	a5,a5,1
-8000051c:	fef42623          	sw	a5,-20(s0)
-80000520:	fec42783          	lw	a5,-20(s0)
-80000524:	fe442703          	lw	a4,-28(s0)
-80000528:	00e7e463          	bltu	a5,a4,80000530 <vx_spawnWarps+0xbc>
-8000052c:	fe042623          	sw	zero,-20(s0)
-80000530:	fe842783          	lw	a5,-24(s0)
-80000534:	00178793          	addi	a5,a5,1
-80000538:	fef42423          	sw	a5,-24(s0)
-8000053c:	fe842703          	lw	a4,-24(s0)
-80000540:	fbc42783          	lw	a5,-68(s0)
-80000544:	f6f766e3          	bltu	a4,a5,800004b0 <vx_spawnWarps+0x3c>
-80000548:	00090113          	mv	sp,s2
-8000054c:	dfdff0ef          	jal	ra,80000348 <vx_schedule_warps>
-80000550:	00000013          	nop
-80000554:	04c12083          	lw	ra,76(sp)
-80000558:	04812403          	lw	s0,72(sp)
-8000055c:	05010113          	addi	sp,sp,80
-80000560:	00008067          	ret
+80000518:	fe442703          	lw	a4,-28(s0)
+8000051c:	00e7e463          	bltu	a5,a4,80000524 <vx_spawnWarps+0xbc>
+80000520:	fe042623          	sw	zero,-20(s0)
+80000524:	fe842783          	lw	a5,-24(s0)
+80000528:	00178793          	addi	a5,a5,1
+8000052c:	fef42423          	sw	a5,-24(s0)
+80000530:	fe842703          	lw	a4,-24(s0)
+80000534:	fbc42783          	lw	a5,-68(s0)
+80000538:	f6f766e3          	bltu	a4,a5,800004a4 <vx_spawnWarps+0x3c>
+8000053c:	00090113          	mv	sp,s2
+80000540:	dfdff0ef          	jal	ra,8000033c <vx_schedule_warps>
+80000544:	00000013          	nop
+80000548:	04c12083          	lw	ra,76(sp)
+8000054c:	04812403          	lw	s0,72(sp)
+80000550:	05010113          	addi	sp,sp,80
+80000554:	00008067          	ret
 
-80000564 <vx_wait_for_warps>:
-80000564:	fd010113          	addi	sp,sp,-48
-80000568:	02112623          	sw	ra,44(sp)
-8000056c:	02812423          	sw	s0,40(sp)
-80000570:	03010413          	addi	s0,sp,48
-80000574:	fca42e23          	sw	a0,-36(s0)
-80000578:	fdc42583          	lw	a1,-36(s0)
-8000057c:	810007b7          	lui	a5,0x81000
-80000580:	04078513          	addi	a0,a5,64 # 81000040 <barrier_bool+0xfffd6d7c>
-80000584:	354000ef          	jal	ra,800008d8 <vx_printf>
-80000588:	c6dff0ef          	jal	ra,800001f4 <vx_available_warps>
-8000058c:	fea42023          	sw	a0,-32(s0)
-80000590:	fe042623          	sw	zero,-20(s0)
-80000594:	0680006f          	j	800005fc <vx_wait_for_warps+0x98>
-80000598:	00100793          	li	a5,1
-8000059c:	fef42623          	sw	a5,-20(s0)
-800005a0:	fe042423          	sw	zero,-24(s0)
-800005a4:	03c0006f          	j	800005e0 <vx_wait_for_warps+0x7c>
-800005a8:	810007b7          	lui	a5,0x81000
-800005ac:	fe842703          	lw	a4,-24(s0)
-800005b0:	00271713          	slli	a4,a4,0x2
-800005b4:	26878793          	addi	a5,a5,616 # 81000268 <barrier_bool+0xfffd6fa4>
-800005b8:	00f707b3          	add	a5,a4,a5
-800005bc:	0007a703          	lw	a4,0(a5)
-800005c0:	00100793          	li	a5,1
-800005c4:	00f71863          	bne	a4,a5,800005d4 <vx_wait_for_warps+0x70>
-800005c8:	fec42783          	lw	a5,-20(s0)
+80000558 <vx_wait_for_warps>:
+80000558:	fd010113          	addi	sp,sp,-48
+8000055c:	02112623          	sw	ra,44(sp)
+80000560:	02812423          	sw	s0,40(sp)
+80000564:	03010413          	addi	s0,sp,48
+80000568:	fca42e23          	sw	a0,-36(s0)
+8000056c:	fdc42583          	lw	a1,-36(s0)
+80000570:	810007b7          	lui	a5,0x81000
+80000574:	04078513          	addi	a0,a5,64 # 81000040 <barrier_bool+0xfffd6d7c>
+80000578:	354000ef          	jal	ra,800008cc <vx_printf>
+8000057c:	c6dff0ef          	jal	ra,800001e8 <vx_available_warps>
+80000580:	fea42023          	sw	a0,-32(s0)
+80000584:	fe042623          	sw	zero,-20(s0)
+80000588:	0680006f          	j	800005f0 <vx_wait_for_warps+0x98>
+8000058c:	00100793          	li	a5,1
+80000590:	fef42623          	sw	a5,-20(s0)
+80000594:	fe042423          	sw	zero,-24(s0)
+80000598:	03c0006f          	j	800005d4 <vx_wait_for_warps+0x7c>
+8000059c:	810007b7          	lui	a5,0x81000
+800005a0:	fe842703          	lw	a4,-24(s0)
+800005a4:	00271713          	slli	a4,a4,0x2
+800005a8:	26878793          	addi	a5,a5,616 # 81000268 <barrier_bool+0xfffd6fa4>
+800005ac:	00f707b3          	add	a5,a4,a5
+800005b0:	0007a703          	lw	a4,0(a5)
+800005b4:	00100793          	li	a5,1
+800005b8:	00f71863          	bne	a4,a5,800005c8 <vx_wait_for_warps+0x70>
+800005bc:	fec42783          	lw	a5,-20(s0)
+800005c0:	00178793          	addi	a5,a5,1
+800005c4:	fef42623          	sw	a5,-20(s0)
+800005c8:	fe842783          	lw	a5,-24(s0)
 800005cc:	00178793          	addi	a5,a5,1
-800005d0:	fef42623          	sw	a5,-20(s0)
-800005d4:	fe842783          	lw	a5,-24(s0)
-800005d8:	00178793          	addi	a5,a5,1
-800005dc:	fef42423          	sw	a5,-24(s0)
-800005e0:	fe842703          	lw	a4,-24(s0)
-800005e4:	01f00793          	li	a5,31
-800005e8:	fce7d0e3          	bge	a5,a4,800005a8 <vx_wait_for_warps+0x44>
-800005ec:	fec42583          	lw	a1,-20(s0)
-800005f0:	810007b7          	lui	a5,0x81000
-800005f4:	04c78513          	addi	a0,a5,76 # 8100004c <barrier_bool+0xfffd6d88>
-800005f8:	2e0000ef          	jal	ra,800008d8 <vx_printf>
-800005fc:	fec42703          	lw	a4,-20(s0)
-80000600:	fdc42783          	lw	a5,-36(s0)
-80000604:	f8f76ae3          	bltu	a4,a5,80000598 <vx_wait_for_warps+0x34>
-80000608:	fe042223          	sw	zero,-28(s0)
-8000060c:	0280006f          	j	80000634 <vx_wait_for_warps+0xd0>
-80000610:	810007b7          	lui	a5,0x81000
-80000614:	fe442703          	lw	a4,-28(s0)
-80000618:	00271713          	slli	a4,a4,0x2
-8000061c:	26878793          	addi	a5,a5,616 # 81000268 <barrier_bool+0xfffd6fa4>
-80000620:	00f707b3          	add	a5,a4,a5
-80000624:	0007a023          	sw	zero,0(a5)
+800005d0:	fef42423          	sw	a5,-24(s0)
+800005d4:	fe842703          	lw	a4,-24(s0)
+800005d8:	01f00793          	li	a5,31
+800005dc:	fce7d0e3          	bge	a5,a4,8000059c <vx_wait_for_warps+0x44>
+800005e0:	fec42583          	lw	a1,-20(s0)
+800005e4:	810007b7          	lui	a5,0x81000
+800005e8:	04c78513          	addi	a0,a5,76 # 8100004c <barrier_bool+0xfffd6d88>
+800005ec:	2e0000ef          	jal	ra,800008cc <vx_printf>
+800005f0:	fec42703          	lw	a4,-20(s0)
+800005f4:	fdc42783          	lw	a5,-36(s0)
+800005f8:	f8f76ae3          	bltu	a4,a5,8000058c <vx_wait_for_warps+0x34>
+800005fc:	fe042223          	sw	zero,-28(s0)
+80000600:	0280006f          	j	80000628 <vx_wait_for_warps+0xd0>
+80000604:	810007b7          	lui	a5,0x81000
+80000608:	fe442703          	lw	a4,-28(s0)
+8000060c:	00271713          	slli	a4,a4,0x2
+80000610:	26878793          	addi	a5,a5,616 # 81000268 <barrier_bool+0xfffd6fa4>
+80000614:	00f707b3          	add	a5,a4,a5
+80000618:	0007a023          	sw	zero,0(a5)
+8000061c:	fe442783          	lw	a5,-28(s0)
+80000620:	00178793          	addi	a5,a5,1
+80000624:	fef42223          	sw	a5,-28(s0)
 80000628:	fe442783          	lw	a5,-28(s0)
-8000062c:	00178793          	addi	a5,a5,1
-80000630:	fef42223          	sw	a5,-28(s0)
-80000634:	fe442783          	lw	a5,-28(s0)
-80000638:	fe042703          	lw	a4,-32(s0)
-8000063c:	fce7eae3          	bltu	a5,a4,80000610 <vx_wait_for_warps+0xac>
-80000640:	00000013          	nop
-80000644:	02c12083          	lw	ra,44(sp)
-80000648:	02812403          	lw	s0,40(sp)
-8000064c:	03010113          	addi	sp,sp,48
-80000650:	00008067          	ret
+8000062c:	fe042703          	lw	a4,-32(s0)
+80000630:	fce7eae3          	bltu	a5,a4,80000604 <vx_wait_for_warps+0xac>
+80000634:	00000013          	nop
+80000638:	02c12083          	lw	ra,44(sp)
+8000063c:	02812403          	lw	s0,40(sp)
+80000640:	03010113          	addi	sp,sp,48
+80000644:	00008067          	ret
 
-80000654 <vx_get_arg_struct>:
-80000654:	ff010113          	addi	sp,sp,-16
-80000658:	00812623          	sw	s0,12(sp)
-8000065c:	01712423          	sw	s7,8(sp)
-80000660:	01010413          	addi	s0,sp,16
-80000664:	000b8793          	mv	a5,s7
-80000668:	00078513          	mv	a0,a5
-8000066c:	00c12403          	lw	s0,12(sp)
-80000670:	00812b83          	lw	s7,8(sp)
-80000674:	01010113          	addi	sp,sp,16
-80000678:	00008067          	ret
+80000648 <vx_get_arg_struct>:
+80000648:	ff010113          	addi	sp,sp,-16
+8000064c:	00812623          	sw	s0,12(sp)
+80000650:	01712423          	sw	s7,8(sp)
+80000654:	01010413          	addi	s0,sp,16
+80000658:	000b8793          	mv	a5,s7
+8000065c:	00078513          	mv	a0,a5
+80000660:	00c12403          	lw	s0,12(sp)
+80000664:	00812b83          	lw	s7,8(sp)
+80000668:	01010113          	addi	sp,sp,16
+8000066c:	00008067          	ret
 
-8000067c <queue_initialize>:
-8000067c:	00050293          	mv	t0,a0
-80000680:	00000313          	li	t1,0
-80000684:	00700393          	li	t2,7
-80000688:	0062a023          	sw	t1,0(t0)
-8000068c:	0062a223          	sw	t1,4(t0)
-80000690:	0062a423          	sw	t1,8(t0)
-80000694:	0072a623          	sw	t2,12(t0)
-80000698:	0062a823          	sw	t1,16(t0)
-8000069c:	00008067          	ret
+80000670 <queue_initialize>:
+80000670:	00050293          	mv	t0,a0
+80000674:	00000313          	li	t1,0
+80000678:	00700393          	li	t2,7
+8000067c:	0062a023          	sw	t1,0(t0)
+80000680:	0062a223          	sw	t1,4(t0)
+80000684:	0062a423          	sw	t1,8(t0)
+80000688:	0072a623          	sw	t2,12(t0)
+8000068c:	0062a823          	sw	t1,16(t0)
+80000690:	00008067          	ret
 
-800006a0 <queue_enqueue>:
-800006a0:	00050293          	mv	t0,a0
-800006a4:	0082a303          	lw	t1,8(t0)
-800006a8:	00130313          	addi	t1,t1,1
-800006ac:	0062a423          	sw	t1,8(t0)
-800006b0:	01428313          	addi	t1,t0,20
-800006b4:	0042ae83          	lw	t4,4(t0)
-800006b8:	005e9393          	slli	t2,t4,0x5
-800006bc:	00730333          	add	t1,t1,t2
-800006c0:	0005ae03          	lw	t3,0(a1)
-800006c4:	01c32023          	sw	t3,0(t1)
-800006c8:	0045ae03          	lw	t3,4(a1)
-800006cc:	01c32223          	sw	t3,4(t1)
-800006d0:	0085ae03          	lw	t3,8(a1)
-800006d4:	01c32423          	sw	t3,8(t1)
-800006d8:	00c5ae03          	lw	t3,12(a1)
-800006dc:	01c32623          	sw	t3,12(t1)
-800006e0:	0105ae03          	lw	t3,16(a1)
-800006e4:	01c32823          	sw	t3,16(t1)
-800006e8:	0145ae03          	lw	t3,20(a1)
-800006ec:	01c32a23          	sw	t3,20(t1)
-800006f0:	001e8e93          	addi	t4,t4,1
-800006f4:	03200f13          	li	t5,50
-800006f8:	01ee9463          	bne	t4,t5,80000700 <ec>
-800006fc:	00000e93          	li	t4,0
+80000694 <queue_enqueue>:
+80000694:	00050293          	mv	t0,a0
+80000698:	0082a303          	lw	t1,8(t0)
+8000069c:	00130313          	addi	t1,t1,1
+800006a0:	0062a423          	sw	t1,8(t0)
+800006a4:	01428313          	addi	t1,t0,20
+800006a8:	0042ae83          	lw	t4,4(t0)
+800006ac:	005e9393          	slli	t2,t4,0x5
+800006b0:	00730333          	add	t1,t1,t2
+800006b4:	0005ae03          	lw	t3,0(a1)
+800006b8:	01c32023          	sw	t3,0(t1)
+800006bc:	0045ae03          	lw	t3,4(a1)
+800006c0:	01c32223          	sw	t3,4(t1)
+800006c4:	0085ae03          	lw	t3,8(a1)
+800006c8:	01c32423          	sw	t3,8(t1)
+800006cc:	00c5ae03          	lw	t3,12(a1)
+800006d0:	01c32623          	sw	t3,12(t1)
+800006d4:	0105ae03          	lw	t3,16(a1)
+800006d8:	01c32823          	sw	t3,16(t1)
+800006dc:	0145ae03          	lw	t3,20(a1)
+800006e0:	01c32a23          	sw	t3,20(t1)
+800006e4:	001e8e93          	addi	t4,t4,1
+800006e8:	03200f13          	li	t5,50
+800006ec:	01ee9463          	bne	t4,t5,800006f4 <ec>
+800006f0:	00000e93          	li	t4,0
 
-80000700 <ec>:
-80000700:	01d2a223          	sw	t4,4(t0)
-80000704:	00008067          	ret
+800006f4 <ec>:
+800006f4:	01d2a223          	sw	t4,4(t0)
+800006f8:	00008067          	ret
 
-80000708 <queue_dequeue>:
-80000708:	00050293          	mv	t0,a0
-8000070c:	0082a303          	lw	t1,8(t0)
+800006fc <queue_dequeue>:
+800006fc:	00050293          	mv	t0,a0
+80000700:	0082a303          	lw	t1,8(t0)
+80000704:	00000013          	nop
+80000708:	00000013          	nop
+8000070c:	00000013          	nop
 80000710:	00000013          	nop
 80000714:	00000013          	nop
 80000718:	00000013          	nop
-8000071c:	00000013          	nop
-80000720:	00000013          	nop
-80000724:	00000013          	nop
-80000728:	fff30313          	addi	t1,t1,-1
-8000072c:	0062a423          	sw	t1,8(t0)
-80000730:	01428313          	addi	t1,t0,20
-80000734:	0002ae83          	lw	t4,0(t0)
-80000738:	03200f93          	li	t6,50
-8000073c:	000e8f13          	mv	t5,t4
-80000740:	001f0f13          	addi	t5,t5,1
-80000744:	01ff1463          	bne	t5,t6,8000074c <dc>
-80000748:	00000f13          	li	t5,0
+8000071c:	fff30313          	addi	t1,t1,-1
+80000720:	0062a423          	sw	t1,8(t0)
+80000724:	01428313          	addi	t1,t0,20
+80000728:	0002ae83          	lw	t4,0(t0)
+8000072c:	03200f93          	li	t6,50
+80000730:	000e8f13          	mv	t5,t4
+80000734:	001f0f13          	addi	t5,t5,1
+80000738:	01ff1463          	bne	t5,t6,80000740 <dc>
+8000073c:	00000f13          	li	t5,0
 
-8000074c <dc>:
-8000074c:	01e2a023          	sw	t5,0(t0)
-80000750:	005e9393          	slli	t2,t4,0x5
-80000754:	00730333          	add	t1,t1,t2
-80000758:	00032e03          	lw	t3,0(t1)
-8000075c:	01c5a023          	sw	t3,0(a1)
-80000760:	00432e03          	lw	t3,4(t1)
-80000764:	01c5a223          	sw	t3,4(a1)
-80000768:	00832e03          	lw	t3,8(t1)
-8000076c:	01c5a423          	sw	t3,8(a1)
-80000770:	00c32e03          	lw	t3,12(t1)
-80000774:	01c5a623          	sw	t3,12(a1)
-80000778:	01032e03          	lw	t3,16(t1)
-8000077c:	01c5a823          	sw	t3,16(a1)
-80000780:	01432e03          	lw	t3,20(t1)
-80000784:	01c5aa23          	sw	t3,20(a1)
-80000788:	00008067          	ret
+80000740 <dc>:
+80000740:	01e2a023          	sw	t5,0(t0)
+80000744:	005e9393          	slli	t2,t4,0x5
+80000748:	00730333          	add	t1,t1,t2
+8000074c:	00032e03          	lw	t3,0(t1)
+80000750:	01c5a023          	sw	t3,0(a1)
+80000754:	00432e03          	lw	t3,4(t1)
+80000758:	01c5a223          	sw	t3,4(a1)
+8000075c:	00832e03          	lw	t3,8(t1)
+80000760:	01c5a423          	sw	t3,8(a1)
+80000764:	00c32e03          	lw	t3,12(t1)
+80000768:	01c5a623          	sw	t3,12(a1)
+8000076c:	01032e03          	lw	t3,16(t1)
+80000770:	01c5a823          	sw	t3,16(a1)
+80000774:	01432e03          	lw	t3,20(t1)
+80000778:	01c5aa23          	sw	t3,20(a1)
+8000077c:	00008067          	ret
 
-8000078c <queue_isFull>:
-8000078c:	00050293          	mv	t0,a0
-80000790:	0082a303          	lw	t1,8(t0)
-80000794:	00000513          	li	a0,0
-80000798:	03200e13          	li	t3,50
-8000079c:	006e1463          	bne	t3,t1,800007a4 <qf>
-800007a0:	00150513          	addi	a0,a0,1
+80000780 <queue_isFull>:
+80000780:	00050293          	mv	t0,a0
+80000784:	0082a303          	lw	t1,8(t0)
+80000788:	00000513          	li	a0,0
+8000078c:	03200e13          	li	t3,50
+80000790:	006e1463          	bne	t3,t1,80000798 <qf>
+80000794:	00150513          	addi	a0,a0,1
 
-800007a4 <qf>:
-800007a4:	00008067          	ret
+80000798 <qf>:
+80000798:	00008067          	ret
 
-800007a8 <queue_isEmpty>:
-800007a8:	00050293          	mv	t0,a0
-800007ac:	0082a303          	lw	t1,8(t0)
-800007b0:	00000513          	li	a0,0
-800007b4:	00000e13          	li	t3,0
-800007b8:	006e1463          	bne	t3,t1,800007c0 <qe>
-800007bc:	00150513          	addi	a0,a0,1
+8000079c <queue_isEmpty>:
+8000079c:	00050293          	mv	t0,a0
+800007a0:	0082a303          	lw	t1,8(t0)
+800007a4:	00000513          	li	a0,0
+800007a8:	00000e13          	li	t3,0
+800007ac:	006e1463          	bne	t3,t1,800007b4 <qe>
+800007b0:	00150513          	addi	a0,a0,1
 
-800007c0 <qe>:
-800007c0:	00008067          	ret
+800007b4 <qe>:
+800007b4:	00008067          	ret
 
-800007c4 <queue_availableWarps>:
-800007c4:	00050293          	mv	t0,a0
-800007c8:	00c2a303          	lw	t1,12(t0)
-800007cc:	0102a383          	lw	t2,16(t0)
-800007d0:	0063b533          	sltu	a0,t2,t1
-800007d4:	00008067          	ret
+800007b8 <queue_availableWarps>:
+800007b8:	00050293          	mv	t0,a0
+800007bc:	00c2a303          	lw	t1,12(t0)
+800007c0:	0102a383          	lw	t2,16(t0)
+800007c4:	0063b533          	sltu	a0,t2,t1
+800007c8:	00008067          	ret
 
-800007d8 <vx_print_str>:
-800007d8:	ff410113          	addi	sp,sp,-12
-800007dc:	00112023          	sw	ra,0(sp)
-800007e0:	00b12223          	sw	a1,4(sp)
+800007cc <vx_print_str>:
+800007cc:	ff410113          	addi	sp,sp,-12
+800007d0:	00112023          	sw	ra,0(sp)
+800007d4:	00b12223          	sw	a1,4(sp)
 
-800007e4 <bl>:
-800007e4:	00054583          	lbu	a1,0(a0)
-800007e8:	00058863          	beqz	a1,800007f8 <be>
-800007ec:	01c000ef          	jal	ra,80000808 <vx_printc>
-800007f0:	00150513          	addi	a0,a0,1
-800007f4:	ff1ff06f          	j	800007e4 <bl>
+800007d8 <bl>:
+800007d8:	00054583          	lbu	a1,0(a0)
+800007dc:	00058863          	beqz	a1,800007ec <be>
+800007e0:	01c000ef          	jal	ra,800007fc <vx_printc>
+800007e4:	00150513          	addi	a0,a0,1
+800007e8:	ff1ff06f          	j	800007d8 <bl>
 
-800007f8 <be>:
-800007f8:	00012083          	lw	ra,0(sp)
-800007fc:	00412583          	lw	a1,4(sp)
-80000800:	00c10113          	addi	sp,sp,12
+800007ec <be>:
+800007ec:	00012083          	lw	ra,0(sp)
+800007f0:	00412583          	lw	a1,4(sp)
+800007f4:	00c10113          	addi	sp,sp,12
+800007f8:	00008067          	ret
+
+800007fc <vx_printc>:
+800007fc:	000108b7          	lui	a7,0x10
+80000800:	00b8a023          	sw	a1,0(a7) # 10000 <SIZE+0xffce>
 80000804:	00008067          	ret
 
-80000808 <vx_printc>:
-80000808:	000108b7          	lui	a7,0x10
-8000080c:	00b8a023          	sw	a1,0(a7) # 10000 <SIZE+0xffce>
-80000810:	00008067          	ret
-
-80000814 <vx_print_hex>:
-80000814:	fd010113          	addi	sp,sp,-48
-80000818:	02112623          	sw	ra,44(sp)
-8000081c:	02812423          	sw	s0,40(sp)
-80000820:	03010413          	addi	s0,sp,48
-80000824:	fca42e23          	sw	a0,-36(s0)
-80000828:	fdc42703          	lw	a4,-36(s0)
-8000082c:	00f00793          	li	a5,15
-80000830:	02e7e463          	bltu	a5,a4,80000858 <vx_print_hex+0x44>
-80000834:	810007b7          	lui	a5,0x81000
-80000838:	fdc42703          	lw	a4,-36(s0)
-8000083c:	00271713          	slli	a4,a4,0x2
-80000840:	1a878793          	addi	a5,a5,424 # 810001a8 <barrier_bool+0xfffd6ee4>
-80000844:	00f707b3          	add	a5,a4,a5
-80000848:	0007a783          	lw	a5,0(a5)
-8000084c:	00078513          	mv	a0,a5
-80000850:	f89ff0ef          	jal	ra,800007d8 <vx_print_str>
-80000854:	0740006f          	j	800008c8 <vx_print_hex+0xb4>
-80000858:	02000793          	li	a5,32
-8000085c:	fef42623          	sw	a5,-20(s0)
-80000860:	fe0405a3          	sb	zero,-21(s0)
-80000864:	fec42783          	lw	a5,-20(s0)
-80000868:	ffc78793          	addi	a5,a5,-4
-8000086c:	fdc42703          	lw	a4,-36(s0)
-80000870:	00f757b3          	srl	a5,a4,a5
-80000874:	00f7f793          	andi	a5,a5,15
-80000878:	fef42223          	sw	a5,-28(s0)
-8000087c:	fe442783          	lw	a5,-28(s0)
-80000880:	00078663          	beqz	a5,8000088c <vx_print_hex+0x78>
-80000884:	00100793          	li	a5,1
-80000888:	fef405a3          	sb	a5,-21(s0)
-8000088c:	feb44783          	lbu	a5,-21(s0)
-80000890:	02078263          	beqz	a5,800008b4 <vx_print_hex+0xa0>
-80000894:	810007b7          	lui	a5,0x81000
-80000898:	fe442703          	lw	a4,-28(s0)
-8000089c:	00271713          	slli	a4,a4,0x2
-800008a0:	1a878793          	addi	a5,a5,424 # 810001a8 <barrier_bool+0xfffd6ee4>
-800008a4:	00f707b3          	add	a5,a4,a5
-800008a8:	0007a783          	lw	a5,0(a5)
-800008ac:	00078513          	mv	a0,a5
-800008b0:	f29ff0ef          	jal	ra,800007d8 <vx_print_str>
+80000808 <vx_print_hex>:
+80000808:	fd010113          	addi	sp,sp,-48
+8000080c:	02112623          	sw	ra,44(sp)
+80000810:	02812423          	sw	s0,40(sp)
+80000814:	03010413          	addi	s0,sp,48
+80000818:	fca42e23          	sw	a0,-36(s0)
+8000081c:	fdc42703          	lw	a4,-36(s0)
+80000820:	00f00793          	li	a5,15
+80000824:	02e7e463          	bltu	a5,a4,8000084c <vx_print_hex+0x44>
+80000828:	810007b7          	lui	a5,0x81000
+8000082c:	fdc42703          	lw	a4,-36(s0)
+80000830:	00271713          	slli	a4,a4,0x2
+80000834:	1a878793          	addi	a5,a5,424 # 810001a8 <barrier_bool+0xfffd6ee4>
+80000838:	00f707b3          	add	a5,a4,a5
+8000083c:	0007a783          	lw	a5,0(a5)
+80000840:	00078513          	mv	a0,a5
+80000844:	f89ff0ef          	jal	ra,800007cc <vx_print_str>
+80000848:	0740006f          	j	800008bc <vx_print_hex+0xb4>
+8000084c:	02000793          	li	a5,32
+80000850:	fef42623          	sw	a5,-20(s0)
+80000854:	fe0405a3          	sb	zero,-21(s0)
+80000858:	fec42783          	lw	a5,-20(s0)
+8000085c:	ffc78793          	addi	a5,a5,-4
+80000860:	fdc42703          	lw	a4,-36(s0)
+80000864:	00f757b3          	srl	a5,a4,a5
+80000868:	00f7f793          	andi	a5,a5,15
+8000086c:	fef42223          	sw	a5,-28(s0)
+80000870:	fe442783          	lw	a5,-28(s0)
+80000874:	00078663          	beqz	a5,80000880 <vx_print_hex+0x78>
+80000878:	00100793          	li	a5,1
+8000087c:	fef405a3          	sb	a5,-21(s0)
+80000880:	feb44783          	lbu	a5,-21(s0)
+80000884:	02078263          	beqz	a5,800008a8 <vx_print_hex+0xa0>
+80000888:	810007b7          	lui	a5,0x81000
+8000088c:	fe442703          	lw	a4,-28(s0)
+80000890:	00271713          	slli	a4,a4,0x2
+80000894:	1a878793          	addi	a5,a5,424 # 810001a8 <barrier_bool+0xfffd6ee4>
+80000898:	00f707b3          	add	a5,a4,a5
+8000089c:	0007a783          	lw	a5,0(a5)
+800008a0:	00078513          	mv	a0,a5
+800008a4:	f29ff0ef          	jal	ra,800007cc <vx_print_str>
+800008a8:	fec42783          	lw	a5,-20(s0)
+800008ac:	ffc78793          	addi	a5,a5,-4
+800008b0:	fef42623          	sw	a5,-20(s0)
 800008b4:	fec42783          	lw	a5,-20(s0)
-800008b8:	ffc78793          	addi	a5,a5,-4
-800008bc:	fef42623          	sw	a5,-20(s0)
-800008c0:	fec42783          	lw	a5,-20(s0)
-800008c4:	faf040e3          	bgtz	a5,80000864 <vx_print_hex+0x50>
-800008c8:	02c12083          	lw	ra,44(sp)
-800008cc:	02812403          	lw	s0,40(sp)
-800008d0:	03010113          	addi	sp,sp,48
-800008d4:	00008067          	ret
+800008b8:	faf040e3          	bgtz	a5,80000858 <vx_print_hex+0x50>
+800008bc:	02c12083          	lw	ra,44(sp)
+800008c0:	02812403          	lw	s0,40(sp)
+800008c4:	03010113          	addi	sp,sp,48
+800008c8:	00008067          	ret
 
-800008d8 <vx_printf>:
-800008d8:	fe010113          	addi	sp,sp,-32
-800008dc:	00112e23          	sw	ra,28(sp)
-800008e0:	00812c23          	sw	s0,24(sp)
-800008e4:	02010413          	addi	s0,sp,32
-800008e8:	fea42623          	sw	a0,-20(s0)
-800008ec:	feb42423          	sw	a1,-24(s0)
-800008f0:	fec42503          	lw	a0,-20(s0)
-800008f4:	ee5ff0ef          	jal	ra,800007d8 <vx_print_str>
-800008f8:	fe842503          	lw	a0,-24(s0)
-800008fc:	f19ff0ef          	jal	ra,80000814 <vx_print_hex>
-80000900:	810007b7          	lui	a5,0x81000
-80000904:	09478513          	addi	a0,a5,148 # 81000094 <barrier_bool+0xfffd6dd0>
-80000908:	ed1ff0ef          	jal	ra,800007d8 <vx_print_str>
-8000090c:	00000013          	nop
-80000910:	01c12083          	lw	ra,28(sp)
-80000914:	01812403          	lw	s0,24(sp)
-80000918:	02010113          	addi	sp,sp,32
-8000091c:	00008067          	ret
+800008cc <vx_printf>:
+800008cc:	fe010113          	addi	sp,sp,-32
+800008d0:	00112e23          	sw	ra,28(sp)
+800008d4:	00812c23          	sw	s0,24(sp)
+800008d8:	02010413          	addi	s0,sp,32
+800008dc:	fea42623          	sw	a0,-20(s0)
+800008e0:	feb42423          	sw	a1,-24(s0)
+800008e4:	fec42503          	lw	a0,-20(s0)
+800008e8:	ee5ff0ef          	jal	ra,800007cc <vx_print_str>
+800008ec:	fe842503          	lw	a0,-24(s0)
+800008f0:	f19ff0ef          	jal	ra,80000808 <vx_print_hex>
+800008f4:	810007b7          	lui	a5,0x81000
+800008f8:	09478513          	addi	a0,a5,148 # 81000094 <barrier_bool+0xfffd6dd0>
+800008fc:	ed1ff0ef          	jal	ra,800007cc <vx_print_str>
+80000900:	00000013          	nop
+80000904:	01c12083          	lw	ra,28(sp)
+80000908:	01812403          	lw	s0,24(sp)
+8000090c:	02010113          	addi	sp,sp,32
+80000910:	00008067          	ret
 
-80000920 <vx_sq_mat_mult>:
-80000920:	fd010113          	addi	sp,sp,-48
-80000924:	02112623          	sw	ra,44(sp)
-80000928:	02812423          	sw	s0,40(sp)
-8000092c:	03010413          	addi	s0,sp,48
-80000930:	fca42e23          	sw	a0,-36(s0)
-80000934:	fcb42c23          	sw	a1,-40(s0)
-80000938:	fcc42a23          	sw	a2,-44(s0)
-8000093c:	fcd42823          	sw	a3,-48(s0)
+80000914 <vx_sq_mat_mult>:
+80000914:	fd010113          	addi	sp,sp,-48
+80000918:	02112623          	sw	ra,44(sp)
+8000091c:	02812423          	sw	s0,40(sp)
+80000920:	03010413          	addi	s0,sp,48
+80000924:	fca42e23          	sw	a0,-36(s0)
+80000928:	fcb42c23          	sw	a1,-40(s0)
+8000092c:	fcc42a23          	sw	a2,-44(s0)
+80000930:	fcd42823          	sw	a3,-48(s0)
+80000934:	810267b7          	lui	a5,0x81026
+80000938:	fdc42703          	lw	a4,-36(s0)
+8000093c:	1ae7ac23          	sw	a4,440(a5) # 810261b8 <barrier_bool+0xffffcef4>
 80000940:	810267b7          	lui	a5,0x81026
-80000944:	fdc42703          	lw	a4,-36(s0)
-80000948:	1ae7ac23          	sw	a4,440(a5) # 810261b8 <barrier_bool+0xffffcef4>
-8000094c:	810267b7          	lui	a5,0x81026
-80000950:	1b878793          	addi	a5,a5,440 # 810261b8 <barrier_bool+0xffffcef4>
-80000954:	fd842703          	lw	a4,-40(s0)
-80000958:	00e7a223          	sw	a4,4(a5)
-8000095c:	810267b7          	lui	a5,0x81026
-80000960:	1b878793          	addi	a5,a5,440 # 810261b8 <barrier_bool+0xffffcef4>
-80000964:	fd442703          	lw	a4,-44(s0)
-80000968:	00e7a423          	sw	a4,8(a5)
-8000096c:	810267b7          	lui	a5,0x81026
-80000970:	1b878793          	addi	a5,a5,440 # 810261b8 <barrier_bool+0xffffcef4>
-80000974:	fd042703          	lw	a4,-48(s0)
-80000978:	00e7a623          	sw	a4,12(a5)
-8000097c:	881ff0ef          	jal	ra,800001fc <vx_available_threads>
-80000980:	fea42423          	sw	a0,-24(s0)
-80000984:	fd042703          	lw	a4,-48(s0)
-80000988:	fe842783          	lw	a5,-24(s0)
-8000098c:	02f757b3          	divu	a5,a4,a5
-80000990:	fef42623          	sw	a5,-20(s0)
-80000994:	fd042703          	lw	a4,-48(s0)
-80000998:	fe842783          	lw	a5,-24(s0)
-8000099c:	02f777b3          	remu	a5,a4,a5
-800009a0:	00078863          	beqz	a5,800009b0 <vx_sq_mat_mult+0x90>
-800009a4:	fec42783          	lw	a5,-20(s0)
-800009a8:	00178793          	addi	a5,a5,1
-800009ac:	fef42623          	sw	a5,-20(s0)
-800009b0:	810267b7          	lui	a5,0x81026
-800009b4:	1b878793          	addi	a5,a5,440 # 810261b8 <barrier_bool+0xffffcef4>
-800009b8:	fec42703          	lw	a4,-20(s0)
-800009bc:	00e7a823          	sw	a4,16(a5)
-800009c0:	fd042703          	lw	a4,-48(s0)
-800009c4:	fe842783          	lw	a5,-24(s0)
-800009c8:	02f76263          	bltu	a4,a5,800009ec <vx_sq_mat_mult+0xcc>
-800009cc:	810267b7          	lui	a5,0x81026
-800009d0:	1b878693          	addi	a3,a5,440 # 810261b8 <barrier_bool+0xffffcef4>
-800009d4:	800017b7          	lui	a5,0x80001
-800009d8:	a4478613          	addi	a2,a5,-1468 # 80000a44 <barrier_bool+0xfefd7780>
-800009dc:	fe842583          	lw	a1,-24(s0)
-800009e0:	fd042503          	lw	a0,-48(s0)
-800009e4:	a91ff0ef          	jal	ra,80000474 <vx_spawnWarps>
-800009e8:	0200006f          	j	80000a08 <vx_sq_mat_mult+0xe8>
-800009ec:	810267b7          	lui	a5,0x81026
-800009f0:	1b878693          	addi	a3,a5,440 # 810261b8 <barrier_bool+0xffffcef4>
-800009f4:	800017b7          	lui	a5,0x80001
-800009f8:	a4478613          	addi	a2,a5,-1468 # 80000a44 <barrier_bool+0xfefd7780>
-800009fc:	fd042583          	lw	a1,-48(s0)
-80000a00:	fd042503          	lw	a0,-48(s0)
-80000a04:	a71ff0ef          	jal	ra,80000474 <vx_spawnWarps>
-80000a08:	fecff0ef          	jal	ra,800001f4 <vx_available_warps>
-80000a0c:	fea42223          	sw	a0,-28(s0)
-80000a10:	fd042703          	lw	a4,-48(s0)
-80000a14:	fe442783          	lw	a5,-28(s0)
-80000a18:	00e7f863          	bgeu	a5,a4,80000a28 <vx_sq_mat_mult+0x108>
-80000a1c:	fe442503          	lw	a0,-28(s0)
-80000a20:	b45ff0ef          	jal	ra,80000564 <vx_wait_for_warps>
-80000a24:	00c0006f          	j	80000a30 <vx_sq_mat_mult+0x110>
-80000a28:	fd042503          	lw	a0,-48(s0)
-80000a2c:	b39ff0ef          	jal	ra,80000564 <vx_wait_for_warps>
-80000a30:	00000013          	nop
-80000a34:	02c12083          	lw	ra,44(sp)
-80000a38:	02812403          	lw	s0,40(sp)
-80000a3c:	03010113          	addi	sp,sp,48
-80000a40:	00008067          	ret
+80000944:	1b878793          	addi	a5,a5,440 # 810261b8 <barrier_bool+0xffffcef4>
+80000948:	fd842703          	lw	a4,-40(s0)
+8000094c:	00e7a223          	sw	a4,4(a5)
+80000950:	810267b7          	lui	a5,0x81026
+80000954:	1b878793          	addi	a5,a5,440 # 810261b8 <barrier_bool+0xffffcef4>
+80000958:	fd442703          	lw	a4,-44(s0)
+8000095c:	00e7a423          	sw	a4,8(a5)
+80000960:	810267b7          	lui	a5,0x81026
+80000964:	1b878793          	addi	a5,a5,440 # 810261b8 <barrier_bool+0xffffcef4>
+80000968:	fd042703          	lw	a4,-48(s0)
+8000096c:	00e7a623          	sw	a4,12(a5)
+80000970:	881ff0ef          	jal	ra,800001f0 <vx_available_threads>
+80000974:	fea42423          	sw	a0,-24(s0)
+80000978:	fd042703          	lw	a4,-48(s0)
+8000097c:	fe842783          	lw	a5,-24(s0)
+80000980:	02f757b3          	divu	a5,a4,a5
+80000984:	fef42623          	sw	a5,-20(s0)
+80000988:	fd042703          	lw	a4,-48(s0)
+8000098c:	fe842783          	lw	a5,-24(s0)
+80000990:	02f777b3          	remu	a5,a4,a5
+80000994:	00078863          	beqz	a5,800009a4 <vx_sq_mat_mult+0x90>
+80000998:	fec42783          	lw	a5,-20(s0)
+8000099c:	00178793          	addi	a5,a5,1
+800009a0:	fef42623          	sw	a5,-20(s0)
+800009a4:	810267b7          	lui	a5,0x81026
+800009a8:	1b878793          	addi	a5,a5,440 # 810261b8 <barrier_bool+0xffffcef4>
+800009ac:	fec42703          	lw	a4,-20(s0)
+800009b0:	00e7a823          	sw	a4,16(a5)
+800009b4:	fd042703          	lw	a4,-48(s0)
+800009b8:	fe842783          	lw	a5,-24(s0)
+800009bc:	02f76263          	bltu	a4,a5,800009e0 <vx_sq_mat_mult+0xcc>
+800009c0:	810267b7          	lui	a5,0x81026
+800009c4:	1b878693          	addi	a3,a5,440 # 810261b8 <barrier_bool+0xffffcef4>
+800009c8:	800017b7          	lui	a5,0x80001
+800009cc:	a3878613          	addi	a2,a5,-1480 # 80000a38 <barrier_bool+0xfefd7774>
+800009d0:	fe842583          	lw	a1,-24(s0)
+800009d4:	fd042503          	lw	a0,-48(s0)
+800009d8:	a91ff0ef          	jal	ra,80000468 <vx_spawnWarps>
+800009dc:	0200006f          	j	800009fc <vx_sq_mat_mult+0xe8>
+800009e0:	810267b7          	lui	a5,0x81026
+800009e4:	1b878693          	addi	a3,a5,440 # 810261b8 <barrier_bool+0xffffcef4>
+800009e8:	800017b7          	lui	a5,0x80001
+800009ec:	a3878613          	addi	a2,a5,-1480 # 80000a38 <barrier_bool+0xfefd7774>
+800009f0:	fd042583          	lw	a1,-48(s0)
+800009f4:	fd042503          	lw	a0,-48(s0)
+800009f8:	a71ff0ef          	jal	ra,80000468 <vx_spawnWarps>
+800009fc:	fecff0ef          	jal	ra,800001e8 <vx_available_warps>
+80000a00:	fea42223          	sw	a0,-28(s0)
+80000a04:	fd042703          	lw	a4,-48(s0)
+80000a08:	fe442783          	lw	a5,-28(s0)
+80000a0c:	00e7f863          	bgeu	a5,a4,80000a1c <vx_sq_mat_mult+0x108>
+80000a10:	fe442503          	lw	a0,-28(s0)
+80000a14:	b45ff0ef          	jal	ra,80000558 <vx_wait_for_warps>
+80000a18:	00c0006f          	j	80000a24 <vx_sq_mat_mult+0x110>
+80000a1c:	fd042503          	lw	a0,-48(s0)
+80000a20:	b39ff0ef          	jal	ra,80000558 <vx_wait_for_warps>
+80000a24:	00000013          	nop
+80000a28:	02c12083          	lw	ra,44(sp)
+80000a2c:	02812403          	lw	s0,40(sp)
+80000a30:	03010113          	addi	sp,sp,48
+80000a34:	00008067          	ret
 
-80000a44 <_vx_mat_mult>:
-80000a44:	fa010113          	addi	sp,sp,-96
-80000a48:	04112e23          	sw	ra,92(sp)
-80000a4c:	04812c23          	sw	s0,88(sp)
-80000a50:	06010413          	addi	s0,sp,96
-80000a54:	faa42623          	sw	a0,-84(s0)
-80000a58:	fab42423          	sw	a1,-88(s0)
-80000a5c:	bf9ff0ef          	jal	ra,80000654 <vx_get_arg_struct>
-80000a60:	fca42c23          	sw	a0,-40(s0)
+80000a38 <_vx_mat_mult>:
+80000a38:	fa010113          	addi	sp,sp,-96
+80000a3c:	04112e23          	sw	ra,92(sp)
+80000a40:	04812c23          	sw	s0,88(sp)
+80000a44:	06010413          	addi	s0,sp,96
+80000a48:	faa42623          	sw	a0,-84(s0)
+80000a4c:	fab42423          	sw	a1,-88(s0)
+80000a50:	bf9ff0ef          	jal	ra,80000648 <vx_get_arg_struct>
+80000a54:	fca42c23          	sw	a0,-40(s0)
+80000a58:	fd842783          	lw	a5,-40(s0)
+80000a5c:	0007a783          	lw	a5,0(a5)
+80000a60:	fcf42a23          	sw	a5,-44(s0)
 80000a64:	fd842783          	lw	a5,-40(s0)
-80000a68:	0007a783          	lw	a5,0(a5)
-80000a6c:	fcf42a23          	sw	a5,-44(s0)
+80000a68:	0047a783          	lw	a5,4(a5)
+80000a6c:	fcf42823          	sw	a5,-48(s0)
 80000a70:	fd842783          	lw	a5,-40(s0)
-80000a74:	0047a783          	lw	a5,4(a5)
-80000a78:	fcf42823          	sw	a5,-48(s0)
+80000a74:	0087a783          	lw	a5,8(a5)
+80000a78:	fcf42623          	sw	a5,-52(s0)
 80000a7c:	fd842783          	lw	a5,-40(s0)
-80000a80:	0087a783          	lw	a5,8(a5)
-80000a84:	fcf42623          	sw	a5,-52(s0)
-80000a88:	fd842783          	lw	a5,-40(s0)
-80000a8c:	0107a783          	lw	a5,16(a5)
-80000a90:	fef42623          	sw	a5,-20(s0)
-80000a94:	fec42703          	lw	a4,-20(s0)
-80000a98:	fac42783          	lw	a5,-84(s0)
-80000a9c:	02f707b3          	mul	a5,a4,a5
-80000aa0:	fef42423          	sw	a5,-24(s0)
-80000aa4:	fec42783          	lw	a5,-20(s0)
-80000aa8:	00079a63          	bnez	a5,80000abc <_vx_mat_mult+0x78>
-80000aac:	00100793          	li	a5,1
-80000ab0:	fef42623          	sw	a5,-20(s0)
-80000ab4:	fac42783          	lw	a5,-84(s0)
-80000ab8:	fef42423          	sw	a5,-24(s0)
-80000abc:	fd842783          	lw	a5,-40(s0)
-80000ac0:	00c7a783          	lw	a5,12(a5)
-80000ac4:	fcf42423          	sw	a5,-56(s0)
-80000ac8:	fe042223          	sw	zero,-28(s0)
-80000acc:	0d80006f          	j	80000ba4 <_vx_mat_mult+0x160>
-80000ad0:	fe042023          	sw	zero,-32(s0)
-80000ad4:	fc042e23          	sw	zero,-36(s0)
-80000ad8:	0780006f          	j	80000b50 <_vx_mat_mult+0x10c>
-80000adc:	fa842703          	lw	a4,-88(s0)
-80000ae0:	fc842783          	lw	a5,-56(s0)
-80000ae4:	02f707b3          	mul	a5,a4,a5
-80000ae8:	fdc42703          	lw	a4,-36(s0)
-80000aec:	00f707b3          	add	a5,a4,a5
-80000af0:	fcf42223          	sw	a5,-60(s0)
-80000af4:	fc842703          	lw	a4,-56(s0)
-80000af8:	fdc42783          	lw	a5,-36(s0)
-80000afc:	02f707b3          	mul	a5,a4,a5
-80000b00:	fe842703          	lw	a4,-24(s0)
-80000b04:	00f707b3          	add	a5,a4,a5
-80000b08:	fcf42023          	sw	a5,-64(s0)
-80000b0c:	fc442783          	lw	a5,-60(s0)
-80000b10:	00279793          	slli	a5,a5,0x2
-80000b14:	fd442703          	lw	a4,-44(s0)
-80000b18:	00f707b3          	add	a5,a4,a5
-80000b1c:	0007a703          	lw	a4,0(a5)
-80000b20:	fc042783          	lw	a5,-64(s0)
-80000b24:	00279793          	slli	a5,a5,0x2
-80000b28:	fd042683          	lw	a3,-48(s0)
-80000b2c:	00f687b3          	add	a5,a3,a5
-80000b30:	0007a783          	lw	a5,0(a5)
-80000b34:	02f707b3          	mul	a5,a4,a5
-80000b38:	fe042703          	lw	a4,-32(s0)
-80000b3c:	00f707b3          	add	a5,a4,a5
-80000b40:	fef42023          	sw	a5,-32(s0)
-80000b44:	fdc42783          	lw	a5,-36(s0)
-80000b48:	00178793          	addi	a5,a5,1
-80000b4c:	fcf42e23          	sw	a5,-36(s0)
-80000b50:	fdc42703          	lw	a4,-36(s0)
+80000a80:	0107a783          	lw	a5,16(a5)
+80000a84:	fef42623          	sw	a5,-20(s0)
+80000a88:	fec42703          	lw	a4,-20(s0)
+80000a8c:	fac42783          	lw	a5,-84(s0)
+80000a90:	02f707b3          	mul	a5,a4,a5
+80000a94:	fef42423          	sw	a5,-24(s0)
+80000a98:	fec42783          	lw	a5,-20(s0)
+80000a9c:	00079a63          	bnez	a5,80000ab0 <_vx_mat_mult+0x78>
+80000aa0:	00100793          	li	a5,1
+80000aa4:	fef42623          	sw	a5,-20(s0)
+80000aa8:	fac42783          	lw	a5,-84(s0)
+80000aac:	fef42423          	sw	a5,-24(s0)
+80000ab0:	fd842783          	lw	a5,-40(s0)
+80000ab4:	00c7a783          	lw	a5,12(a5)
+80000ab8:	fcf42423          	sw	a5,-56(s0)
+80000abc:	fe042223          	sw	zero,-28(s0)
+80000ac0:	0d80006f          	j	80000b98 <_vx_mat_mult+0x160>
+80000ac4:	fe042023          	sw	zero,-32(s0)
+80000ac8:	fc042e23          	sw	zero,-36(s0)
+80000acc:	0780006f          	j	80000b44 <_vx_mat_mult+0x10c>
+80000ad0:	fa842703          	lw	a4,-88(s0)
+80000ad4:	fc842783          	lw	a5,-56(s0)
+80000ad8:	02f707b3          	mul	a5,a4,a5
+80000adc:	fdc42703          	lw	a4,-36(s0)
+80000ae0:	00f707b3          	add	a5,a4,a5
+80000ae4:	fcf42223          	sw	a5,-60(s0)
+80000ae8:	fc842703          	lw	a4,-56(s0)
+80000aec:	fdc42783          	lw	a5,-36(s0)
+80000af0:	02f707b3          	mul	a5,a4,a5
+80000af4:	fe842703          	lw	a4,-24(s0)
+80000af8:	00f707b3          	add	a5,a4,a5
+80000afc:	fcf42023          	sw	a5,-64(s0)
+80000b00:	fc442783          	lw	a5,-60(s0)
+80000b04:	00279793          	slli	a5,a5,0x2
+80000b08:	fd442703          	lw	a4,-44(s0)
+80000b0c:	00f707b3          	add	a5,a4,a5
+80000b10:	0007a703          	lw	a4,0(a5)
+80000b14:	fc042783          	lw	a5,-64(s0)
+80000b18:	00279793          	slli	a5,a5,0x2
+80000b1c:	fd042683          	lw	a3,-48(s0)
+80000b20:	00f687b3          	add	a5,a3,a5
+80000b24:	0007a783          	lw	a5,0(a5)
+80000b28:	02f707b3          	mul	a5,a4,a5
+80000b2c:	fe042703          	lw	a4,-32(s0)
+80000b30:	00f707b3          	add	a5,a4,a5
+80000b34:	fef42023          	sw	a5,-32(s0)
+80000b38:	fdc42783          	lw	a5,-36(s0)
+80000b3c:	00178793          	addi	a5,a5,1
+80000b40:	fcf42e23          	sw	a5,-36(s0)
+80000b44:	fdc42703          	lw	a4,-36(s0)
+80000b48:	fc842783          	lw	a5,-56(s0)
+80000b4c:	f8f762e3          	bltu	a4,a5,80000ad0 <_vx_mat_mult+0x98>
+80000b50:	fa842703          	lw	a4,-88(s0)
 80000b54:	fc842783          	lw	a5,-56(s0)
-80000b58:	f8f762e3          	bltu	a4,a5,80000adc <_vx_mat_mult+0x98>
-80000b5c:	fa842703          	lw	a4,-88(s0)
-80000b60:	fc842783          	lw	a5,-56(s0)
-80000b64:	02f70733          	mul	a4,a4,a5
-80000b68:	fe842783          	lw	a5,-24(s0)
-80000b6c:	00f707b3          	add	a5,a4,a5
-80000b70:	faf42e23          	sw	a5,-68(s0)
-80000b74:	fbc42783          	lw	a5,-68(s0)
-80000b78:	00279793          	slli	a5,a5,0x2
-80000b7c:	fcc42703          	lw	a4,-52(s0)
-80000b80:	00f707b3          	add	a5,a4,a5
-80000b84:	fe042703          	lw	a4,-32(s0)
-80000b88:	00e7a023          	sw	a4,0(a5)
-80000b8c:	fe842783          	lw	a5,-24(s0)
+80000b58:	02f70733          	mul	a4,a4,a5
+80000b5c:	fe842783          	lw	a5,-24(s0)
+80000b60:	00f707b3          	add	a5,a4,a5
+80000b64:	faf42e23          	sw	a5,-68(s0)
+80000b68:	fbc42783          	lw	a5,-68(s0)
+80000b6c:	00279793          	slli	a5,a5,0x2
+80000b70:	fcc42703          	lw	a4,-52(s0)
+80000b74:	00f707b3          	add	a5,a4,a5
+80000b78:	fe042703          	lw	a4,-32(s0)
+80000b7c:	00e7a023          	sw	a4,0(a5)
+80000b80:	fe842783          	lw	a5,-24(s0)
+80000b84:	00178793          	addi	a5,a5,1
+80000b88:	fef42423          	sw	a5,-24(s0)
+80000b8c:	fe442783          	lw	a5,-28(s0)
 80000b90:	00178793          	addi	a5,a5,1
-80000b94:	fef42423          	sw	a5,-24(s0)
+80000b94:	fef42223          	sw	a5,-28(s0)
 80000b98:	fe442783          	lw	a5,-28(s0)
-80000b9c:	00178793          	addi	a5,a5,1
-80000ba0:	fef42223          	sw	a5,-28(s0)
-80000ba4:	fe442783          	lw	a5,-28(s0)
-80000ba8:	fec42703          	lw	a4,-20(s0)
-80000bac:	f2e7e2e3          	bltu	a5,a4,80000ad0 <_vx_mat_mult+0x8c>
-80000bb0:	00000013          	nop
-80000bb4:	05c12083          	lw	ra,92(sp)
-80000bb8:	05812403          	lw	s0,88(sp)
-80000bbc:	06010113          	addi	sp,sp,96
-80000bc0:	00008067          	ret
+80000b9c:	fec42703          	lw	a4,-20(s0)
+80000ba0:	f2e7e2e3          	bltu	a5,a4,80000ac4 <_vx_mat_mult+0x8c>
+80000ba4:	00000013          	nop
+80000ba8:	05c12083          	lw	ra,92(sp)
+80000bac:	05812403          	lw	s0,88(sp)
+80000bb0:	06010113          	addi	sp,sp,96
+80000bb4:	00008067          	ret
 
-80000bc4 <vx_mat_add>:
-80000bc4:	fc010113          	addi	sp,sp,-64
-80000bc8:	02112e23          	sw	ra,60(sp)
-80000bcc:	02812c23          	sw	s0,56(sp)
-80000bd0:	04010413          	addi	s0,sp,64
-80000bd4:	fca42e23          	sw	a0,-36(s0)
-80000bd8:	fcb42c23          	sw	a1,-40(s0)
-80000bdc:	fcc42a23          	sw	a2,-44(s0)
-80000be0:	fcd42823          	sw	a3,-48(s0)
-80000be4:	fce42623          	sw	a4,-52(s0)
+80000bb8 <vx_mat_add>:
+80000bb8:	fc010113          	addi	sp,sp,-64
+80000bbc:	02112e23          	sw	ra,60(sp)
+80000bc0:	02812c23          	sw	s0,56(sp)
+80000bc4:	04010413          	addi	s0,sp,64
+80000bc8:	fca42e23          	sw	a0,-36(s0)
+80000bcc:	fcb42c23          	sw	a1,-40(s0)
+80000bd0:	fcc42a23          	sw	a2,-44(s0)
+80000bd4:	fcd42823          	sw	a3,-48(s0)
+80000bd8:	fce42623          	sw	a4,-52(s0)
+80000bdc:	810267b7          	lui	a5,0x81026
+80000be0:	fdc42703          	lw	a4,-36(s0)
+80000be4:	1ce7a623          	sw	a4,460(a5) # 810261cc <barrier_bool+0xffffcf08>
 80000be8:	810267b7          	lui	a5,0x81026
-80000bec:	fdc42703          	lw	a4,-36(s0)
-80000bf0:	1ce7a623          	sw	a4,460(a5) # 810261cc <barrier_bool+0xffffcf08>
-80000bf4:	810267b7          	lui	a5,0x81026
-80000bf8:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000bfc:	fd842703          	lw	a4,-40(s0)
-80000c00:	00e7a223          	sw	a4,4(a5)
-80000c04:	810267b7          	lui	a5,0x81026
-80000c08:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000c0c:	fd442703          	lw	a4,-44(s0)
-80000c10:	00e7a423          	sw	a4,8(a5)
-80000c14:	810267b7          	lui	a5,0x81026
-80000c18:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000c1c:	fcc42703          	lw	a4,-52(s0)
-80000c20:	00e7a623          	sw	a4,12(a5)
-80000c24:	810267b7          	lui	a5,0x81026
-80000c28:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000c2c:	fd042703          	lw	a4,-48(s0)
-80000c30:	00e7a823          	sw	a4,16(a5)
-80000c34:	dc8ff0ef          	jal	ra,800001fc <vx_available_threads>
-80000c38:	fea42423          	sw	a0,-24(s0)
-80000c3c:	fcc42703          	lw	a4,-52(s0)
-80000c40:	fe842783          	lw	a5,-24(s0)
-80000c44:	02f757b3          	divu	a5,a4,a5
-80000c48:	fef42623          	sw	a5,-20(s0)
-80000c4c:	fcc42703          	lw	a4,-52(s0)
-80000c50:	fe842783          	lw	a5,-24(s0)
-80000c54:	02f777b3          	remu	a5,a4,a5
-80000c58:	00078863          	beqz	a5,80000c68 <vx_mat_add+0xa4>
-80000c5c:	fec42783          	lw	a5,-20(s0)
-80000c60:	00178793          	addi	a5,a5,1
-80000c64:	fef42623          	sw	a5,-20(s0)
-80000c68:	810267b7          	lui	a5,0x81026
-80000c6c:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000c70:	fec42703          	lw	a4,-20(s0)
-80000c74:	00e7aa23          	sw	a4,20(a5)
-80000c78:	fcc42703          	lw	a4,-52(s0)
-80000c7c:	fe842783          	lw	a5,-24(s0)
-80000c80:	02f76263          	bltu	a4,a5,80000ca4 <vx_mat_add+0xe0>
-80000c84:	810267b7          	lui	a5,0x81026
-80000c88:	1cc78693          	addi	a3,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000c8c:	800017b7          	lui	a5,0x80001
-80000c90:	cfc78613          	addi	a2,a5,-772 # 80000cfc <barrier_bool+0xfefd7a38>
-80000c94:	fe842583          	lw	a1,-24(s0)
-80000c98:	fd042503          	lw	a0,-48(s0)
-80000c9c:	fd8ff0ef          	jal	ra,80000474 <vx_spawnWarps>
-80000ca0:	0200006f          	j	80000cc0 <vx_mat_add+0xfc>
-80000ca4:	810267b7          	lui	a5,0x81026
-80000ca8:	1cc78693          	addi	a3,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000cac:	800017b7          	lui	a5,0x80001
-80000cb0:	cfc78613          	addi	a2,a5,-772 # 80000cfc <barrier_bool+0xfefd7a38>
-80000cb4:	fcc42583          	lw	a1,-52(s0)
-80000cb8:	fd042503          	lw	a0,-48(s0)
-80000cbc:	fb8ff0ef          	jal	ra,80000474 <vx_spawnWarps>
-80000cc0:	d34ff0ef          	jal	ra,800001f4 <vx_available_warps>
-80000cc4:	fea42223          	sw	a0,-28(s0)
-80000cc8:	fd042703          	lw	a4,-48(s0)
-80000ccc:	fe442783          	lw	a5,-28(s0)
-80000cd0:	00e7f863          	bgeu	a5,a4,80000ce0 <vx_mat_add+0x11c>
-80000cd4:	fe442503          	lw	a0,-28(s0)
-80000cd8:	88dff0ef          	jal	ra,80000564 <vx_wait_for_warps>
-80000cdc:	00c0006f          	j	80000ce8 <vx_mat_add+0x124>
-80000ce0:	fd042503          	lw	a0,-48(s0)
-80000ce4:	881ff0ef          	jal	ra,80000564 <vx_wait_for_warps>
-80000ce8:	00000013          	nop
-80000cec:	03c12083          	lw	ra,60(sp)
-80000cf0:	03812403          	lw	s0,56(sp)
-80000cf4:	04010113          	addi	sp,sp,64
-80000cf8:	00008067          	ret
+80000bec:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
+80000bf0:	fd842703          	lw	a4,-40(s0)
+80000bf4:	00e7a223          	sw	a4,4(a5)
+80000bf8:	810267b7          	lui	a5,0x81026
+80000bfc:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
+80000c00:	fd442703          	lw	a4,-44(s0)
+80000c04:	00e7a423          	sw	a4,8(a5)
+80000c08:	810267b7          	lui	a5,0x81026
+80000c0c:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
+80000c10:	fcc42703          	lw	a4,-52(s0)
+80000c14:	00e7a623          	sw	a4,12(a5)
+80000c18:	810267b7          	lui	a5,0x81026
+80000c1c:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
+80000c20:	fd042703          	lw	a4,-48(s0)
+80000c24:	00e7a823          	sw	a4,16(a5)
+80000c28:	dc8ff0ef          	jal	ra,800001f0 <vx_available_threads>
+80000c2c:	fea42423          	sw	a0,-24(s0)
+80000c30:	fcc42703          	lw	a4,-52(s0)
+80000c34:	fe842783          	lw	a5,-24(s0)
+80000c38:	02f757b3          	divu	a5,a4,a5
+80000c3c:	fef42623          	sw	a5,-20(s0)
+80000c40:	fcc42703          	lw	a4,-52(s0)
+80000c44:	fe842783          	lw	a5,-24(s0)
+80000c48:	02f777b3          	remu	a5,a4,a5
+80000c4c:	00078863          	beqz	a5,80000c5c <vx_mat_add+0xa4>
+80000c50:	fec42783          	lw	a5,-20(s0)
+80000c54:	00178793          	addi	a5,a5,1
+80000c58:	fef42623          	sw	a5,-20(s0)
+80000c5c:	810267b7          	lui	a5,0x81026
+80000c60:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
+80000c64:	fec42703          	lw	a4,-20(s0)
+80000c68:	00e7aa23          	sw	a4,20(a5)
+80000c6c:	fcc42703          	lw	a4,-52(s0)
+80000c70:	fe842783          	lw	a5,-24(s0)
+80000c74:	02f76263          	bltu	a4,a5,80000c98 <vx_mat_add+0xe0>
+80000c78:	810267b7          	lui	a5,0x81026
+80000c7c:	1cc78693          	addi	a3,a5,460 # 810261cc <barrier_bool+0xffffcf08>
+80000c80:	800017b7          	lui	a5,0x80001
+80000c84:	cf078613          	addi	a2,a5,-784 # 80000cf0 <barrier_bool+0xfefd7a2c>
+80000c88:	fe842583          	lw	a1,-24(s0)
+80000c8c:	fd042503          	lw	a0,-48(s0)
+80000c90:	fd8ff0ef          	jal	ra,80000468 <vx_spawnWarps>
+80000c94:	0200006f          	j	80000cb4 <vx_mat_add+0xfc>
+80000c98:	810267b7          	lui	a5,0x81026
+80000c9c:	1cc78693          	addi	a3,a5,460 # 810261cc <barrier_bool+0xffffcf08>
+80000ca0:	800017b7          	lui	a5,0x80001
+80000ca4:	cf078613          	addi	a2,a5,-784 # 80000cf0 <barrier_bool+0xfefd7a2c>
+80000ca8:	fcc42583          	lw	a1,-52(s0)
+80000cac:	fd042503          	lw	a0,-48(s0)
+80000cb0:	fb8ff0ef          	jal	ra,80000468 <vx_spawnWarps>
+80000cb4:	d34ff0ef          	jal	ra,800001e8 <vx_available_warps>
+80000cb8:	fea42223          	sw	a0,-28(s0)
+80000cbc:	fd042703          	lw	a4,-48(s0)
+80000cc0:	fe442783          	lw	a5,-28(s0)
+80000cc4:	00e7f863          	bgeu	a5,a4,80000cd4 <vx_mat_add+0x11c>
+80000cc8:	fe442503          	lw	a0,-28(s0)
+80000ccc:	88dff0ef          	jal	ra,80000558 <vx_wait_for_warps>
+80000cd0:	00c0006f          	j	80000cdc <vx_mat_add+0x124>
+80000cd4:	fd042503          	lw	a0,-48(s0)
+80000cd8:	881ff0ef          	jal	ra,80000558 <vx_wait_for_warps>
+80000cdc:	00000013          	nop
+80000ce0:	03c12083          	lw	ra,60(sp)
+80000ce4:	03812403          	lw	s0,56(sp)
+80000ce8:	04010113          	addi	sp,sp,64
+80000cec:	00008067          	ret
 
-80000cfc <_vx_mat_add>:
-80000cfc:	fb010113          	addi	sp,sp,-80
-80000d00:	04112623          	sw	ra,76(sp)
-80000d04:	04812423          	sw	s0,72(sp)
-80000d08:	05010413          	addi	s0,sp,80
-80000d0c:	faa42e23          	sw	a0,-68(s0)
-80000d10:	fab42c23          	sw	a1,-72(s0)
-80000d14:	941ff0ef          	jal	ra,80000654 <vx_get_arg_struct>
-80000d18:	fea42023          	sw	a0,-32(s0)
+80000cf0 <_vx_mat_add>:
+80000cf0:	fb010113          	addi	sp,sp,-80
+80000cf4:	04112623          	sw	ra,76(sp)
+80000cf8:	04812423          	sw	s0,72(sp)
+80000cfc:	05010413          	addi	s0,sp,80
+80000d00:	faa42e23          	sw	a0,-68(s0)
+80000d04:	fab42c23          	sw	a1,-72(s0)
+80000d08:	941ff0ef          	jal	ra,80000648 <vx_get_arg_struct>
+80000d0c:	fea42023          	sw	a0,-32(s0)
+80000d10:	fe042783          	lw	a5,-32(s0)
+80000d14:	0007a783          	lw	a5,0(a5)
+80000d18:	fcf42e23          	sw	a5,-36(s0)
 80000d1c:	fe042783          	lw	a5,-32(s0)
-80000d20:	0007a783          	lw	a5,0(a5)
-80000d24:	fcf42e23          	sw	a5,-36(s0)
+80000d20:	0047a783          	lw	a5,4(a5)
+80000d24:	fcf42c23          	sw	a5,-40(s0)
 80000d28:	fe042783          	lw	a5,-32(s0)
-80000d2c:	0047a783          	lw	a5,4(a5)
-80000d30:	fcf42c23          	sw	a5,-40(s0)
+80000d2c:	0087a783          	lw	a5,8(a5)
+80000d30:	fcf42a23          	sw	a5,-44(s0)
 80000d34:	fe042783          	lw	a5,-32(s0)
-80000d38:	0087a783          	lw	a5,8(a5)
-80000d3c:	fcf42a23          	sw	a5,-44(s0)
-80000d40:	fe042783          	lw	a5,-32(s0)
-80000d44:	0147a783          	lw	a5,20(a5)
-80000d48:	fef42623          	sw	a5,-20(s0)
-80000d4c:	fec42703          	lw	a4,-20(s0)
-80000d50:	fbc42783          	lw	a5,-68(s0)
-80000d54:	02f707b3          	mul	a5,a4,a5
-80000d58:	fef42423          	sw	a5,-24(s0)
-80000d5c:	fec42783          	lw	a5,-20(s0)
-80000d60:	00079a63          	bnez	a5,80000d74 <_vx_mat_add+0x78>
-80000d64:	00100793          	li	a5,1
-80000d68:	fef42623          	sw	a5,-20(s0)
-80000d6c:	fbc42783          	lw	a5,-68(s0)
-80000d70:	fef42423          	sw	a5,-24(s0)
-80000d74:	fe042783          	lw	a5,-32(s0)
-80000d78:	00c7a783          	lw	a5,12(a5)
-80000d7c:	fcf42823          	sw	a5,-48(s0)
-80000d80:	fe042223          	sw	zero,-28(s0)
-80000d84:	0c00006f          	j	80000e44 <_vx_mat_add+0x148>
-80000d88:	fb842703          	lw	a4,-72(s0)
-80000d8c:	fd042783          	lw	a5,-48(s0)
-80000d90:	02f70733          	mul	a4,a4,a5
-80000d94:	fe842783          	lw	a5,-24(s0)
-80000d98:	00f707b3          	add	a5,a4,a5
-80000d9c:	fcf42623          	sw	a5,-52(s0)
-80000da0:	fe842703          	lw	a4,-24(s0)
-80000da4:	fd042783          	lw	a5,-48(s0)
-80000da8:	00f737b3          	sltu	a5,a4,a5
-80000dac:	0ff7f793          	andi	a5,a5,255
-80000db0:	fcf42423          	sw	a5,-56(s0)
-80000db4:	fc842783          	lw	a5,-56(s0)
-80000db8:	0017b793          	seqz	a5,a5
-80000dbc:	fcf403a3          	sb	a5,-57(s0)
-80000dc0:	fc744783          	lbu	a5,-57(s0)
-80000dc4:	00078f13          	mv	t5,a5
-80000dc8:	800017b7          	lui	a5,0x80001
-80000dcc:	e3078f93          	addi	t6,a5,-464 # 80000e30 <barrier_bool+0xfefd7b6c>
-80000dd0:	000f206b          	0xf206b
-80000dd4:	01ff707b          	0x1ff707b
-80000dd8:	fcc42783          	lw	a5,-52(s0)
-80000ddc:	00279793          	slli	a5,a5,0x2
-80000de0:	fdc42703          	lw	a4,-36(s0)
-80000de4:	00f707b3          	add	a5,a4,a5
-80000de8:	0007a683          	lw	a3,0(a5)
-80000dec:	fcc42783          	lw	a5,-52(s0)
-80000df0:	00279793          	slli	a5,a5,0x2
-80000df4:	fd842703          	lw	a4,-40(s0)
-80000df8:	00f707b3          	add	a5,a4,a5
-80000dfc:	0007a703          	lw	a4,0(a5)
-80000e00:	fcc42783          	lw	a5,-52(s0)
-80000e04:	00279793          	slli	a5,a5,0x2
-80000e08:	fd442603          	lw	a2,-44(s0)
-80000e0c:	00f607b3          	add	a5,a2,a5
-80000e10:	00e68733          	add	a4,a3,a4
-80000e14:	00e7a023          	sw	a4,0(a5)
-80000e18:	fe842783          	lw	a5,-24(s0)
-80000e1c:	00178793          	addi	a5,a5,1
-80000e20:	fef42423          	sw	a5,-24(s0)
-80000e24:	800017b7          	lui	a5,0x80001
-80000e28:	e3478e13          	addi	t3,a5,-460 # 80000e34 <barrier_bool+0xfefd7b70>
-80000e2c:	000e0067          	jr	t3
-80000e30:	00000013          	nop
-80000e34:	0000306b          	0x306b
+80000d38:	0147a783          	lw	a5,20(a5)
+80000d3c:	fef42623          	sw	a5,-20(s0)
+80000d40:	fec42703          	lw	a4,-20(s0)
+80000d44:	fbc42783          	lw	a5,-68(s0)
+80000d48:	02f707b3          	mul	a5,a4,a5
+80000d4c:	fef42423          	sw	a5,-24(s0)
+80000d50:	fec42783          	lw	a5,-20(s0)
+80000d54:	00079a63          	bnez	a5,80000d68 <_vx_mat_add+0x78>
+80000d58:	00100793          	li	a5,1
+80000d5c:	fef42623          	sw	a5,-20(s0)
+80000d60:	fbc42783          	lw	a5,-68(s0)
+80000d64:	fef42423          	sw	a5,-24(s0)
+80000d68:	fe042783          	lw	a5,-32(s0)
+80000d6c:	00c7a783          	lw	a5,12(a5)
+80000d70:	fcf42823          	sw	a5,-48(s0)
+80000d74:	fe042223          	sw	zero,-28(s0)
+80000d78:	0c00006f          	j	80000e38 <_vx_mat_add+0x148>
+80000d7c:	fb842703          	lw	a4,-72(s0)
+80000d80:	fd042783          	lw	a5,-48(s0)
+80000d84:	02f70733          	mul	a4,a4,a5
+80000d88:	fe842783          	lw	a5,-24(s0)
+80000d8c:	00f707b3          	add	a5,a4,a5
+80000d90:	fcf42623          	sw	a5,-52(s0)
+80000d94:	fe842703          	lw	a4,-24(s0)
+80000d98:	fd042783          	lw	a5,-48(s0)
+80000d9c:	00f737b3          	sltu	a5,a4,a5
+80000da0:	0ff7f793          	andi	a5,a5,255
+80000da4:	fcf42423          	sw	a5,-56(s0)
+80000da8:	fc842783          	lw	a5,-56(s0)
+80000dac:	0017b793          	seqz	a5,a5
+80000db0:	fcf403a3          	sb	a5,-57(s0)
+80000db4:	fc744783          	lbu	a5,-57(s0)
+80000db8:	00078f13          	mv	t5,a5
+80000dbc:	800017b7          	lui	a5,0x80001
+80000dc0:	e2478f93          	addi	t6,a5,-476 # 80000e24 <barrier_bool+0xfefd7b60>
+80000dc4:	000f206b          	0xf206b
+80000dc8:	01ff707b          	0x1ff707b
+80000dcc:	fcc42783          	lw	a5,-52(s0)
+80000dd0:	00279793          	slli	a5,a5,0x2
+80000dd4:	fdc42703          	lw	a4,-36(s0)
+80000dd8:	00f707b3          	add	a5,a4,a5
+80000ddc:	0007a683          	lw	a3,0(a5)
+80000de0:	fcc42783          	lw	a5,-52(s0)
+80000de4:	00279793          	slli	a5,a5,0x2
+80000de8:	fd842703          	lw	a4,-40(s0)
+80000dec:	00f707b3          	add	a5,a4,a5
+80000df0:	0007a703          	lw	a4,0(a5)
+80000df4:	fcc42783          	lw	a5,-52(s0)
+80000df8:	00279793          	slli	a5,a5,0x2
+80000dfc:	fd442603          	lw	a2,-44(s0)
+80000e00:	00f607b3          	add	a5,a2,a5
+80000e04:	00e68733          	add	a4,a3,a4
+80000e08:	00e7a023          	sw	a4,0(a5)
+80000e0c:	fe842783          	lw	a5,-24(s0)
+80000e10:	00178793          	addi	a5,a5,1
+80000e14:	fef42423          	sw	a5,-24(s0)
+80000e18:	800017b7          	lui	a5,0x80001
+80000e1c:	e2878e13          	addi	t3,a5,-472 # 80000e28 <barrier_bool+0xfefd7b64>
+80000e20:	000e0067          	jr	t3
+80000e24:	00000013          	nop
+80000e28:	0000306b          	0x306b
+80000e2c:	fe442783          	lw	a5,-28(s0)
+80000e30:	00178793          	addi	a5,a5,1
+80000e34:	fef42223          	sw	a5,-28(s0)
 80000e38:	fe442783          	lw	a5,-28(s0)
-80000e3c:	00178793          	addi	a5,a5,1
-80000e40:	fef42223          	sw	a5,-28(s0)
-80000e44:	fe442783          	lw	a5,-28(s0)
-80000e48:	fec42703          	lw	a4,-20(s0)
-80000e4c:	f2e7eee3          	bltu	a5,a4,80000d88 <_vx_mat_add+0x8c>
-80000e50:	00000013          	nop
-80000e54:	04c12083          	lw	ra,76(sp)
-80000e58:	04812403          	lw	s0,72(sp)
-80000e5c:	05010113          	addi	sp,sp,80
-80000e60:	00008067          	ret
+80000e3c:	fec42703          	lw	a4,-20(s0)
+80000e40:	f2e7eee3          	bltu	a5,a4,80000d7c <_vx_mat_add+0x8c>
+80000e44:	00000013          	nop
+80000e48:	04c12083          	lw	ra,76(sp)
+80000e4c:	04812403          	lw	s0,72(sp)
+80000e50:	05010113          	addi	sp,sp,80
+80000e54:	00008067          	ret
 
-80000e64 <vx_mat_sub>:
-80000e64:	fc010113          	addi	sp,sp,-64
-80000e68:	02112e23          	sw	ra,60(sp)
-80000e6c:	02812c23          	sw	s0,56(sp)
-80000e70:	04010413          	addi	s0,sp,64
-80000e74:	fca42e23          	sw	a0,-36(s0)
-80000e78:	fcb42c23          	sw	a1,-40(s0)
-80000e7c:	fcc42a23          	sw	a2,-44(s0)
-80000e80:	fcd42823          	sw	a3,-48(s0)
-80000e84:	fce42623          	sw	a4,-52(s0)
+80000e58 <vx_mat_sub>:
+80000e58:	fc010113          	addi	sp,sp,-64
+80000e5c:	02112e23          	sw	ra,60(sp)
+80000e60:	02812c23          	sw	s0,56(sp)
+80000e64:	04010413          	addi	s0,sp,64
+80000e68:	fca42e23          	sw	a0,-36(s0)
+80000e6c:	fcb42c23          	sw	a1,-40(s0)
+80000e70:	fcc42a23          	sw	a2,-44(s0)
+80000e74:	fcd42823          	sw	a3,-48(s0)
+80000e78:	fce42623          	sw	a4,-52(s0)
+80000e7c:	810267b7          	lui	a5,0x81026
+80000e80:	fdc42703          	lw	a4,-36(s0)
+80000e84:	1ce7a623          	sw	a4,460(a5) # 810261cc <barrier_bool+0xffffcf08>
 80000e88:	810267b7          	lui	a5,0x81026
-80000e8c:	fdc42703          	lw	a4,-36(s0)
-80000e90:	1ce7a623          	sw	a4,460(a5) # 810261cc <barrier_bool+0xffffcf08>
-80000e94:	810267b7          	lui	a5,0x81026
-80000e98:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000e9c:	fd842703          	lw	a4,-40(s0)
-80000ea0:	00e7a223          	sw	a4,4(a5)
-80000ea4:	810267b7          	lui	a5,0x81026
-80000ea8:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000eac:	fd442703          	lw	a4,-44(s0)
-80000eb0:	00e7a423          	sw	a4,8(a5)
-80000eb4:	810267b7          	lui	a5,0x81026
-80000eb8:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000ebc:	fcc42703          	lw	a4,-52(s0)
-80000ec0:	00e7a623          	sw	a4,12(a5)
-80000ec4:	810267b7          	lui	a5,0x81026
-80000ec8:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000ecc:	fd042703          	lw	a4,-48(s0)
-80000ed0:	00e7a823          	sw	a4,16(a5)
-80000ed4:	b28ff0ef          	jal	ra,800001fc <vx_available_threads>
-80000ed8:	fea42423          	sw	a0,-24(s0)
-80000edc:	fcc42703          	lw	a4,-52(s0)
-80000ee0:	fe842783          	lw	a5,-24(s0)
-80000ee4:	02f757b3          	divu	a5,a4,a5
-80000ee8:	fef42623          	sw	a5,-20(s0)
-80000eec:	fcc42703          	lw	a4,-52(s0)
-80000ef0:	fe842783          	lw	a5,-24(s0)
-80000ef4:	02f777b3          	remu	a5,a4,a5
-80000ef8:	00078863          	beqz	a5,80000f08 <vx_mat_sub+0xa4>
-80000efc:	fec42783          	lw	a5,-20(s0)
-80000f00:	00178793          	addi	a5,a5,1
-80000f04:	fef42623          	sw	a5,-20(s0)
-80000f08:	810267b7          	lui	a5,0x81026
-80000f0c:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000f10:	fec42703          	lw	a4,-20(s0)
-80000f14:	00e7aa23          	sw	a4,20(a5)
-80000f18:	fcc42703          	lw	a4,-52(s0)
-80000f1c:	fe842783          	lw	a5,-24(s0)
-80000f20:	02f76263          	bltu	a4,a5,80000f44 <vx_mat_sub+0xe0>
-80000f24:	810267b7          	lui	a5,0x81026
-80000f28:	1cc78693          	addi	a3,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000f2c:	800017b7          	lui	a5,0x80001
-80000f30:	f9c78613          	addi	a2,a5,-100 # 80000f9c <barrier_bool+0xfefd7cd8>
-80000f34:	fe842583          	lw	a1,-24(s0)
-80000f38:	fd042503          	lw	a0,-48(s0)
-80000f3c:	d38ff0ef          	jal	ra,80000474 <vx_spawnWarps>
-80000f40:	0200006f          	j	80000f60 <vx_mat_sub+0xfc>
-80000f44:	810267b7          	lui	a5,0x81026
-80000f48:	1cc78693          	addi	a3,a5,460 # 810261cc <barrier_bool+0xffffcf08>
-80000f4c:	800017b7          	lui	a5,0x80001
-80000f50:	f9c78613          	addi	a2,a5,-100 # 80000f9c <barrier_bool+0xfefd7cd8>
-80000f54:	fcc42583          	lw	a1,-52(s0)
-80000f58:	fd042503          	lw	a0,-48(s0)
-80000f5c:	d18ff0ef          	jal	ra,80000474 <vx_spawnWarps>
-80000f60:	a94ff0ef          	jal	ra,800001f4 <vx_available_warps>
-80000f64:	fea42223          	sw	a0,-28(s0)
-80000f68:	fd042703          	lw	a4,-48(s0)
-80000f6c:	fe442783          	lw	a5,-28(s0)
-80000f70:	00e7f863          	bgeu	a5,a4,80000f80 <vx_mat_sub+0x11c>
-80000f74:	fe442503          	lw	a0,-28(s0)
-80000f78:	decff0ef          	jal	ra,80000564 <vx_wait_for_warps>
-80000f7c:	00c0006f          	j	80000f88 <vx_mat_sub+0x124>
-80000f80:	fd042503          	lw	a0,-48(s0)
-80000f84:	de0ff0ef          	jal	ra,80000564 <vx_wait_for_warps>
-80000f88:	00000013          	nop
-80000f8c:	03c12083          	lw	ra,60(sp)
-80000f90:	03812403          	lw	s0,56(sp)
-80000f94:	04010113          	addi	sp,sp,64
-80000f98:	00008067          	ret
+80000e8c:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
+80000e90:	fd842703          	lw	a4,-40(s0)
+80000e94:	00e7a223          	sw	a4,4(a5)
+80000e98:	810267b7          	lui	a5,0x81026
+80000e9c:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
+80000ea0:	fd442703          	lw	a4,-44(s0)
+80000ea4:	00e7a423          	sw	a4,8(a5)
+80000ea8:	810267b7          	lui	a5,0x81026
+80000eac:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
+80000eb0:	fcc42703          	lw	a4,-52(s0)
+80000eb4:	00e7a623          	sw	a4,12(a5)
+80000eb8:	810267b7          	lui	a5,0x81026
+80000ebc:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
+80000ec0:	fd042703          	lw	a4,-48(s0)
+80000ec4:	00e7a823          	sw	a4,16(a5)
+80000ec8:	b28ff0ef          	jal	ra,800001f0 <vx_available_threads>
+80000ecc:	fea42423          	sw	a0,-24(s0)
+80000ed0:	fcc42703          	lw	a4,-52(s0)
+80000ed4:	fe842783          	lw	a5,-24(s0)
+80000ed8:	02f757b3          	divu	a5,a4,a5
+80000edc:	fef42623          	sw	a5,-20(s0)
+80000ee0:	fcc42703          	lw	a4,-52(s0)
+80000ee4:	fe842783          	lw	a5,-24(s0)
+80000ee8:	02f777b3          	remu	a5,a4,a5
+80000eec:	00078863          	beqz	a5,80000efc <vx_mat_sub+0xa4>
+80000ef0:	fec42783          	lw	a5,-20(s0)
+80000ef4:	00178793          	addi	a5,a5,1
+80000ef8:	fef42623          	sw	a5,-20(s0)
+80000efc:	810267b7          	lui	a5,0x81026
+80000f00:	1cc78793          	addi	a5,a5,460 # 810261cc <barrier_bool+0xffffcf08>
+80000f04:	fec42703          	lw	a4,-20(s0)
+80000f08:	00e7aa23          	sw	a4,20(a5)
+80000f0c:	fcc42703          	lw	a4,-52(s0)
+80000f10:	fe842783          	lw	a5,-24(s0)
+80000f14:	02f76263          	bltu	a4,a5,80000f38 <vx_mat_sub+0xe0>
+80000f18:	810267b7          	lui	a5,0x81026
+80000f1c:	1cc78693          	addi	a3,a5,460 # 810261cc <barrier_bool+0xffffcf08>
+80000f20:	800017b7          	lui	a5,0x80001
+80000f24:	f9078613          	addi	a2,a5,-112 # 80000f90 <barrier_bool+0xfefd7ccc>
+80000f28:	fe842583          	lw	a1,-24(s0)
+80000f2c:	fd042503          	lw	a0,-48(s0)
+80000f30:	d38ff0ef          	jal	ra,80000468 <vx_spawnWarps>
+80000f34:	0200006f          	j	80000f54 <vx_mat_sub+0xfc>
+80000f38:	810267b7          	lui	a5,0x81026
+80000f3c:	1cc78693          	addi	a3,a5,460 # 810261cc <barrier_bool+0xffffcf08>
+80000f40:	800017b7          	lui	a5,0x80001
+80000f44:	f9078613          	addi	a2,a5,-112 # 80000f90 <barrier_bool+0xfefd7ccc>
+80000f48:	fcc42583          	lw	a1,-52(s0)
+80000f4c:	fd042503          	lw	a0,-48(s0)
+80000f50:	d18ff0ef          	jal	ra,80000468 <vx_spawnWarps>
+80000f54:	a94ff0ef          	jal	ra,800001e8 <vx_available_warps>
+80000f58:	fea42223          	sw	a0,-28(s0)
+80000f5c:	fd042703          	lw	a4,-48(s0)
+80000f60:	fe442783          	lw	a5,-28(s0)
+80000f64:	00e7f863          	bgeu	a5,a4,80000f74 <vx_mat_sub+0x11c>
+80000f68:	fe442503          	lw	a0,-28(s0)
+80000f6c:	decff0ef          	jal	ra,80000558 <vx_wait_for_warps>
+80000f70:	00c0006f          	j	80000f7c <vx_mat_sub+0x124>
+80000f74:	fd042503          	lw	a0,-48(s0)
+80000f78:	de0ff0ef          	jal	ra,80000558 <vx_wait_for_warps>
+80000f7c:	00000013          	nop
+80000f80:	03c12083          	lw	ra,60(sp)
+80000f84:	03812403          	lw	s0,56(sp)
+80000f88:	04010113          	addi	sp,sp,64
+80000f8c:	00008067          	ret
 
-80000f9c <_vx_mat_sub>:
-80000f9c:	fb010113          	addi	sp,sp,-80
-80000fa0:	04112623          	sw	ra,76(sp)
-80000fa4:	04812423          	sw	s0,72(sp)
-80000fa8:	05010413          	addi	s0,sp,80
-80000fac:	faa42e23          	sw	a0,-68(s0)
-80000fb0:	fab42c23          	sw	a1,-72(s0)
-80000fb4:	ea0ff0ef          	jal	ra,80000654 <vx_get_arg_struct>
-80000fb8:	fea42023          	sw	a0,-32(s0)
+80000f90 <_vx_mat_sub>:
+80000f90:	fb010113          	addi	sp,sp,-80
+80000f94:	04112623          	sw	ra,76(sp)
+80000f98:	04812423          	sw	s0,72(sp)
+80000f9c:	05010413          	addi	s0,sp,80
+80000fa0:	faa42e23          	sw	a0,-68(s0)
+80000fa4:	fab42c23          	sw	a1,-72(s0)
+80000fa8:	ea0ff0ef          	jal	ra,80000648 <vx_get_arg_struct>
+80000fac:	fea42023          	sw	a0,-32(s0)
+80000fb0:	fe042783          	lw	a5,-32(s0)
+80000fb4:	0007a783          	lw	a5,0(a5)
+80000fb8:	fcf42e23          	sw	a5,-36(s0)
 80000fbc:	fe042783          	lw	a5,-32(s0)
-80000fc0:	0007a783          	lw	a5,0(a5)
-80000fc4:	fcf42e23          	sw	a5,-36(s0)
+80000fc0:	0047a783          	lw	a5,4(a5)
+80000fc4:	fcf42c23          	sw	a5,-40(s0)
 80000fc8:	fe042783          	lw	a5,-32(s0)
-80000fcc:	0047a783          	lw	a5,4(a5)
-80000fd0:	fcf42c23          	sw	a5,-40(s0)
+80000fcc:	0087a783          	lw	a5,8(a5)
+80000fd0:	fcf42a23          	sw	a5,-44(s0)
 80000fd4:	fe042783          	lw	a5,-32(s0)
-80000fd8:	0087a783          	lw	a5,8(a5)
-80000fdc:	fcf42a23          	sw	a5,-44(s0)
-80000fe0:	fe042783          	lw	a5,-32(s0)
-80000fe4:	0147a783          	lw	a5,20(a5)
-80000fe8:	fef42623          	sw	a5,-20(s0)
-80000fec:	fec42703          	lw	a4,-20(s0)
-80000ff0:	fbc42783          	lw	a5,-68(s0)
-80000ff4:	02f707b3          	mul	a5,a4,a5
-80000ff8:	fef42423          	sw	a5,-24(s0)
-80000ffc:	fec42783          	lw	a5,-20(s0)
-80001000:	00079a63          	bnez	a5,80001014 <_vx_mat_sub+0x78>
-80001004:	00100793          	li	a5,1
-80001008:	fef42623          	sw	a5,-20(s0)
-8000100c:	fbc42783          	lw	a5,-68(s0)
-80001010:	fef42423          	sw	a5,-24(s0)
-80001014:	fe042783          	lw	a5,-32(s0)
-80001018:	00c7a783          	lw	a5,12(a5)
-8000101c:	fcf42823          	sw	a5,-48(s0)
-80001020:	fe042223          	sw	zero,-28(s0)
-80001024:	0c00006f          	j	800010e4 <_vx_mat_sub+0x148>
-80001028:	fb842703          	lw	a4,-72(s0)
-8000102c:	fd042783          	lw	a5,-48(s0)
-80001030:	02f70733          	mul	a4,a4,a5
-80001034:	fe842783          	lw	a5,-24(s0)
-80001038:	00f707b3          	add	a5,a4,a5
-8000103c:	fcf42623          	sw	a5,-52(s0)
-80001040:	fe842703          	lw	a4,-24(s0)
-80001044:	fd042783          	lw	a5,-48(s0)
-80001048:	00f737b3          	sltu	a5,a4,a5
-8000104c:	0ff7f793          	andi	a5,a5,255
-80001050:	fcf42423          	sw	a5,-56(s0)
-80001054:	fc842783          	lw	a5,-56(s0)
-80001058:	0017b793          	seqz	a5,a5
-8000105c:	fcf403a3          	sb	a5,-57(s0)
-80001060:	fc744783          	lbu	a5,-57(s0)
-80001064:	00078f13          	mv	t5,a5
-80001068:	800017b7          	lui	a5,0x80001
-8000106c:	0d078f93          	addi	t6,a5,208 # 800010d0 <barrier_bool+0xfefd7e0c>
-80001070:	000f206b          	0xf206b
-80001074:	01ff707b          	0x1ff707b
-80001078:	fcc42783          	lw	a5,-52(s0)
-8000107c:	00279793          	slli	a5,a5,0x2
-80001080:	fdc42703          	lw	a4,-36(s0)
-80001084:	00f707b3          	add	a5,a4,a5
-80001088:	0007a683          	lw	a3,0(a5)
-8000108c:	fcc42783          	lw	a5,-52(s0)
-80001090:	00279793          	slli	a5,a5,0x2
-80001094:	fd842703          	lw	a4,-40(s0)
-80001098:	00f707b3          	add	a5,a4,a5
-8000109c:	0007a703          	lw	a4,0(a5)
-800010a0:	fcc42783          	lw	a5,-52(s0)
-800010a4:	00279793          	slli	a5,a5,0x2
-800010a8:	fd442603          	lw	a2,-44(s0)
-800010ac:	00f607b3          	add	a5,a2,a5
-800010b0:	40e68733          	sub	a4,a3,a4
-800010b4:	00e7a023          	sw	a4,0(a5)
-800010b8:	fe842783          	lw	a5,-24(s0)
-800010bc:	00178793          	addi	a5,a5,1
-800010c0:	fef42423          	sw	a5,-24(s0)
-800010c4:	800017b7          	lui	a5,0x80001
-800010c8:	0d478e13          	addi	t3,a5,212 # 800010d4 <barrier_bool+0xfefd7e10>
-800010cc:	000e0067          	jr	t3
-800010d0:	00000013          	nop
-800010d4:	0000306b          	0x306b
+80000fd8:	0147a783          	lw	a5,20(a5)
+80000fdc:	fef42623          	sw	a5,-20(s0)
+80000fe0:	fec42703          	lw	a4,-20(s0)
+80000fe4:	fbc42783          	lw	a5,-68(s0)
+80000fe8:	02f707b3          	mul	a5,a4,a5
+80000fec:	fef42423          	sw	a5,-24(s0)
+80000ff0:	fec42783          	lw	a5,-20(s0)
+80000ff4:	00079a63          	bnez	a5,80001008 <_vx_mat_sub+0x78>
+80000ff8:	00100793          	li	a5,1
+80000ffc:	fef42623          	sw	a5,-20(s0)
+80001000:	fbc42783          	lw	a5,-68(s0)
+80001004:	fef42423          	sw	a5,-24(s0)
+80001008:	fe042783          	lw	a5,-32(s0)
+8000100c:	00c7a783          	lw	a5,12(a5)
+80001010:	fcf42823          	sw	a5,-48(s0)
+80001014:	fe042223          	sw	zero,-28(s0)
+80001018:	0c00006f          	j	800010d8 <_vx_mat_sub+0x148>
+8000101c:	fb842703          	lw	a4,-72(s0)
+80001020:	fd042783          	lw	a5,-48(s0)
+80001024:	02f70733          	mul	a4,a4,a5
+80001028:	fe842783          	lw	a5,-24(s0)
+8000102c:	00f707b3          	add	a5,a4,a5
+80001030:	fcf42623          	sw	a5,-52(s0)
+80001034:	fe842703          	lw	a4,-24(s0)
+80001038:	fd042783          	lw	a5,-48(s0)
+8000103c:	00f737b3          	sltu	a5,a4,a5
+80001040:	0ff7f793          	andi	a5,a5,255
+80001044:	fcf42423          	sw	a5,-56(s0)
+80001048:	fc842783          	lw	a5,-56(s0)
+8000104c:	0017b793          	seqz	a5,a5
+80001050:	fcf403a3          	sb	a5,-57(s0)
+80001054:	fc744783          	lbu	a5,-57(s0)
+80001058:	00078f13          	mv	t5,a5
+8000105c:	800017b7          	lui	a5,0x80001
+80001060:	0c478f93          	addi	t6,a5,196 # 800010c4 <barrier_bool+0xfefd7e00>
+80001064:	000f206b          	0xf206b
+80001068:	01ff707b          	0x1ff707b
+8000106c:	fcc42783          	lw	a5,-52(s0)
+80001070:	00279793          	slli	a5,a5,0x2
+80001074:	fdc42703          	lw	a4,-36(s0)
+80001078:	00f707b3          	add	a5,a4,a5
+8000107c:	0007a683          	lw	a3,0(a5)
+80001080:	fcc42783          	lw	a5,-52(s0)
+80001084:	00279793          	slli	a5,a5,0x2
+80001088:	fd842703          	lw	a4,-40(s0)
+8000108c:	00f707b3          	add	a5,a4,a5
+80001090:	0007a703          	lw	a4,0(a5)
+80001094:	fcc42783          	lw	a5,-52(s0)
+80001098:	00279793          	slli	a5,a5,0x2
+8000109c:	fd442603          	lw	a2,-44(s0)
+800010a0:	00f607b3          	add	a5,a2,a5
+800010a4:	40e68733          	sub	a4,a3,a4
+800010a8:	00e7a023          	sw	a4,0(a5)
+800010ac:	fe842783          	lw	a5,-24(s0)
+800010b0:	00178793          	addi	a5,a5,1
+800010b4:	fef42423          	sw	a5,-24(s0)
+800010b8:	800017b7          	lui	a5,0x80001
+800010bc:	0c878e13          	addi	t3,a5,200 # 800010c8 <barrier_bool+0xfefd7e04>
+800010c0:	000e0067          	jr	t3
+800010c4:	00000013          	nop
+800010c8:	0000306b          	0x306b
+800010cc:	fe442783          	lw	a5,-28(s0)
+800010d0:	00178793          	addi	a5,a5,1
+800010d4:	fef42223          	sw	a5,-28(s0)
 800010d8:	fe442783          	lw	a5,-28(s0)
-800010dc:	00178793          	addi	a5,a5,1
-800010e0:	fef42223          	sw	a5,-28(s0)
-800010e4:	fe442783          	lw	a5,-28(s0)
-800010e8:	fec42703          	lw	a4,-20(s0)
-800010ec:	f2e7eee3          	bltu	a5,a4,80001028 <_vx_mat_sub+0x8c>
-800010f0:	00000013          	nop
-800010f4:	04c12083          	lw	ra,76(sp)
-800010f8:	04812403          	lw	s0,72(sp)
-800010fc:	05010113          	addi	sp,sp,80
-80001100:	00008067          	ret
+800010dc:	fec42703          	lw	a4,-20(s0)
+800010e0:	f2e7eee3          	bltu	a5,a4,8000101c <_vx_mat_sub+0x8c>
+800010e4:	00000013          	nop
+800010e8:	04c12083          	lw	ra,76(sp)
+800010ec:	04812403          	lw	s0,72(sp)
+800010f0:	05010113          	addi	sp,sp,80
+800010f4:	00008067          	ret
 
-80001104 <vx_e_mat_add>:
-80001104:	fc010113          	addi	sp,sp,-64
-80001108:	02112e23          	sw	ra,60(sp)
-8000110c:	02812c23          	sw	s0,56(sp)
-80001110:	04010413          	addi	s0,sp,64
-80001114:	fca42e23          	sw	a0,-36(s0)
-80001118:	fcb42c23          	sw	a1,-40(s0)
-8000111c:	fcc42a23          	sw	a2,-44(s0)
-80001120:	fcd42823          	sw	a3,-48(s0)
-80001124:	fce42623          	sw	a4,-52(s0)
+800010f8 <vx_e_mat_add>:
+800010f8:	fc010113          	addi	sp,sp,-64
+800010fc:	02112e23          	sw	ra,60(sp)
+80001100:	02812c23          	sw	s0,56(sp)
+80001104:	04010413          	addi	s0,sp,64
+80001108:	fca42e23          	sw	a0,-36(s0)
+8000110c:	fcb42c23          	sw	a1,-40(s0)
+80001110:	fcc42a23          	sw	a2,-44(s0)
+80001114:	fcd42823          	sw	a3,-48(s0)
+80001118:	fce42623          	sw	a4,-52(s0)
+8000111c:	810267b7          	lui	a5,0x81026
+80001120:	fdc42703          	lw	a4,-36(s0)
+80001124:	1ee7a223          	sw	a4,484(a5) # 810261e4 <barrier_bool+0xffffcf20>
 80001128:	810267b7          	lui	a5,0x81026
-8000112c:	fdc42703          	lw	a4,-36(s0)
-80001130:	1ee7a223          	sw	a4,484(a5) # 810261e4 <barrier_bool+0xffffcf20>
-80001134:	810267b7          	lui	a5,0x81026
-80001138:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-8000113c:	fd842703          	lw	a4,-40(s0)
-80001140:	00e7a223          	sw	a4,4(a5)
-80001144:	810267b7          	lui	a5,0x81026
-80001148:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-8000114c:	fd442703          	lw	a4,-44(s0)
-80001150:	00e7a423          	sw	a4,8(a5)
-80001154:	810267b7          	lui	a5,0x81026
-80001158:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-8000115c:	fcc42703          	lw	a4,-52(s0)
-80001160:	00e7a623          	sw	a4,12(a5)
-80001164:	810267b7          	lui	a5,0x81026
-80001168:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-8000116c:	fd042703          	lw	a4,-48(s0)
-80001170:	00e7a823          	sw	a4,16(a5)
-80001174:	888ff0ef          	jal	ra,800001fc <vx_available_threads>
-80001178:	fea42423          	sw	a0,-24(s0)
-8000117c:	fcc42703          	lw	a4,-52(s0)
-80001180:	fe842783          	lw	a5,-24(s0)
-80001184:	02f757b3          	divu	a5,a4,a5
-80001188:	fef42623          	sw	a5,-20(s0)
-8000118c:	fcc42703          	lw	a4,-52(s0)
-80001190:	fe842783          	lw	a5,-24(s0)
-80001194:	02f777b3          	remu	a5,a4,a5
-80001198:	00078863          	beqz	a5,800011a8 <vx_e_mat_add+0xa4>
-8000119c:	fec42783          	lw	a5,-20(s0)
-800011a0:	00178793          	addi	a5,a5,1
-800011a4:	fef42623          	sw	a5,-20(s0)
-800011a8:	810267b7          	lui	a5,0x81026
-800011ac:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-800011b0:	fec42703          	lw	a4,-20(s0)
-800011b4:	00e7aa23          	sw	a4,20(a5)
-800011b8:	fcc42703          	lw	a4,-52(s0)
-800011bc:	fe842783          	lw	a5,-24(s0)
-800011c0:	02f76263          	bltu	a4,a5,800011e4 <vx_e_mat_add+0xe0>
-800011c4:	810267b7          	lui	a5,0x81026
-800011c8:	1e478693          	addi	a3,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-800011cc:	800017b7          	lui	a5,0x80001
-800011d0:	23c78613          	addi	a2,a5,572 # 8000123c <barrier_bool+0xfefd7f78>
-800011d4:	fe842583          	lw	a1,-24(s0)
-800011d8:	fd042503          	lw	a0,-48(s0)
-800011dc:	a98ff0ef          	jal	ra,80000474 <vx_spawnWarps>
-800011e0:	0200006f          	j	80001200 <vx_e_mat_add+0xfc>
-800011e4:	810267b7          	lui	a5,0x81026
-800011e8:	1e478693          	addi	a3,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-800011ec:	800017b7          	lui	a5,0x80001
-800011f0:	23c78613          	addi	a2,a5,572 # 8000123c <barrier_bool+0xfefd7f78>
-800011f4:	fcc42583          	lw	a1,-52(s0)
-800011f8:	fd042503          	lw	a0,-48(s0)
-800011fc:	a78ff0ef          	jal	ra,80000474 <vx_spawnWarps>
-80001200:	ff5fe0ef          	jal	ra,800001f4 <vx_available_warps>
-80001204:	fea42223          	sw	a0,-28(s0)
-80001208:	fd042703          	lw	a4,-48(s0)
-8000120c:	fe442783          	lw	a5,-28(s0)
-80001210:	00e7f863          	bgeu	a5,a4,80001220 <vx_e_mat_add+0x11c>
-80001214:	fe442503          	lw	a0,-28(s0)
-80001218:	b4cff0ef          	jal	ra,80000564 <vx_wait_for_warps>
-8000121c:	00c0006f          	j	80001228 <vx_e_mat_add+0x124>
-80001220:	fd042503          	lw	a0,-48(s0)
-80001224:	b40ff0ef          	jal	ra,80000564 <vx_wait_for_warps>
-80001228:	00000013          	nop
-8000122c:	03c12083          	lw	ra,60(sp)
-80001230:	03812403          	lw	s0,56(sp)
-80001234:	04010113          	addi	sp,sp,64
-80001238:	00008067          	ret
+8000112c:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
+80001130:	fd842703          	lw	a4,-40(s0)
+80001134:	00e7a223          	sw	a4,4(a5)
+80001138:	810267b7          	lui	a5,0x81026
+8000113c:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
+80001140:	fd442703          	lw	a4,-44(s0)
+80001144:	00e7a423          	sw	a4,8(a5)
+80001148:	810267b7          	lui	a5,0x81026
+8000114c:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
+80001150:	fcc42703          	lw	a4,-52(s0)
+80001154:	00e7a623          	sw	a4,12(a5)
+80001158:	810267b7          	lui	a5,0x81026
+8000115c:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
+80001160:	fd042703          	lw	a4,-48(s0)
+80001164:	00e7a823          	sw	a4,16(a5)
+80001168:	888ff0ef          	jal	ra,800001f0 <vx_available_threads>
+8000116c:	fea42423          	sw	a0,-24(s0)
+80001170:	fcc42703          	lw	a4,-52(s0)
+80001174:	fe842783          	lw	a5,-24(s0)
+80001178:	02f757b3          	divu	a5,a4,a5
+8000117c:	fef42623          	sw	a5,-20(s0)
+80001180:	fcc42703          	lw	a4,-52(s0)
+80001184:	fe842783          	lw	a5,-24(s0)
+80001188:	02f777b3          	remu	a5,a4,a5
+8000118c:	00078863          	beqz	a5,8000119c <vx_e_mat_add+0xa4>
+80001190:	fec42783          	lw	a5,-20(s0)
+80001194:	00178793          	addi	a5,a5,1
+80001198:	fef42623          	sw	a5,-20(s0)
+8000119c:	810267b7          	lui	a5,0x81026
+800011a0:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
+800011a4:	fec42703          	lw	a4,-20(s0)
+800011a8:	00e7aa23          	sw	a4,20(a5)
+800011ac:	fcc42703          	lw	a4,-52(s0)
+800011b0:	fe842783          	lw	a5,-24(s0)
+800011b4:	02f76263          	bltu	a4,a5,800011d8 <vx_e_mat_add+0xe0>
+800011b8:	810267b7          	lui	a5,0x81026
+800011bc:	1e478693          	addi	a3,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
+800011c0:	800017b7          	lui	a5,0x80001
+800011c4:	23078613          	addi	a2,a5,560 # 80001230 <barrier_bool+0xfefd7f6c>
+800011c8:	fe842583          	lw	a1,-24(s0)
+800011cc:	fd042503          	lw	a0,-48(s0)
+800011d0:	a98ff0ef          	jal	ra,80000468 <vx_spawnWarps>
+800011d4:	0200006f          	j	800011f4 <vx_e_mat_add+0xfc>
+800011d8:	810267b7          	lui	a5,0x81026
+800011dc:	1e478693          	addi	a3,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
+800011e0:	800017b7          	lui	a5,0x80001
+800011e4:	23078613          	addi	a2,a5,560 # 80001230 <barrier_bool+0xfefd7f6c>
+800011e8:	fcc42583          	lw	a1,-52(s0)
+800011ec:	fd042503          	lw	a0,-48(s0)
+800011f0:	a78ff0ef          	jal	ra,80000468 <vx_spawnWarps>
+800011f4:	ff5fe0ef          	jal	ra,800001e8 <vx_available_warps>
+800011f8:	fea42223          	sw	a0,-28(s0)
+800011fc:	fd042703          	lw	a4,-48(s0)
+80001200:	fe442783          	lw	a5,-28(s0)
+80001204:	00e7f863          	bgeu	a5,a4,80001214 <vx_e_mat_add+0x11c>
+80001208:	fe442503          	lw	a0,-28(s0)
+8000120c:	b4cff0ef          	jal	ra,80000558 <vx_wait_for_warps>
+80001210:	00c0006f          	j	8000121c <vx_e_mat_add+0x124>
+80001214:	fd042503          	lw	a0,-48(s0)
+80001218:	b40ff0ef          	jal	ra,80000558 <vx_wait_for_warps>
+8000121c:	00000013          	nop
+80001220:	03c12083          	lw	ra,60(sp)
+80001224:	03812403          	lw	s0,56(sp)
+80001228:	04010113          	addi	sp,sp,64
+8000122c:	00008067          	ret
 
-8000123c <_vx_e_mat_add>:
-8000123c:	fb010113          	addi	sp,sp,-80
-80001240:	04112623          	sw	ra,76(sp)
-80001244:	04812423          	sw	s0,72(sp)
-80001248:	05010413          	addi	s0,sp,80
-8000124c:	faa42e23          	sw	a0,-68(s0)
-80001250:	fab42c23          	sw	a1,-72(s0)
-80001254:	c00ff0ef          	jal	ra,80000654 <vx_get_arg_struct>
-80001258:	fea42023          	sw	a0,-32(s0)
+80001230 <_vx_e_mat_add>:
+80001230:	fb010113          	addi	sp,sp,-80
+80001234:	04112623          	sw	ra,76(sp)
+80001238:	04812423          	sw	s0,72(sp)
+8000123c:	05010413          	addi	s0,sp,80
+80001240:	faa42e23          	sw	a0,-68(s0)
+80001244:	fab42c23          	sw	a1,-72(s0)
+80001248:	c00ff0ef          	jal	ra,80000648 <vx_get_arg_struct>
+8000124c:	fea42023          	sw	a0,-32(s0)
+80001250:	fe042783          	lw	a5,-32(s0)
+80001254:	0007a783          	lw	a5,0(a5)
+80001258:	fcf42e23          	sw	a5,-36(s0)
 8000125c:	fe042783          	lw	a5,-32(s0)
-80001260:	0007a783          	lw	a5,0(a5)
-80001264:	fcf42e23          	sw	a5,-36(s0)
-80001268:	fe042783          	lw	a5,-32(s0)
-8000126c:	0047a783          	lw	a5,4(a5)
-80001270:	0007a783          	lw	a5,0(a5)
-80001274:	fcf42c23          	sw	a5,-40(s0)
+80001260:	0047a783          	lw	a5,4(a5)
+80001264:	0007a783          	lw	a5,0(a5)
+80001268:	fcf42c23          	sw	a5,-40(s0)
+8000126c:	fe042783          	lw	a5,-32(s0)
+80001270:	0087a783          	lw	a5,8(a5)
+80001274:	fcf42a23          	sw	a5,-44(s0)
 80001278:	fe042783          	lw	a5,-32(s0)
-8000127c:	0087a783          	lw	a5,8(a5)
-80001280:	fcf42a23          	sw	a5,-44(s0)
-80001284:	fe042783          	lw	a5,-32(s0)
-80001288:	0147a783          	lw	a5,20(a5)
-8000128c:	fef42623          	sw	a5,-20(s0)
-80001290:	fec42703          	lw	a4,-20(s0)
-80001294:	fbc42783          	lw	a5,-68(s0)
-80001298:	02f707b3          	mul	a5,a4,a5
-8000129c:	fef42423          	sw	a5,-24(s0)
-800012a0:	fec42783          	lw	a5,-20(s0)
-800012a4:	00079a63          	bnez	a5,800012b8 <_vx_e_mat_add+0x7c>
-800012a8:	00100793          	li	a5,1
-800012ac:	fef42623          	sw	a5,-20(s0)
-800012b0:	fbc42783          	lw	a5,-68(s0)
-800012b4:	fef42423          	sw	a5,-24(s0)
-800012b8:	fe042783          	lw	a5,-32(s0)
-800012bc:	00c7a783          	lw	a5,12(a5)
-800012c0:	fcf42823          	sw	a5,-48(s0)
-800012c4:	fe042223          	sw	zero,-28(s0)
-800012c8:	0b00006f          	j	80001378 <_vx_e_mat_add+0x13c>
-800012cc:	fb842703          	lw	a4,-72(s0)
-800012d0:	fd042783          	lw	a5,-48(s0)
-800012d4:	02f70733          	mul	a4,a4,a5
-800012d8:	fe842783          	lw	a5,-24(s0)
-800012dc:	00f707b3          	add	a5,a4,a5
-800012e0:	fcf42623          	sw	a5,-52(s0)
-800012e4:	fe842703          	lw	a4,-24(s0)
-800012e8:	fd042783          	lw	a5,-48(s0)
-800012ec:	00f737b3          	sltu	a5,a4,a5
-800012f0:	0ff7f793          	andi	a5,a5,255
-800012f4:	fcf42423          	sw	a5,-56(s0)
-800012f8:	fc842783          	lw	a5,-56(s0)
-800012fc:	0017b793          	seqz	a5,a5
-80001300:	fcf403a3          	sb	a5,-57(s0)
-80001304:	fc744783          	lbu	a5,-57(s0)
-80001308:	00078f13          	mv	t5,a5
-8000130c:	800017b7          	lui	a5,0x80001
-80001310:	36478f93          	addi	t6,a5,868 # 80001364 <barrier_bool+0xfefd80a0>
-80001314:	000f206b          	0xf206b
-80001318:	01ff707b          	0x1ff707b
-8000131c:	fcc42783          	lw	a5,-52(s0)
-80001320:	00279793          	slli	a5,a5,0x2
-80001324:	fdc42703          	lw	a4,-36(s0)
-80001328:	00f707b3          	add	a5,a4,a5
-8000132c:	0007a683          	lw	a3,0(a5)
-80001330:	fcc42783          	lw	a5,-52(s0)
-80001334:	00279793          	slli	a5,a5,0x2
-80001338:	fd442703          	lw	a4,-44(s0)
-8000133c:	00f707b3          	add	a5,a4,a5
-80001340:	fd842703          	lw	a4,-40(s0)
-80001344:	00e68733          	add	a4,a3,a4
-80001348:	00e7a023          	sw	a4,0(a5)
-8000134c:	fe842783          	lw	a5,-24(s0)
-80001350:	00178793          	addi	a5,a5,1
-80001354:	fef42423          	sw	a5,-24(s0)
-80001358:	800017b7          	lui	a5,0x80001
-8000135c:	36878e13          	addi	t3,a5,872 # 80001368 <barrier_bool+0xfefd80a4>
-80001360:	000e0067          	jr	t3
-80001364:	00000013          	nop
-80001368:	0000306b          	0x306b
+8000127c:	0147a783          	lw	a5,20(a5)
+80001280:	fef42623          	sw	a5,-20(s0)
+80001284:	fec42703          	lw	a4,-20(s0)
+80001288:	fbc42783          	lw	a5,-68(s0)
+8000128c:	02f707b3          	mul	a5,a4,a5
+80001290:	fef42423          	sw	a5,-24(s0)
+80001294:	fec42783          	lw	a5,-20(s0)
+80001298:	00079a63          	bnez	a5,800012ac <_vx_e_mat_add+0x7c>
+8000129c:	00100793          	li	a5,1
+800012a0:	fef42623          	sw	a5,-20(s0)
+800012a4:	fbc42783          	lw	a5,-68(s0)
+800012a8:	fef42423          	sw	a5,-24(s0)
+800012ac:	fe042783          	lw	a5,-32(s0)
+800012b0:	00c7a783          	lw	a5,12(a5)
+800012b4:	fcf42823          	sw	a5,-48(s0)
+800012b8:	fe042223          	sw	zero,-28(s0)
+800012bc:	0b00006f          	j	8000136c <_vx_e_mat_add+0x13c>
+800012c0:	fb842703          	lw	a4,-72(s0)
+800012c4:	fd042783          	lw	a5,-48(s0)
+800012c8:	02f70733          	mul	a4,a4,a5
+800012cc:	fe842783          	lw	a5,-24(s0)
+800012d0:	00f707b3          	add	a5,a4,a5
+800012d4:	fcf42623          	sw	a5,-52(s0)
+800012d8:	fe842703          	lw	a4,-24(s0)
+800012dc:	fd042783          	lw	a5,-48(s0)
+800012e0:	00f737b3          	sltu	a5,a4,a5
+800012e4:	0ff7f793          	andi	a5,a5,255
+800012e8:	fcf42423          	sw	a5,-56(s0)
+800012ec:	fc842783          	lw	a5,-56(s0)
+800012f0:	0017b793          	seqz	a5,a5
+800012f4:	fcf403a3          	sb	a5,-57(s0)
+800012f8:	fc744783          	lbu	a5,-57(s0)
+800012fc:	00078f13          	mv	t5,a5
+80001300:	800017b7          	lui	a5,0x80001
+80001304:	35878f93          	addi	t6,a5,856 # 80001358 <barrier_bool+0xfefd8094>
+80001308:	000f206b          	0xf206b
+8000130c:	01ff707b          	0x1ff707b
+80001310:	fcc42783          	lw	a5,-52(s0)
+80001314:	00279793          	slli	a5,a5,0x2
+80001318:	fdc42703          	lw	a4,-36(s0)
+8000131c:	00f707b3          	add	a5,a4,a5
+80001320:	0007a683          	lw	a3,0(a5)
+80001324:	fcc42783          	lw	a5,-52(s0)
+80001328:	00279793          	slli	a5,a5,0x2
+8000132c:	fd442703          	lw	a4,-44(s0)
+80001330:	00f707b3          	add	a5,a4,a5
+80001334:	fd842703          	lw	a4,-40(s0)
+80001338:	00e68733          	add	a4,a3,a4
+8000133c:	00e7a023          	sw	a4,0(a5)
+80001340:	fe842783          	lw	a5,-24(s0)
+80001344:	00178793          	addi	a5,a5,1
+80001348:	fef42423          	sw	a5,-24(s0)
+8000134c:	800017b7          	lui	a5,0x80001
+80001350:	35c78e13          	addi	t3,a5,860 # 8000135c <barrier_bool+0xfefd8098>
+80001354:	000e0067          	jr	t3
+80001358:	00000013          	nop
+8000135c:	0000306b          	0x306b
+80001360:	fe442783          	lw	a5,-28(s0)
+80001364:	00178793          	addi	a5,a5,1
+80001368:	fef42223          	sw	a5,-28(s0)
 8000136c:	fe442783          	lw	a5,-28(s0)
-80001370:	00178793          	addi	a5,a5,1
-80001374:	fef42223          	sw	a5,-28(s0)
-80001378:	fe442783          	lw	a5,-28(s0)
-8000137c:	fec42703          	lw	a4,-20(s0)
-80001380:	f4e7e6e3          	bltu	a5,a4,800012cc <_vx_e_mat_add+0x90>
-80001384:	00000013          	nop
-80001388:	04c12083          	lw	ra,76(sp)
-8000138c:	04812403          	lw	s0,72(sp)
-80001390:	05010113          	addi	sp,sp,80
-80001394:	00008067          	ret
+80001370:	fec42703          	lw	a4,-20(s0)
+80001374:	f4e7e6e3          	bltu	a5,a4,800012c0 <_vx_e_mat_add+0x90>
+80001378:	00000013          	nop
+8000137c:	04c12083          	lw	ra,76(sp)
+80001380:	04812403          	lw	s0,72(sp)
+80001384:	05010113          	addi	sp,sp,80
+80001388:	00008067          	ret
 
-80001398 <vx_e_mat_mult>:
-80001398:	fc010113          	addi	sp,sp,-64
-8000139c:	02112e23          	sw	ra,60(sp)
-800013a0:	02812c23          	sw	s0,56(sp)
-800013a4:	04010413          	addi	s0,sp,64
-800013a8:	fca42e23          	sw	a0,-36(s0)
-800013ac:	fcb42c23          	sw	a1,-40(s0)
-800013b0:	fcc42a23          	sw	a2,-44(s0)
-800013b4:	fcd42823          	sw	a3,-48(s0)
-800013b8:	fce42623          	sw	a4,-52(s0)
+8000138c <vx_e_mat_mult>:
+8000138c:	fc010113          	addi	sp,sp,-64
+80001390:	02112e23          	sw	ra,60(sp)
+80001394:	02812c23          	sw	s0,56(sp)
+80001398:	04010413          	addi	s0,sp,64
+8000139c:	fca42e23          	sw	a0,-36(s0)
+800013a0:	fcb42c23          	sw	a1,-40(s0)
+800013a4:	fcc42a23          	sw	a2,-44(s0)
+800013a8:	fcd42823          	sw	a3,-48(s0)
+800013ac:	fce42623          	sw	a4,-52(s0)
+800013b0:	810267b7          	lui	a5,0x81026
+800013b4:	fdc42703          	lw	a4,-36(s0)
+800013b8:	1ee7a223          	sw	a4,484(a5) # 810261e4 <barrier_bool+0xffffcf20>
 800013bc:	810267b7          	lui	a5,0x81026
-800013c0:	fdc42703          	lw	a4,-36(s0)
-800013c4:	1ee7a223          	sw	a4,484(a5) # 810261e4 <barrier_bool+0xffffcf20>
-800013c8:	810267b7          	lui	a5,0x81026
-800013cc:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-800013d0:	fd842703          	lw	a4,-40(s0)
-800013d4:	00e7a223          	sw	a4,4(a5)
-800013d8:	810267b7          	lui	a5,0x81026
-800013dc:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-800013e0:	fd442703          	lw	a4,-44(s0)
-800013e4:	00e7a423          	sw	a4,8(a5)
-800013e8:	810267b7          	lui	a5,0x81026
-800013ec:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-800013f0:	fcc42703          	lw	a4,-52(s0)
-800013f4:	00e7a623          	sw	a4,12(a5)
-800013f8:	810267b7          	lui	a5,0x81026
-800013fc:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-80001400:	fd042703          	lw	a4,-48(s0)
-80001404:	00e7a823          	sw	a4,16(a5)
-80001408:	df5fe0ef          	jal	ra,800001fc <vx_available_threads>
-8000140c:	fea42423          	sw	a0,-24(s0)
-80001410:	fcc42703          	lw	a4,-52(s0)
-80001414:	fe842783          	lw	a5,-24(s0)
-80001418:	02f757b3          	divu	a5,a4,a5
-8000141c:	fef42623          	sw	a5,-20(s0)
-80001420:	fcc42703          	lw	a4,-52(s0)
-80001424:	fe842783          	lw	a5,-24(s0)
-80001428:	02f777b3          	remu	a5,a4,a5
-8000142c:	00078863          	beqz	a5,8000143c <vx_e_mat_mult+0xa4>
-80001430:	fec42783          	lw	a5,-20(s0)
-80001434:	00178793          	addi	a5,a5,1
-80001438:	fef42623          	sw	a5,-20(s0)
-8000143c:	810267b7          	lui	a5,0x81026
-80001440:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-80001444:	fec42703          	lw	a4,-20(s0)
-80001448:	00e7aa23          	sw	a4,20(a5)
-8000144c:	fcc42703          	lw	a4,-52(s0)
-80001450:	fe842783          	lw	a5,-24(s0)
-80001454:	02f76263          	bltu	a4,a5,80001478 <vx_e_mat_mult+0xe0>
-80001458:	810267b7          	lui	a5,0x81026
-8000145c:	1e478693          	addi	a3,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-80001460:	800017b7          	lui	a5,0x80001
-80001464:	4d078613          	addi	a2,a5,1232 # 800014d0 <barrier_bool+0xfefd820c>
-80001468:	fe842583          	lw	a1,-24(s0)
-8000146c:	fd042503          	lw	a0,-48(s0)
-80001470:	804ff0ef          	jal	ra,80000474 <vx_spawnWarps>
-80001474:	0200006f          	j	80001494 <vx_e_mat_mult+0xfc>
-80001478:	810267b7          	lui	a5,0x81026
-8000147c:	1e478693          	addi	a3,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
-80001480:	800017b7          	lui	a5,0x80001
-80001484:	4d078613          	addi	a2,a5,1232 # 800014d0 <barrier_bool+0xfefd820c>
-80001488:	fcc42583          	lw	a1,-52(s0)
-8000148c:	fd042503          	lw	a0,-48(s0)
-80001490:	fe5fe0ef          	jal	ra,80000474 <vx_spawnWarps>
-80001494:	d61fe0ef          	jal	ra,800001f4 <vx_available_warps>
-80001498:	fea42223          	sw	a0,-28(s0)
-8000149c:	fd042703          	lw	a4,-48(s0)
-800014a0:	fe442783          	lw	a5,-28(s0)
-800014a4:	00e7f863          	bgeu	a5,a4,800014b4 <vx_e_mat_mult+0x11c>
-800014a8:	fe442503          	lw	a0,-28(s0)
-800014ac:	8b8ff0ef          	jal	ra,80000564 <vx_wait_for_warps>
-800014b0:	00c0006f          	j	800014bc <vx_e_mat_mult+0x124>
-800014b4:	fd042503          	lw	a0,-48(s0)
-800014b8:	8acff0ef          	jal	ra,80000564 <vx_wait_for_warps>
-800014bc:	00000013          	nop
-800014c0:	03c12083          	lw	ra,60(sp)
-800014c4:	03812403          	lw	s0,56(sp)
-800014c8:	04010113          	addi	sp,sp,64
-800014cc:	00008067          	ret
+800013c0:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
+800013c4:	fd842703          	lw	a4,-40(s0)
+800013c8:	00e7a223          	sw	a4,4(a5)
+800013cc:	810267b7          	lui	a5,0x81026
+800013d0:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
+800013d4:	fd442703          	lw	a4,-44(s0)
+800013d8:	00e7a423          	sw	a4,8(a5)
+800013dc:	810267b7          	lui	a5,0x81026
+800013e0:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
+800013e4:	fcc42703          	lw	a4,-52(s0)
+800013e8:	00e7a623          	sw	a4,12(a5)
+800013ec:	810267b7          	lui	a5,0x81026
+800013f0:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
+800013f4:	fd042703          	lw	a4,-48(s0)
+800013f8:	00e7a823          	sw	a4,16(a5)
+800013fc:	df5fe0ef          	jal	ra,800001f0 <vx_available_threads>
+80001400:	fea42423          	sw	a0,-24(s0)
+80001404:	fcc42703          	lw	a4,-52(s0)
+80001408:	fe842783          	lw	a5,-24(s0)
+8000140c:	02f757b3          	divu	a5,a4,a5
+80001410:	fef42623          	sw	a5,-20(s0)
+80001414:	fcc42703          	lw	a4,-52(s0)
+80001418:	fe842783          	lw	a5,-24(s0)
+8000141c:	02f777b3          	remu	a5,a4,a5
+80001420:	00078863          	beqz	a5,80001430 <vx_e_mat_mult+0xa4>
+80001424:	fec42783          	lw	a5,-20(s0)
+80001428:	00178793          	addi	a5,a5,1
+8000142c:	fef42623          	sw	a5,-20(s0)
+80001430:	810267b7          	lui	a5,0x81026
+80001434:	1e478793          	addi	a5,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
+80001438:	fec42703          	lw	a4,-20(s0)
+8000143c:	00e7aa23          	sw	a4,20(a5)
+80001440:	fcc42703          	lw	a4,-52(s0)
+80001444:	fe842783          	lw	a5,-24(s0)
+80001448:	02f76263          	bltu	a4,a5,8000146c <vx_e_mat_mult+0xe0>
+8000144c:	810267b7          	lui	a5,0x81026
+80001450:	1e478693          	addi	a3,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
+80001454:	800017b7          	lui	a5,0x80001
+80001458:	4c478613          	addi	a2,a5,1220 # 800014c4 <barrier_bool+0xfefd8200>
+8000145c:	fe842583          	lw	a1,-24(s0)
+80001460:	fd042503          	lw	a0,-48(s0)
+80001464:	804ff0ef          	jal	ra,80000468 <vx_spawnWarps>
+80001468:	0200006f          	j	80001488 <vx_e_mat_mult+0xfc>
+8000146c:	810267b7          	lui	a5,0x81026
+80001470:	1e478693          	addi	a3,a5,484 # 810261e4 <barrier_bool+0xffffcf20>
+80001474:	800017b7          	lui	a5,0x80001
+80001478:	4c478613          	addi	a2,a5,1220 # 800014c4 <barrier_bool+0xfefd8200>
+8000147c:	fcc42583          	lw	a1,-52(s0)
+80001480:	fd042503          	lw	a0,-48(s0)
+80001484:	fe5fe0ef          	jal	ra,80000468 <vx_spawnWarps>
+80001488:	d61fe0ef          	jal	ra,800001e8 <vx_available_warps>
+8000148c:	fea42223          	sw	a0,-28(s0)
+80001490:	fd042703          	lw	a4,-48(s0)
+80001494:	fe442783          	lw	a5,-28(s0)
+80001498:	00e7f863          	bgeu	a5,a4,800014a8 <vx_e_mat_mult+0x11c>
+8000149c:	fe442503          	lw	a0,-28(s0)
+800014a0:	8b8ff0ef          	jal	ra,80000558 <vx_wait_for_warps>
+800014a4:	00c0006f          	j	800014b0 <vx_e_mat_mult+0x124>
+800014a8:	fd042503          	lw	a0,-48(s0)
+800014ac:	8acff0ef          	jal	ra,80000558 <vx_wait_for_warps>
+800014b0:	00000013          	nop
+800014b4:	03c12083          	lw	ra,60(sp)
+800014b8:	03812403          	lw	s0,56(sp)
+800014bc:	04010113          	addi	sp,sp,64
+800014c0:	00008067          	ret
 
-800014d0 <_vx_e_mat_mult>:
-800014d0:	fb010113          	addi	sp,sp,-80
-800014d4:	04112623          	sw	ra,76(sp)
-800014d8:	04812423          	sw	s0,72(sp)
-800014dc:	05010413          	addi	s0,sp,80
-800014e0:	faa42e23          	sw	a0,-68(s0)
-800014e4:	fab42c23          	sw	a1,-72(s0)
-800014e8:	96cff0ef          	jal	ra,80000654 <vx_get_arg_struct>
-800014ec:	fea42023          	sw	a0,-32(s0)
+800014c4 <_vx_e_mat_mult>:
+800014c4:	fb010113          	addi	sp,sp,-80
+800014c8:	04112623          	sw	ra,76(sp)
+800014cc:	04812423          	sw	s0,72(sp)
+800014d0:	05010413          	addi	s0,sp,80
+800014d4:	faa42e23          	sw	a0,-68(s0)
+800014d8:	fab42c23          	sw	a1,-72(s0)
+800014dc:	96cff0ef          	jal	ra,80000648 <vx_get_arg_struct>
+800014e0:	fea42023          	sw	a0,-32(s0)
+800014e4:	fe042783          	lw	a5,-32(s0)
+800014e8:	0007a783          	lw	a5,0(a5)
+800014ec:	fcf42e23          	sw	a5,-36(s0)
 800014f0:	fe042783          	lw	a5,-32(s0)
-800014f4:	0007a783          	lw	a5,0(a5)
-800014f8:	fcf42e23          	sw	a5,-36(s0)
-800014fc:	fe042783          	lw	a5,-32(s0)
-80001500:	0047a783          	lw	a5,4(a5)
-80001504:	0007a783          	lw	a5,0(a5)
-80001508:	fcf42c23          	sw	a5,-40(s0)
+800014f4:	0047a783          	lw	a5,4(a5)
+800014f8:	0007a783          	lw	a5,0(a5)
+800014fc:	fcf42c23          	sw	a5,-40(s0)
+80001500:	fe042783          	lw	a5,-32(s0)
+80001504:	0087a783          	lw	a5,8(a5)
+80001508:	fcf42a23          	sw	a5,-44(s0)
 8000150c:	fe042783          	lw	a5,-32(s0)
-80001510:	0087a783          	lw	a5,8(a5)
-80001514:	fcf42a23          	sw	a5,-44(s0)
-80001518:	fe042783          	lw	a5,-32(s0)
-8000151c:	0147a783          	lw	a5,20(a5)
-80001520:	fef42623          	sw	a5,-20(s0)
-80001524:	fec42703          	lw	a4,-20(s0)
-80001528:	fbc42783          	lw	a5,-68(s0)
-8000152c:	02f707b3          	mul	a5,a4,a5
-80001530:	fef42423          	sw	a5,-24(s0)
-80001534:	fec42783          	lw	a5,-20(s0)
-80001538:	00079a63          	bnez	a5,8000154c <_vx_e_mat_mult+0x7c>
-8000153c:	00100793          	li	a5,1
-80001540:	fef42623          	sw	a5,-20(s0)
-80001544:	fbc42783          	lw	a5,-68(s0)
-80001548:	fef42423          	sw	a5,-24(s0)
-8000154c:	fe042783          	lw	a5,-32(s0)
-80001550:	00c7a783          	lw	a5,12(a5)
-80001554:	fcf42823          	sw	a5,-48(s0)
-80001558:	fe042223          	sw	zero,-28(s0)
-8000155c:	0b00006f          	j	8000160c <_vx_e_mat_mult+0x13c>
-80001560:	fb842703          	lw	a4,-72(s0)
-80001564:	fd042783          	lw	a5,-48(s0)
-80001568:	02f70733          	mul	a4,a4,a5
-8000156c:	fe842783          	lw	a5,-24(s0)
-80001570:	00f707b3          	add	a5,a4,a5
-80001574:	fcf42623          	sw	a5,-52(s0)
-80001578:	fe842703          	lw	a4,-24(s0)
-8000157c:	fd042783          	lw	a5,-48(s0)
-80001580:	00f737b3          	sltu	a5,a4,a5
-80001584:	0ff7f793          	andi	a5,a5,255
-80001588:	fcf42423          	sw	a5,-56(s0)
-8000158c:	fc842783          	lw	a5,-56(s0)
-80001590:	0017b793          	seqz	a5,a5
-80001594:	fcf403a3          	sb	a5,-57(s0)
-80001598:	fc744783          	lbu	a5,-57(s0)
-8000159c:	00078f13          	mv	t5,a5
-800015a0:	800017b7          	lui	a5,0x80001
-800015a4:	5f878f93          	addi	t6,a5,1528 # 800015f8 <barrier_bool+0xfefd8334>
-800015a8:	000f206b          	0xf206b
-800015ac:	01ff707b          	0x1ff707b
-800015b0:	fcc42783          	lw	a5,-52(s0)
-800015b4:	00279793          	slli	a5,a5,0x2
-800015b8:	fdc42703          	lw	a4,-36(s0)
-800015bc:	00f707b3          	add	a5,a4,a5
-800015c0:	0007a683          	lw	a3,0(a5)
-800015c4:	fcc42783          	lw	a5,-52(s0)
-800015c8:	00279793          	slli	a5,a5,0x2
-800015cc:	fd442703          	lw	a4,-44(s0)
-800015d0:	00f707b3          	add	a5,a4,a5
-800015d4:	fd842703          	lw	a4,-40(s0)
-800015d8:	02e68733          	mul	a4,a3,a4
-800015dc:	00e7a023          	sw	a4,0(a5)
-800015e0:	fe842783          	lw	a5,-24(s0)
-800015e4:	00178793          	addi	a5,a5,1
-800015e8:	fef42423          	sw	a5,-24(s0)
-800015ec:	800017b7          	lui	a5,0x80001
-800015f0:	5fc78e13          	addi	t3,a5,1532 # 800015fc <barrier_bool+0xfefd8338>
-800015f4:	000e0067          	jr	t3
-800015f8:	00000013          	nop
-800015fc:	0000306b          	0x306b
+80001510:	0147a783          	lw	a5,20(a5)
+80001514:	fef42623          	sw	a5,-20(s0)
+80001518:	fec42703          	lw	a4,-20(s0)
+8000151c:	fbc42783          	lw	a5,-68(s0)
+80001520:	02f707b3          	mul	a5,a4,a5
+80001524:	fef42423          	sw	a5,-24(s0)
+80001528:	fec42783          	lw	a5,-20(s0)
+8000152c:	00079a63          	bnez	a5,80001540 <_vx_e_mat_mult+0x7c>
+80001530:	00100793          	li	a5,1
+80001534:	fef42623          	sw	a5,-20(s0)
+80001538:	fbc42783          	lw	a5,-68(s0)
+8000153c:	fef42423          	sw	a5,-24(s0)
+80001540:	fe042783          	lw	a5,-32(s0)
+80001544:	00c7a783          	lw	a5,12(a5)
+80001548:	fcf42823          	sw	a5,-48(s0)
+8000154c:	fe042223          	sw	zero,-28(s0)
+80001550:	0b00006f          	j	80001600 <_vx_e_mat_mult+0x13c>
+80001554:	fb842703          	lw	a4,-72(s0)
+80001558:	fd042783          	lw	a5,-48(s0)
+8000155c:	02f70733          	mul	a4,a4,a5
+80001560:	fe842783          	lw	a5,-24(s0)
+80001564:	00f707b3          	add	a5,a4,a5
+80001568:	fcf42623          	sw	a5,-52(s0)
+8000156c:	fe842703          	lw	a4,-24(s0)
+80001570:	fd042783          	lw	a5,-48(s0)
+80001574:	00f737b3          	sltu	a5,a4,a5
+80001578:	0ff7f793          	andi	a5,a5,255
+8000157c:	fcf42423          	sw	a5,-56(s0)
+80001580:	fc842783          	lw	a5,-56(s0)
+80001584:	0017b793          	seqz	a5,a5
+80001588:	fcf403a3          	sb	a5,-57(s0)
+8000158c:	fc744783          	lbu	a5,-57(s0)
+80001590:	00078f13          	mv	t5,a5
+80001594:	800017b7          	lui	a5,0x80001
+80001598:	5ec78f93          	addi	t6,a5,1516 # 800015ec <barrier_bool+0xfefd8328>
+8000159c:	000f206b          	0xf206b
+800015a0:	01ff707b          	0x1ff707b
+800015a4:	fcc42783          	lw	a5,-52(s0)
+800015a8:	00279793          	slli	a5,a5,0x2
+800015ac:	fdc42703          	lw	a4,-36(s0)
+800015b0:	00f707b3          	add	a5,a4,a5
+800015b4:	0007a683          	lw	a3,0(a5)
+800015b8:	fcc42783          	lw	a5,-52(s0)
+800015bc:	00279793          	slli	a5,a5,0x2
+800015c0:	fd442703          	lw	a4,-44(s0)
+800015c4:	00f707b3          	add	a5,a4,a5
+800015c8:	fd842703          	lw	a4,-40(s0)
+800015cc:	02e68733          	mul	a4,a3,a4
+800015d0:	00e7a023          	sw	a4,0(a5)
+800015d4:	fe842783          	lw	a5,-24(s0)
+800015d8:	00178793          	addi	a5,a5,1
+800015dc:	fef42423          	sw	a5,-24(s0)
+800015e0:	800017b7          	lui	a5,0x80001
+800015e4:	5f078e13          	addi	t3,a5,1520 # 800015f0 <barrier_bool+0xfefd832c>
+800015e8:	000e0067          	jr	t3
+800015ec:	00000013          	nop
+800015f0:	0000306b          	0x306b
+800015f4:	fe442783          	lw	a5,-28(s0)
+800015f8:	00178793          	addi	a5,a5,1
+800015fc:	fef42223          	sw	a5,-28(s0)
 80001600:	fe442783          	lw	a5,-28(s0)
-80001604:	00178793          	addi	a5,a5,1
-80001608:	fef42223          	sw	a5,-28(s0)
-8000160c:	fe442783          	lw	a5,-28(s0)
-80001610:	fec42703          	lw	a4,-20(s0)
-80001614:	f4e7e6e3          	bltu	a5,a4,80001560 <_vx_e_mat_mult+0x90>
-80001618:	00000013          	nop
-8000161c:	04c12083          	lw	ra,76(sp)
-80001620:	04812403          	lw	s0,72(sp)
-80001624:	05010113          	addi	sp,sp,80
-80001628:	00008067          	ret
+80001604:	fec42703          	lw	a4,-20(s0)
+80001608:	f4e7e6e3          	bltu	a5,a4,80001554 <_vx_e_mat_mult+0x90>
+8000160c:	00000013          	nop
+80001610:	04c12083          	lw	ra,76(sp)
+80001614:	04812403          	lw	s0,72(sp)
+80001618:	05010113          	addi	sp,sp,80
+8000161c:	00008067          	ret
 
-8000162c <sleep>:
-8000162c:	fd010113          	addi	sp,sp,-48
-80001630:	02812623          	sw	s0,44(sp)
-80001634:	03010413          	addi	s0,sp,48
-80001638:	fca42e23          	sw	a0,-36(s0)
-8000163c:	fe042623          	sw	zero,-20(s0)
-80001640:	0100006f          	j	80001650 <sleep+0x24>
-80001644:	fec42783          	lw	a5,-20(s0)
-80001648:	00178793          	addi	a5,a5,1
-8000164c:	fef42623          	sw	a5,-20(s0)
-80001650:	fec42703          	lw	a4,-20(s0)
-80001654:	fdc42783          	lw	a5,-36(s0)
-80001658:	fef746e3          	blt	a4,a5,80001644 <sleep+0x18>
-8000165c:	00000013          	nop
-80001660:	02c12403          	lw	s0,44(sp)
-80001664:	03010113          	addi	sp,sp,48
-80001668:	00008067          	ret
+80001620 <sleep>:
+80001620:	fd010113          	addi	sp,sp,-48
+80001624:	02812623          	sw	s0,44(sp)
+80001628:	03010413          	addi	s0,sp,48
+8000162c:	fca42e23          	sw	a0,-36(s0)
+80001630:	fe042623          	sw	zero,-20(s0)
+80001634:	0100006f          	j	80001644 <sleep+0x24>
+80001638:	fec42783          	lw	a5,-20(s0)
+8000163c:	00178793          	addi	a5,a5,1
+80001640:	fef42623          	sw	a5,-20(s0)
+80001644:	fec42703          	lw	a4,-20(s0)
+80001648:	fdc42783          	lw	a5,-36(s0)
+8000164c:	fef746e3          	blt	a4,a5,80001638 <sleep+0x18>
+80001650:	00000013          	nop
+80001654:	02c12403          	lw	s0,44(sp)
+80001658:	03010113          	addi	sp,sp,48
+8000165c:	00008067          	ret
 
-8000166c <barrier>:
-8000166c:	fd010113          	addi	sp,sp,-48
-80001670:	02112623          	sw	ra,44(sp)
-80001674:	02812423          	sw	s0,40(sp)
-80001678:	03010413          	addi	s0,sp,48
-8000167c:	fca42e23          	sw	a0,-36(s0)
-80001680:	fcb42c23          	sw	a1,-40(s0)
-80001684:	810267b7          	lui	a5,0x81026
-80001688:	1fc78713          	addi	a4,a5,508 # 810261fc <barrier_bool+0xffffcf38>
-8000168c:	fdc42783          	lw	a5,-36(s0)
-80001690:	00f707b3          	add	a5,a4,a5
-80001694:	00100713          	li	a4,1
-80001698:	00e78023          	sb	a4,0(a5)
-8000169c:	fdc42783          	lw	a5,-36(s0)
-800016a0:	0c079063          	bnez	a5,80001760 <barrier+0xf4>
-800016a4:	fe0401a3          	sb	zero,-29(s0)
-800016a8:	fe042623          	sw	zero,-20(s0)
-800016ac:	0a80006f          	j	80001754 <barrier+0xe8>
-800016b0:	fe042623          	sw	zero,-20(s0)
-800016b4:	fe042423          	sw	zero,-24(s0)
-800016b8:	0340006f          	j	800016ec <barrier+0x80>
-800016bc:	810267b7          	lui	a5,0x81026
-800016c0:	1fc78713          	addi	a4,a5,508 # 810261fc <barrier_bool+0xffffcf38>
-800016c4:	fe842783          	lw	a5,-24(s0)
-800016c8:	00f707b3          	add	a5,a4,a5
-800016cc:	0007c783          	lbu	a5,0(a5)
-800016d0:	00078863          	beqz	a5,800016e0 <barrier+0x74>
-800016d4:	fec42783          	lw	a5,-20(s0)
+80001660 <barrier>:
+80001660:	fd010113          	addi	sp,sp,-48
+80001664:	02112623          	sw	ra,44(sp)
+80001668:	02812423          	sw	s0,40(sp)
+8000166c:	03010413          	addi	s0,sp,48
+80001670:	fca42e23          	sw	a0,-36(s0)
+80001674:	fcb42c23          	sw	a1,-40(s0)
+80001678:	810267b7          	lui	a5,0x81026
+8000167c:	1fc78713          	addi	a4,a5,508 # 810261fc <barrier_bool+0xffffcf38>
+80001680:	fdc42783          	lw	a5,-36(s0)
+80001684:	00f707b3          	add	a5,a4,a5
+80001688:	00100713          	li	a4,1
+8000168c:	00e78023          	sb	a4,0(a5)
+80001690:	fdc42783          	lw	a5,-36(s0)
+80001694:	0c079063          	bnez	a5,80001754 <barrier+0xf4>
+80001698:	fe0401a3          	sb	zero,-29(s0)
+8000169c:	fe042623          	sw	zero,-20(s0)
+800016a0:	0a80006f          	j	80001748 <barrier+0xe8>
+800016a4:	fe042623          	sw	zero,-20(s0)
+800016a8:	fe042423          	sw	zero,-24(s0)
+800016ac:	0340006f          	j	800016e0 <barrier+0x80>
+800016b0:	810267b7          	lui	a5,0x81026
+800016b4:	1fc78713          	addi	a4,a5,508 # 810261fc <barrier_bool+0xffffcf38>
+800016b8:	fe842783          	lw	a5,-24(s0)
+800016bc:	00f707b3          	add	a5,a4,a5
+800016c0:	0007c783          	lbu	a5,0(a5)
+800016c4:	00078863          	beqz	a5,800016d4 <barrier+0x74>
+800016c8:	fec42783          	lw	a5,-20(s0)
+800016cc:	00178793          	addi	a5,a5,1
+800016d0:	fef42623          	sw	a5,-20(s0)
+800016d4:	fe842783          	lw	a5,-24(s0)
 800016d8:	00178793          	addi	a5,a5,1
-800016dc:	fef42623          	sw	a5,-20(s0)
-800016e0:	fe842783          	lw	a5,-24(s0)
-800016e4:	00178793          	addi	a5,a5,1
-800016e8:	fef42423          	sw	a5,-24(s0)
-800016ec:	fe842703          	lw	a4,-24(s0)
+800016dc:	fef42423          	sw	a5,-24(s0)
+800016e0:	fe842703          	lw	a4,-24(s0)
+800016e4:	fd842783          	lw	a5,-40(s0)
+800016e8:	fcf744e3          	blt	a4,a5,800016b0 <barrier+0x50>
+800016ec:	fec42703          	lw	a4,-20(s0)
 800016f0:	fd842783          	lw	a5,-40(s0)
-800016f4:	fcf744e3          	blt	a4,a5,800016bc <barrier+0x50>
-800016f8:	fec42703          	lw	a4,-20(s0)
-800016fc:	fd842783          	lw	a5,-40(s0)
-80001700:	04f71a63          	bne	a4,a5,80001754 <barrier+0xe8>
-80001704:	fe042223          	sw	zero,-28(s0)
-80001708:	0400006f          	j	80001748 <barrier+0xdc>
-8000170c:	810267b7          	lui	a5,0x81026
-80001710:	1fc78713          	addi	a4,a5,508 # 810261fc <barrier_bool+0xffffcf38>
-80001714:	fe442783          	lw	a5,-28(s0)
-80001718:	00f707b3          	add	a5,a4,a5
-8000171c:	00078023          	sb	zero,0(a5)
-80001720:	810297b7          	lui	a5,0x81029
-80001724:	00100713          	li	a4,1
-80001728:	2ce78223          	sb	a4,708(a5) # 810292c4 <barrier_bool+0x0>
-8000172c:	04600513          	li	a0,70
-80001730:	efdff0ef          	jal	ra,8000162c <sleep>
-80001734:	810297b7          	lui	a5,0x81029
-80001738:	2c078223          	sb	zero,708(a5) # 810292c4 <barrier_bool+0x0>
-8000173c:	fe442783          	lw	a5,-28(s0)
-80001740:	00178793          	addi	a5,a5,1
-80001744:	fef42223          	sw	a5,-28(s0)
-80001748:	fe442703          	lw	a4,-28(s0)
-8000174c:	fd842783          	lw	a5,-40(s0)
-80001750:	faf74ee3          	blt	a4,a5,8000170c <barrier+0xa0>
-80001754:	fe344783          	lbu	a5,-29(s0)
-80001758:	f4079ce3          	bnez	a5,800016b0 <barrier+0x44>
-8000175c:	0240006f          	j	80001780 <barrier+0x114>
-80001760:	00000013          	nop
-80001764:	810297b7          	lui	a5,0x81029
-80001768:	2c47c783          	lbu	a5,708(a5) # 810292c4 <barrier_bool+0x0>
-8000176c:	0017c793          	xori	a5,a5,1
-80001770:	0ff7f793          	andi	a5,a5,255
-80001774:	fe0798e3          	bnez	a5,80001764 <barrier+0xf8>
-80001778:	06400513          	li	a0,100
-8000177c:	eb1ff0ef          	jal	ra,8000162c <sleep>
-80001780:	00000013          	nop
-80001784:	02c12083          	lw	ra,44(sp)
-80001788:	02812403          	lw	s0,40(sp)
-8000178c:	03010113          	addi	sp,sp,48
-80001790:	00008067          	ret
+800016f4:	04f71a63          	bne	a4,a5,80001748 <barrier+0xe8>
+800016f8:	fe042223          	sw	zero,-28(s0)
+800016fc:	0400006f          	j	8000173c <barrier+0xdc>
+80001700:	810267b7          	lui	a5,0x81026
+80001704:	1fc78713          	addi	a4,a5,508 # 810261fc <barrier_bool+0xffffcf38>
+80001708:	fe442783          	lw	a5,-28(s0)
+8000170c:	00f707b3          	add	a5,a4,a5
+80001710:	00078023          	sb	zero,0(a5)
+80001714:	810297b7          	lui	a5,0x81029
+80001718:	00100713          	li	a4,1
+8000171c:	2ce78223          	sb	a4,708(a5) # 810292c4 <barrier_bool+0x0>
+80001720:	04600513          	li	a0,70
+80001724:	efdff0ef          	jal	ra,80001620 <sleep>
+80001728:	810297b7          	lui	a5,0x81029
+8000172c:	2c078223          	sb	zero,708(a5) # 810292c4 <barrier_bool+0x0>
+80001730:	fe442783          	lw	a5,-28(s0)
+80001734:	00178793          	addi	a5,a5,1
+80001738:	fef42223          	sw	a5,-28(s0)
+8000173c:	fe442703          	lw	a4,-28(s0)
+80001740:	fd842783          	lw	a5,-40(s0)
+80001744:	faf74ee3          	blt	a4,a5,80001700 <barrier+0xa0>
+80001748:	fe344783          	lbu	a5,-29(s0)
+8000174c:	f4079ce3          	bnez	a5,800016a4 <barrier+0x44>
+80001750:	0240006f          	j	80001774 <barrier+0x114>
+80001754:	00000013          	nop
+80001758:	810297b7          	lui	a5,0x81029
+8000175c:	2c47c783          	lbu	a5,708(a5) # 810292c4 <barrier_bool+0x0>
+80001760:	0017c793          	xori	a5,a5,1
+80001764:	0ff7f793          	andi	a5,a5,255
+80001768:	fe0798e3          	bnez	a5,80001758 <barrier+0xf8>
+8000176c:	06400513          	li	a0,100
+80001770:	eb1ff0ef          	jal	ra,80001620 <sleep>
+80001774:	00000013          	nop
+80001778:	02c12083          	lw	ra,44(sp)
+8000177c:	02812403          	lw	s0,40(sp)
+80001780:	03010113          	addi	sp,sp,48
+80001784:	00008067          	ret
 
-80001794 <sc_time_stamp>:
-80001794:	ff010113          	addi	sp,sp,-16
-80001798:	00812623          	sw	s0,12(sp)
-8000179c:	01010413          	addi	s0,sp,16
-800017a0:	00000793          	li	a5,0
-800017a4:	00000813          	li	a6,0
-800017a8:	00078513          	mv	a0,a5
-800017ac:	00080593          	mv	a1,a6
-800017b0:	00c12403          	lw	s0,12(sp)
-800017b4:	01010113          	addi	sp,sp,16
-800017b8:	00008067          	ret
+80001788 <sc_time_stamp>:
+80001788:	ff010113          	addi	sp,sp,-16
+8000178c:	00812623          	sw	s0,12(sp)
+80001790:	01010413          	addi	s0,sp,16
+80001794:	00000793          	li	a5,0
+80001798:	00000813          	li	a6,0
+8000179c:	00078513          	mv	a0,a5
+800017a0:	00080593          	mv	a1,a6
+800017a4:	00c12403          	lw	s0,12(sp)
+800017a8:	01010113          	addi	sp,sp,16
+800017ac:	00008067          	ret
 
-800017bc <initialize_mats>:
-800017bc:	fe010113          	addi	sp,sp,-32
-800017c0:	00812e23          	sw	s0,28(sp)
-800017c4:	02010413          	addi	s0,sp,32
-800017c8:	fe042623          	sw	zero,-20(s0)
-800017cc:	0480006f          	j	80001814 <initialize_mats+0x58>
-800017d0:	810267b7          	lui	a5,0x81026
-800017d4:	fec42703          	lw	a4,-20(s0)
-800017d8:	00271713          	slli	a4,a4,0x2
-800017dc:	21c78793          	addi	a5,a5,540 # 8102621c <barrier_bool+0xffffcf58>
-800017e0:	00f707b3          	add	a5,a4,a5
-800017e4:	00300713          	li	a4,3
-800017e8:	00e7a023          	sw	a4,0(a5)
-800017ec:	810277b7          	lui	a5,0x81027
-800017f0:	fec42703          	lw	a4,-20(s0)
-800017f4:	00271713          	slli	a4,a4,0x2
-800017f8:	21c78793          	addi	a5,a5,540 # 8102721c <barrier_bool+0xffffdf58>
-800017fc:	00f707b3          	add	a5,a4,a5
-80001800:	00200713          	li	a4,2
-80001804:	00e7a023          	sw	a4,0(a5)
-80001808:	fec42783          	lw	a5,-20(s0)
-8000180c:	00178793          	addi	a5,a5,1
-80001810:	fef42623          	sw	a5,-20(s0)
-80001814:	fec42703          	lw	a4,-20(s0)
-80001818:	0ff00793          	li	a5,255
-8000181c:	fae7dae3          	bge	a5,a4,800017d0 <initialize_mats+0x14>
-80001820:	00000013          	nop
-80001824:	01c12403          	lw	s0,28(sp)
-80001828:	02010113          	addi	sp,sp,32
-8000182c:	00008067          	ret
+800017b0 <initialize_mats>:
+800017b0:	fe010113          	addi	sp,sp,-32
+800017b4:	00812e23          	sw	s0,28(sp)
+800017b8:	02010413          	addi	s0,sp,32
+800017bc:	fe042623          	sw	zero,-20(s0)
+800017c0:	0480006f          	j	80001808 <initialize_mats+0x58>
+800017c4:	810267b7          	lui	a5,0x81026
+800017c8:	fec42703          	lw	a4,-20(s0)
+800017cc:	00271713          	slli	a4,a4,0x2
+800017d0:	21c78793          	addi	a5,a5,540 # 8102621c <barrier_bool+0xffffcf58>
+800017d4:	00f707b3          	add	a5,a4,a5
+800017d8:	00300713          	li	a4,3
+800017dc:	00e7a023          	sw	a4,0(a5)
+800017e0:	810277b7          	lui	a5,0x81027
+800017e4:	fec42703          	lw	a4,-20(s0)
+800017e8:	00271713          	slli	a4,a4,0x2
+800017ec:	21c78793          	addi	a5,a5,540 # 8102721c <barrier_bool+0xffffdf58>
+800017f0:	00f707b3          	add	a5,a4,a5
+800017f4:	00200713          	li	a4,2
+800017f8:	00e7a023          	sw	a4,0(a5)
+800017fc:	fec42783          	lw	a5,-20(s0)
+80001800:	00178793          	addi	a5,a5,1
+80001804:	fef42623          	sw	a5,-20(s0)
+80001808:	fec42703          	lw	a4,-20(s0)
+8000180c:	0ff00793          	li	a5,255
+80001810:	fae7dae3          	bge	a5,a4,800017c4 <initialize_mats+0x14>
+80001814:	00000013          	nop
+80001818:	01c12403          	lw	s0,28(sp)
+8000181c:	02010113          	addi	sp,sp,32
+80001820:	00008067          	ret
 
-80001830 <print_matrix>:
-80001830:	fd010113          	addi	sp,sp,-48
-80001834:	02112623          	sw	ra,44(sp)
-80001838:	02812423          	sw	s0,40(sp)
-8000183c:	03010413          	addi	s0,sp,48
-80001840:	fca42e23          	sw	a0,-36(s0)
-80001844:	810007b7          	lui	a5,0x81000
-80001848:	11878513          	addi	a0,a5,280 # 81000118 <barrier_bool+0xfffd6e54>
-8000184c:	f8dfe0ef          	jal	ra,800007d8 <vx_print_str>
-80001850:	fe042623          	sw	zero,-20(s0)
-80001854:	0580006f          	j	800018ac <print_matrix+0x7c>
-80001858:	fec42783          	lw	a5,-20(s0)
-8000185c:	00078e63          	beqz	a5,80001878 <print_matrix+0x48>
-80001860:	fec42783          	lw	a5,-20(s0)
-80001864:	00f7f793          	andi	a5,a5,15
-80001868:	00079863          	bnez	a5,80001878 <print_matrix+0x48>
-8000186c:	810007b7          	lui	a5,0x81000
-80001870:	13c78513          	addi	a0,a5,316 # 8100013c <barrier_bool+0xfffd6e78>
-80001874:	f65fe0ef          	jal	ra,800007d8 <vx_print_str>
-80001878:	fec42783          	lw	a5,-20(s0)
-8000187c:	00279793          	slli	a5,a5,0x2
-80001880:	fdc42703          	lw	a4,-36(s0)
-80001884:	00f707b3          	add	a5,a4,a5
-80001888:	0007a783          	lw	a5,0(a5)
-8000188c:	00078513          	mv	a0,a5
-80001890:	f85fe0ef          	jal	ra,80000814 <vx_print_hex>
-80001894:	810007b7          	lui	a5,0x81000
-80001898:	14078513          	addi	a0,a5,320 # 81000140 <barrier_bool+0xfffd6e7c>
-8000189c:	f3dfe0ef          	jal	ra,800007d8 <vx_print_str>
-800018a0:	fec42783          	lw	a5,-20(s0)
-800018a4:	00178793          	addi	a5,a5,1
-800018a8:	fef42623          	sw	a5,-20(s0)
-800018ac:	fec42703          	lw	a4,-20(s0)
-800018b0:	0ff00793          	li	a5,255
-800018b4:	fae7d2e3          	bge	a5,a4,80001858 <print_matrix+0x28>
-800018b8:	810007b7          	lui	a5,0x81000
-800018bc:	14478513          	addi	a0,a5,324 # 81000144 <barrier_bool+0xfffd6e80>
-800018c0:	f19fe0ef          	jal	ra,800007d8 <vx_print_str>
-800018c4:	00000013          	nop
-800018c8:	02c12083          	lw	ra,44(sp)
-800018cc:	02812403          	lw	s0,40(sp)
-800018d0:	03010113          	addi	sp,sp,48
-800018d4:	00008067          	ret
+80001824 <print_matrix>:
+80001824:	fd010113          	addi	sp,sp,-48
+80001828:	02112623          	sw	ra,44(sp)
+8000182c:	02812423          	sw	s0,40(sp)
+80001830:	03010413          	addi	s0,sp,48
+80001834:	fca42e23          	sw	a0,-36(s0)
+80001838:	810007b7          	lui	a5,0x81000
+8000183c:	11878513          	addi	a0,a5,280 # 81000118 <barrier_bool+0xfffd6e54>
+80001840:	f8dfe0ef          	jal	ra,800007cc <vx_print_str>
+80001844:	fe042623          	sw	zero,-20(s0)
+80001848:	0580006f          	j	800018a0 <print_matrix+0x7c>
+8000184c:	fec42783          	lw	a5,-20(s0)
+80001850:	00078e63          	beqz	a5,8000186c <print_matrix+0x48>
+80001854:	fec42783          	lw	a5,-20(s0)
+80001858:	00f7f793          	andi	a5,a5,15
+8000185c:	00079863          	bnez	a5,8000186c <print_matrix+0x48>
+80001860:	810007b7          	lui	a5,0x81000
+80001864:	13c78513          	addi	a0,a5,316 # 8100013c <barrier_bool+0xfffd6e78>
+80001868:	f65fe0ef          	jal	ra,800007cc <vx_print_str>
+8000186c:	fec42783          	lw	a5,-20(s0)
+80001870:	00279793          	slli	a5,a5,0x2
+80001874:	fdc42703          	lw	a4,-36(s0)
+80001878:	00f707b3          	add	a5,a4,a5
+8000187c:	0007a783          	lw	a5,0(a5)
+80001880:	00078513          	mv	a0,a5
+80001884:	f85fe0ef          	jal	ra,80000808 <vx_print_hex>
+80001888:	810007b7          	lui	a5,0x81000
+8000188c:	14078513          	addi	a0,a5,320 # 81000140 <barrier_bool+0xfffd6e7c>
+80001890:	f3dfe0ef          	jal	ra,800007cc <vx_print_str>
+80001894:	fec42783          	lw	a5,-20(s0)
+80001898:	00178793          	addi	a5,a5,1
+8000189c:	fef42623          	sw	a5,-20(s0)
+800018a0:	fec42703          	lw	a4,-20(s0)
+800018a4:	0ff00793          	li	a5,255
+800018a8:	fae7d2e3          	bge	a5,a4,8000184c <print_matrix+0x28>
+800018ac:	810007b7          	lui	a5,0x81000
+800018b0:	14478513          	addi	a0,a5,324 # 81000144 <barrier_bool+0xfffd6e80>
+800018b4:	f19fe0ef          	jal	ra,800007cc <vx_print_str>
+800018b8:	00000013          	nop
+800018bc:	02c12083          	lw	ra,44(sp)
+800018c0:	02812403          	lw	s0,40(sp)
+800018c4:	03010113          	addi	sp,sp,48
+800018c8:	00008067          	ret
 
-800018d8 <main>:
-800018d8:	ff010113          	addi	sp,sp,-16
-800018dc:	00112623          	sw	ra,12(sp)
-800018e0:	00812423          	sw	s0,8(sp)
-800018e4:	01010413          	addi	s0,sp,16
-800018e8:	ed5ff0ef          	jal	ra,800017bc <initialize_mats>
-800018ec:	810267b7          	lui	a5,0x81026
-800018f0:	21c78513          	addi	a0,a5,540 # 8102621c <barrier_bool+0xffffcf58>
-800018f4:	f3dff0ef          	jal	ra,80001830 <print_matrix>
-800018f8:	00000793          	li	a5,0
-800018fc:	00078513          	mv	a0,a5
-80001900:	00c12083          	lw	ra,12(sp)
-80001904:	00812403          	lw	s0,8(sp)
-80001908:	01010113          	addi	sp,sp,16
-8000190c:	00008067          	ret
+800018cc <main>:
+800018cc:	ff010113          	addi	sp,sp,-16
+800018d0:	00112623          	sw	ra,12(sp)
+800018d4:	00812423          	sw	s0,8(sp)
+800018d8:	01010413          	addi	s0,sp,16
+800018dc:	ed5ff0ef          	jal	ra,800017b0 <initialize_mats>
+800018e0:	810267b7          	lui	a5,0x81026
+800018e4:	21c78513          	addi	a0,a5,540 # 8102621c <barrier_bool+0xffffcf58>
+800018e8:	f3dff0ef          	jal	ra,80001824 <print_matrix>
+800018ec:	00000793          	li	a5,0
+800018f0:	00078513          	mv	a0,a5
+800018f4:	00c12083          	lw	ra,12(sp)
+800018f8:	00812403          	lw	s0,8(sp)
+800018fc:	01010113          	addi	sp,sp,16
+80001900:	00008067          	ret
 
 Disassembly of section .rodata:
 
@@ -1733,7 +1730,7 @@ Disassembly of section .rodata:
 8100002a:	0000                	unimp
 8100002c:	0062                	c.slli	zero,0x18
 8100002e:	0000                	unimp
-81000030:	00000063          	beqz	zero,81000030 <main+0xffe758>
+81000030:	00000063          	beqz	zero,81000030 <main+0xffe764>
 81000034:	0064                	addi	s1,sp,12
 81000036:	0000                	unimp
 81000038:	0065                	c.nop	25
@@ -1770,7 +1767,7 @@ Disassembly of section .rodata:
 8100007e:	0000                	unimp
 81000080:	0062                	c.slli	zero,0x18
 81000082:	0000                	unimp
-81000084:	00000063          	beqz	zero,81000084 <main+0xffe7ac>
+81000084:	00000063          	beqz	zero,81000084 <main+0xffe7b8>
 81000088:	0064                	addi	s1,sp,12
 8100008a:	0000                	unimp
 8100008c:	0065                	c.nop	25
@@ -1801,7 +1798,7 @@ Disassembly of section .rodata:
 810000c2:	0000                	unimp
 810000c4:	0062                	c.slli	zero,0x18
 810000c6:	0000                	unimp
-810000c8:	00000063          	beqz	zero,810000c8 <main+0xffe7f0>
+810000c8:	00000063          	beqz	zero,810000c8 <main+0xffe7fc>
 810000cc:	0064                	addi	s1,sp,12
 810000ce:	0000                	unimp
 810000d0:	0065                	c.nop	25
@@ -1830,7 +1827,7 @@ Disassembly of section .rodata:
 81000102:	0000                	unimp
 81000104:	0062                	c.slli	zero,0x18
 81000106:	0000                	unimp
-81000108:	00000063          	beqz	zero,81000108 <main+0xffe830>
+81000108:	00000063          	beqz	zero,81000108 <main+0xffe83c>
 8100010c:	0064                	addi	s1,sp,12
 8100010e:	0000                	unimp
 81000110:	0065                	c.nop	25
diff --git a/kernel/vortex_test.elf b/kernel/vortex_test.elf
index ad965d57dee6f4284f78796ccf83cf8fe18770fc..9cea343c44ac1c6b88e1e22c0138137711c1b1c3 100755
GIT binary patch
delta 1040
zcmZvZOGuPa6vxkZ=P8Z(Br|Ou%>x&PGmN7XMyV8zV&Q{8LQIKr7E%*Pfk9p^)P<CB
zC0ay5ZE6$6XDIGM!4^X%6$lB15EK+mC{du*|FbLKUG#0v_dDnO&+ASOOb$#Ov000W
ztWO)Ka|)|t^rygP3kzF{{QI7fC3KX8H+Pl|2gFM5bv9h0_vM{)ve5@(rPvLlZxr8R
zKF8wK;I-eDpmp<G=EmlEA~xO2hQ!E1>2wkCf)R(VmzHR(VO6}^dy<W=if+G89CLs4
zIesa^*Z&i?dkmpVq`VNiwuE235c(D2BU9Mm-tM^O^Jr`|hK?ceGMFtI{6%abrg!`8
zsMjo#0XK|37I159p-W~3nBx>$)aVtVrL3D1uKQt2T{#h_txux_Y*^toFnoL~Od56K
zr&8gw;95}^9gM8o&8)YE*J1K9__o6Dz*FLT)RVWYc-<P&7vZaXA4#BA8FKQ`u^-+U
z+0o!D;4$2MJ3bCRC?YY>;1hWJrK*(?{mdmEN7PU~hV||uUMu5M;KD580U4izoyZ}c
zl)MO=k{cQN58zMQzl{uD1HVwFvM?H?4Y`bwkc|Pl8Sxd_&<9RhiDx8N7z3hUQt}~i
z+DSYiIbrBAaG4ya1su*N-YK~Yd`Icm$Heif{5&U0%*zs&k<uY9R8>UMN@9}*_uOG#
z<{q*(luZwS(_*RWa9zhvGiwgsQf1#a;2EXrXE0az2RJTTt35p#<!XD-yTfK4p&UG4
zXf9O)o>XRO1ZQ04tDFD_b`yUnH{1^%7faQ(_MXNw7wa#HqWF-#J{oRn?iF|AE%vs^
TK=^c2UyrAmX4Rk9v}=C>aFo#_

delta 972
zcmYk3PiPZS5XNU;nlz!tZqjH>tocK0?4i=cv`HjI6Nsd(e`sp;6s%&A9EzaHsTQ-I
z0#a0XK|B-{DcF-BD+uDDwuKxNOrb(RL7{@E2OBKnp`hP}g?)Q?!*9NC=FQHl&Q@pd
zWz4dNNPa&0vNO<SR;VbOS(iD5xQ7+xRI@0{;dt|3`IlVp;4b+UTj}9-`3_t0suvws
ztt`99>mDD1y5+ggq#Cbu`=y%tw0pnA+Bf;a!4Us(V31`u)qu|;K|kcz^sHag?JfOw
z0J>dW4z%=IP}9HRWZ4+>C{OmdStZ5;z96@Sy!>v@Th@M>=X-q!>Rhi+VwEWv$5?Gj
zGpV-FPur8QDV-ovsP#!Sf;cSj1b9;5JUAur74RvZj+P_TZglyeWd&}47X|(ZUgpiH
z-|<z*`Xr*iJUI9{GHD^D4<08;R6=%5zft3x;Hulu=fNX9GUPA6Mz*9^<rq<$gOmhR
zt?C(K|6Wp3y8Z$ju#wWM>#K+houm|WevdeZDPV8ae*tex2LA?c2veCDmC0%~40a4K
z!$|q0Hwc1DZKQ1JJfIB-y`b|ka0B()184(}X!RJlPakL;JnSSTuk!`)lD<66Kg0N$
znA71x3v8>^;sz|!{90@v(h!VeChW7r*vuoitb%?N+~Di6<LT+$hHDjByoiF<t==2p
zHKFP|cwXQ?;0({j{g-xxt$A_xwAolfKe+BPekuumENp!gytB)Am2=?mK2nzSDGq}l
u@b!4g63&dCpU81{;+AFXL}Vy?gg;D-TTaegFXS$(+lhBflGQiKv(kTKOs<gt

diff --git a/kernel/vortex_test.hex b/kernel/vortex_test.hex
index fb230ca2..15aad4bd 100644
--- a/kernel/vortex_test.hex
+++ b/kernel/vortex_test.hex
@@ -1,405 +1,405 @@
 :0200000480007A
-:1000000013058000731005021305400073101502DC
-:10001000731040F17310103037F1FF7FEF10D00BE9
-:10002000130500006B000500938B0600130D0700FD
-:10003000130F01009303050013051000635C7500A6
-:1000400013010180130305006B5003001305150015
-:100050006FF0DFFE1300000013000000130000002B
-:1000600013000000130000001300000013010F0034
-:1000700013050000930F0600938D0300130000008A
+:10000000373500FF13050530930570002322B50036
+:1000100003264500130500006B000500938B0600C6
+:10002000130D0700130F01009303050013051000C3
+:10003000635C750013010180130305006B5003001E
+:10004000130515006FF0DFFE130000001300000021
+:100050001300000013000000130000001300000054
+:1000600013010F0013050000930F0600938D03008A
+:100070001300000013000000130000001300000034
 :100080001300000013000000130000001300000024
-:10009000130000001300000013000000EBE0BF019C
-:1000A0001300000013000000130000001300000004
-:1000B0001300000013000000170500001305451B86
-:1000C0006B40050017030000130343F66B000300A9
-:1000D00067800000170200011302C22323200200E0
-:1000E0002322120023242200232632002328420048
-:1000F000232A5200232C6200232E72002320820226
-:10010000232292022324A2022326B2022328C2021F
-:10011000232AD202232CE202232EF20223200205FC
-:1001200023221205232422052326320523284205F3
-:10013000232A5205232C6205232E720523208207D1
-:10014000232292072324A2072326B2072328C207CB
-:10015000232AD207232CE207232EF20713021000D2
-:1001600067800000170200011302C21A0320020078
-:1001700083204200032182008321C2000322020166
-:1001800083224201032382018323C201032402024A
-:1001900083244202032582028325C202032602032E
-:1001A00083264203032782038327C2030328020412
-:1001B00083284204032982048329C204032A0205F6
-:1001C000832A4205032B8205832BC205032C0206DA
-:1001D000832C4206032D8206832DC206032E0207BE
-:1001E000832E4207032F8207832FC20713020000CA
-:1001F00067800000732500026780000073251002ED
-:1002000067800000130101FE232E1100232C8100C2
-:1002100013040102232604FE6F0040030327C4FEDB
-:10022000B7170000938747973307F702B707008196
-:1002300093870741B307F70013850700EF000044D9
-:100240008327C4FE938717002326F4FE0327C4FEEA
-:100250009307F001E3D4E7FC130000008320C10101
-:10026000032481011301010267800000130101FDD5
-:1002700023261102232481022322A1031304010354
-:100280001300000013070D00B7170000938747976E
-:100290003307F702B707008193870741B307F700D9
-:1002A00013850700EF00405093070500638A07029B
-:1002B00013070D00B70700811317270093878726C0
-:1002C000B307F7001307100023A0E70093070D0002
-:1002D00063960700EFF01FE96F00C0057300000090
-:1002E00013070D00B7170000938747973307F702EE
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diff --git a/kernel/vx_os/vx_back/vx_back.s b/kernel/vx_os/vx_back/vx_back.s
index 48656abf..3abcba0e 100644
--- a/kernel/vx_os/vx_back/vx_back.s
+++ b/kernel/vx_os/vx_back/vx_back.s
@@ -6,6 +6,12 @@
 .type _start, @function
 .global _start
 _start:
+      la a0, 0xFF003300
+      li a1, 7
+      sw a1, 4(a0)
+      lw a2, 4(a0)
+      li a0, 0
+      .word 0x0005006b    # tmc a0
 #     li a0, 4
 #     la a1, SPAWN
 #     .word 0x00b5106b # wspawn a0(numWarps), a1(PC SPAWN)
@@ -40,17 +46,17 @@ _start:
 #     .word 0x0000306b    #join
 #     ecall
     ############################
-    li a0, 8          # Num Warps
-    csrw 0x20, a0     # Setting the number of available warps 
-    li a0, 4          # Num Threads
-    csrw 0x21, a0     # Setting the number of available threads
-    csrw mhartid,zero
-    csrw misa,zero
-    lui  sp, 0x7ffff
-    # jal  vx_before_main
-    jal  main
-    li a0, 0
-    .word 0x0005006b    # tmc a0
+    # li a0, 8          # Num Warps
+    # csrw 0x20, a0     # Setting the number of available warps 
+    # li a0, 4          # Num Threads
+    # csrw 0x21, a0     # Setting the number of available threads
+    # csrw mhartid,zero
+    # csrw misa,zero
+    # lui  sp, 0x7ffff
+    # # jal  vx_before_main
+    # jal  main
+    # li a0, 0
+    # .word 0x0005006b    # tmc a0
 
 # Hi:
 #     li a2, 7
diff --git a/models/memory/cln28hpc/rf2_32x128_wm1/rf2_32x128_wm1.v b/models/memory/cln28hpc/rf2_32x128_wm1/rf2_32x128_wm1.v
index 7cce22f4..6c1f81a0 100644
--- a/models/memory/cln28hpc/rf2_32x128_wm1/rf2_32x128_wm1.v
+++ b/models/memory/cln28hpc/rf2_32x128_wm1/rf2_32x128_wm1.v
@@ -1135,7 +1135,7 @@ module rf2_32x128_wm1 (CENYA, AYA, CENYB, WENYB, AYB, QA, SOA, SOB, CLKA, CENA,
     $display("Warning: Set Value for EMAA doesn't match Default value 3 in %m at %0t", $time);
   end
   always @ (EMASA_) begin
-    if(EMASA_ < 0) 
+    if($signed(EMASA_) < 0) 
     $display("Warning: Set Value for EMASA doesn't match Default value 0 in %m at %0t", $time);
   end
   always @ (EMAB_) begin
@@ -3622,7 +3622,7 @@ module rf2_32x128_wm1 (CENYA, AYA, CENYB, WENYB, AYB, QA, SOA, SOB, CLKA, CENA,
     $display("Warning: Set Value for EMAA doesn't match Default value 3 in %m at %0t", $time);
   end
   always @ (EMASA_) begin
-    if(EMASA_ < 0) 
+    if($signed(EMASA_) < 0) 
     $display("Warning: Set Value for EMASA doesn't match Default value 0 in %m at %0t", $time);
   end
   always @ (EMAB_) begin
diff --git a/models/memory/cln28hpm/rf2_128x128_wm1/rf2_128x128_wm1.v b/models/memory/cln28hpm/rf2_128x128_wm1/rf2_128x128_wm1.v
index be19ca41..c2ec3c53 100644
--- a/models/memory/cln28hpm/rf2_128x128_wm1/rf2_128x128_wm1.v
+++ b/models/memory/cln28hpm/rf2_128x128_wm1/rf2_128x128_wm1.v
@@ -1273,7 +1273,7 @@ task dumpmem;
 	reg [BITS-1:0] wordtemp;
 	reg [6:0] Atemp;
   begin
-	dump_file_desc = $fopen(filename_dump);
+	dump_file_desc = $fopen(filename_dump, "w");
      if (CENA_ === 1'b1 && CENB_ === 1'b1) begin
 	  for (i=0;i<WORDS;i=i+1) begin
 	  Atemp = i;
@@ -3768,7 +3768,7 @@ task dumpmem;
 	reg [BITS-1:0] wordtemp;
 	reg [6:0] Atemp;
   begin
-	dump_file_desc = $fopen(filename_dump);
+	dump_file_desc = $fopen(filename_dump, "w");
      if (CENA_ === 1'b1 && CENB_ === 1'b1) begin
 	  for (i=0;i<WORDS;i=i+1) begin
 	  Atemp = i;
@@ -16511,7 +16511,7 @@ task dumpmem;
 	reg [BITS-1:0] wordtemp;
 	reg [6:0] Atemp;
   begin
-	dump_file_desc = $fopen(filename_dump);
+	dump_file_desc = $fopen(filename_dump, "w");
      if (CENA_ === 1'b1 && CENB_ === 1'b1) begin
 	  for (i=0;i<WORDS;i=i+1) begin
 	  Atemp = i;
@@ -18755,7 +18755,7 @@ task dumpmem;
 	reg [BITS-1:0] wordtemp;
 	reg [6:0] Atemp;
   begin
-	dump_file_desc = $fopen(filename_dump);
+	dump_file_desc = $fopen(filename_dump, "w");
      if (CENA_ === 1'b1 && CENB_ === 1'b1) begin
 	  for (i=0;i<WORDS;i=i+1) begin
 	  Atemp = i;
diff --git a/models/memory/cln28hpm/rf2_256x128_wm1/rf2_256x128_wm1.v b/models/memory/cln28hpm/rf2_256x128_wm1/rf2_256x128_wm1.v
index 7ed1029c..615e23d8 100644
--- a/models/memory/cln28hpm/rf2_256x128_wm1/rf2_256x128_wm1.v
+++ b/models/memory/cln28hpm/rf2_256x128_wm1/rf2_256x128_wm1.v
@@ -1279,7 +1279,7 @@ task dumpmem;
 	reg [BITS-1:0] wordtemp;
 	reg [7:0] Atemp;
   begin
-	dump_file_desc = $fopen(filename_dump);
+	dump_file_desc = $fopen(filename_dump, "w");
      if (CENA_ === 1'b1 && CENB_ === 1'b1) begin
 	  for (i=0;i<WORDS;i=i+1) begin
 	  Atemp = i;
@@ -3780,7 +3780,7 @@ task dumpmem;
 	reg [BITS-1:0] wordtemp;
 	reg [7:0] Atemp;
   begin
-	dump_file_desc = $fopen(filename_dump);
+	dump_file_desc = $fopen(filename_dump, "w");
      if (CENA_ === 1'b1 && CENB_ === 1'b1) begin
 	  for (i=0;i<WORDS;i=i+1) begin
 	  Atemp = i;
@@ -16581,7 +16581,7 @@ task dumpmem;
 	reg [BITS-1:0] wordtemp;
 	reg [7:0] Atemp;
   begin
-	dump_file_desc = $fopen(filename_dump);
+	dump_file_desc = $fopen(filename_dump, "w");
      if (CENA_ === 1'b1 && CENB_ === 1'b1) begin
 	  for (i=0;i<WORDS;i=i+1) begin
 	  Atemp = i;
@@ -18831,7 +18831,7 @@ task dumpmem;
 	reg [BITS-1:0] wordtemp;
 	reg [7:0] Atemp;
   begin
-	dump_file_desc = $fopen(filename_dump);
+	dump_file_desc = $fopen(filename_dump, "w");
      if (CENA_ === 1'b1 && CENB_ === 1'b1) begin
 	  for (i=0;i<WORDS;i=i+1) begin
 	  Atemp = i;
diff --git a/models/memory/cln28hpm/rf2_256x19_wm0/rf2_256x19_wm0.v b/models/memory/cln28hpm/rf2_256x19_wm0/rf2_256x19_wm0.v
index 5b1f2797..f35efc03 100644
--- a/models/memory/cln28hpm/rf2_256x19_wm0/rf2_256x19_wm0.v
+++ b/models/memory/cln28hpm/rf2_256x19_wm0/rf2_256x19_wm0.v
@@ -502,7 +502,7 @@ task dumpmem;
 	reg [BITS-1:0] wordtemp;
 	reg [7:0] Atemp;
   begin
-	dump_file_desc = $fopen(filename_dump);
+	dump_file_desc = $fopen(filename_dump, "w");
      if (CENA_ === 1'b1 && CENB_ === 1'b1) begin
 	  for (i=0;i<WORDS;i=i+1) begin
 	  Atemp = i;
@@ -1668,7 +1668,7 @@ task dumpmem;
 	reg [BITS-1:0] wordtemp;
 	reg [7:0] Atemp;
   begin
-	dump_file_desc = $fopen(filename_dump);
+	dump_file_desc = $fopen(filename_dump, "w");
      if (CENA_ === 1'b1 && CENB_ === 1'b1) begin
 	  for (i=0;i<WORDS;i=i+1) begin
 	  Atemp = i;
@@ -4754,7 +4754,7 @@ task dumpmem;
 	reg [BITS-1:0] wordtemp;
 	reg [7:0] Atemp;
   begin
-	dump_file_desc = $fopen(filename_dump);
+	dump_file_desc = $fopen(filename_dump, "w");
      if (CENA_ === 1'b1 && CENB_ === 1'b1) begin
 	  for (i=0;i<WORDS;i=i+1) begin
 	  Atemp = i;
@@ -5895,7 +5895,7 @@ task dumpmem;
 	reg [BITS-1:0] wordtemp;
 	reg [7:0] Atemp;
   begin
-	dump_file_desc = $fopen(filename_dump);
+	dump_file_desc = $fopen(filename_dump, "w");
      if (CENA_ === 1'b1 && CENB_ === 1'b1) begin
 	  for (i=0;i<WORDS;i=i+1) begin
 	  Atemp = i;
diff --git a/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.v b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.v
index 42d98a78..4cd3879c 100644
--- a/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.v
+++ b/models/memory/cln28hpm/rf2_32x128_wm1/rf2_32x128_wm1.v
@@ -1261,7 +1261,7 @@ task dumpmem;
 	reg [BITS-1:0] wordtemp;
 	reg [4:0] Atemp;
   begin
-	dump_file_desc = $fopen(filename_dump);
+	dump_file_desc = $fopen(filename_dump, "w");
      if (CENA_ === 1'b1 && CENB_ === 1'b1) begin
 	  for (i=0;i<WORDS;i=i+1) begin
 	  Atemp = i;
@@ -3743,7 +3743,7 @@ task dumpmem;
 	reg [BITS-1:0] wordtemp;
 	reg [4:0] Atemp;
   begin
-	dump_file_desc = $fopen(filename_dump);
+	dump_file_desc = $fopen(filename_dump, "w");
      if (CENA_ === 1'b1 && CENB_ === 1'b1) begin
 	  for (i=0;i<WORDS;i=i+1) begin
 	  Atemp = i;
@@ -16370,7 +16370,7 @@ task dumpmem;
 	reg [BITS-1:0] wordtemp;
 	reg [4:0] Atemp;
   begin
-	dump_file_desc = $fopen(filename_dump);
+	dump_file_desc = $fopen(filename_dump, "w");
      if (CENA_ === 1'b1 && CENB_ === 1'b1) begin
 	  for (i=0;i<WORDS;i=i+1) begin
 	  Atemp = i;
@@ -18601,7 +18601,7 @@ task dumpmem;
 	reg [BITS-1:0] wordtemp;
 	reg [4:0] Atemp;
   begin
-	dump_file_desc = $fopen(filename_dump);
+	dump_file_desc = $fopen(filename_dump, "w");
      if (CENA_ === 1'b1 && CENB_ === 1'b1) begin
 	  for (i=0;i<WORDS;i=i+1) begin
 	  Atemp = i;
diff --git a/rtl/Makefile b/rtl/Makefile
index af234332..88a4265e 100644
--- a/rtl/Makefile
+++ b/rtl/Makefile
@@ -1,6 +1,9 @@
 all: RUNFILE
 
-INCLUDE=-I. -I../models/memory/cln28hpc/rf2_32x128_wm1/ -I/usr/local/systemc/ -Iinterfaces/ -Ipipe_regs/ -Isimulate
+# /rf2_256x128_wm1/
+BaseMEM=../models/memory/cln28hpm
+
+INCLUDE=-I. -Ishared_memory -I$(BaseMEM)/rf2_128x128_wm1/ -I$(BaseMEM)/rf2_256x128_wm1/ -I$(BaseMEM)/rf2_256x19_wm1/ -I$(BaseMEM)/rf2_32x128_wm1/ -Iinterfaces/ -Ipipe_regs/ -Isimulate
 
 FILE=Vortex.v
 
@@ -8,7 +11,7 @@ EXE=--exe ./simulate/test_bench.cpp
 
 COMP=--compiler gcc
 
-WNO=-Wno-UNOPTFLAT -Wno-UNDRIVEN --Wno-PINMISSING -Wno-STMTDLY -Wno-WIDTH
+WNO=-Wno-UNOPTFLAT -Wno-UNDRIVEN --Wno-PINMISSING -Wno-STMTDLY -Wno-WIDTH -Wno-UNSIGNED
 
 LIGHTW=-Wno-UNOPTFLAT --Wno-PINMISSING -Wno-WIDTH -Wno-STMTDLY
 # LIB=-LDFLAGS '-L/usr/local/systemc/'
diff --git a/rtl/VX_dmem_controller.v b/rtl/VX_dmem_controller.v
new file mode 100644
index 00000000..994abb91
--- /dev/null
+++ b/rtl/VX_dmem_controller.v
@@ -0,0 +1,51 @@
+
+`include "VX_define.v"
+
+module VX_dmem_controller (
+	input wire               clk,
+
+	// MEM-Processor
+	VX_dcache_request_inter  VX_dcache_req,
+	VX_dcache_response_inter VX_dcache_rsp
+);
+
+
+	wire to_shm = VX_dcache_req.out_cache_driver_in_address[0][31:24] == 8'hFF;
+
+	wire[`NT_M1:0]       sm_driver_in_valid     = VX_dcache_req.out_cache_driver_in_valid & {`NT{to_shm}};
+	wire[`NT_M1:0]       cache_driver_in_valid  = VX_dcache_req.out_cache_driver_in_valid & {`NT{~to_shm}};
+
+
+
+
+	wire[`NT_M1:0][31:0] cache_driver_in_address   = VX_dcache_req.out_cache_driver_in_address;
+	wire[2:0]            cache_driver_in_mem_read  = VX_dcache_req.out_cache_driver_in_mem_read;
+	wire[2:0]            cache_driver_in_mem_write = VX_dcache_req.out_cache_driver_in_mem_write;
+	wire[`NT_M1:0][31:0] cache_driver_in_data      = VX_dcache_req.out_cache_driver_in_data;
+
+
+	wire[`NT_M1:0][31:0] cache_driver_out_data;
+	wire[`NT_M1:0]       cache_driver_out_valid; // Not used for now
+	wire                 delay;
+
+
+	VX_shared_memory #(.NB(7), .BITS_PER_BANK(3)) shared_memory (
+		.clk       (clk),
+		.in_valid  (sm_driver_in_valid),
+		.in_address(cache_driver_in_address),
+		.in_data   (cache_driver_in_data),
+		.mem_read  (cache_driver_in_mem_read),
+		.mem_write (cache_driver_in_mem_write),
+		.out_valid (cache_driver_out_valid),
+		.out_data  (cache_driver_out_data),
+		.stall     (delay)
+		);
+
+
+
+
+	assign VX_dcache_rsp.in_cache_driver_out_data = cache_driver_out_data;
+	assign VX_dcache_rsp.delay                    = delay;
+
+
+endmodule
\ No newline at end of file
diff --git a/rtl/VX_gpr.v b/rtl/VX_gpr.v
index 309e50f1..c3ac3e84 100644
--- a/rtl/VX_gpr.v
+++ b/rtl/VX_gpr.v
@@ -82,45 +82,6 @@ module VX_gpr (
  //         .SEB(1'b0),
  //         .COLLDISN(1'b1)
  //   );
- //   /* verilator lint_on PINCONNECTEMPTY */
-	// wire[127:0] write_bit_mask = {{32{~(VX_writeback_inter.wb_valid[3])}}, {32{~(VX_writeback_inter.wb_valid[2])}}, {32{~(VX_writeback_inter.wb_valid[1])}}, {32{~(VX_writeback_inter.wb_valid[0])}}};
-	// /* verilator lint_off PINCONNECTEMPTY */
- //   rf2_32x128_wm1 first_ram (
- //         .CENYA(),
- //         .AYA(),
- //         .CENYB(),
- //         .WENYB(),
- //         .AYB(),
- //         .QA(out_a_reg_data),
- //         .SOA(),
- //         .SOB(),
- //         .CLKA(clk),
- //         .CENA(cena_1),
- //         .AA(VX_gpr_read.rs1),
- //         .CLKB(clk),
- //         .CENB(cenb),
- //         .WENB(write_bit_mask),
- //         .AB(VX_writeback_inter.rd),
- //         .DB(VX_writeback_inter.write_data),
- //         .EMAA(3'b011),
- //         .EMASA(1'b0),
- //         .EMAB(3'b011),
- //         .TENA(1'b1),
- //         .TCENA(1'b0),
- //         .TAA(5'b0),
- //         .TENB(1'b1),
- //         .TCENB(1'b0),
- //         .TWENB(128'b0),
- //         .TAB(5'b0),
- //         .TDB(128'b0),
- //         .RET1N(1'b1),
- //         .SIA(2'b0),
- //         .SEA(1'b0),
- //         .DFTRAMBYP(1'b0),
- //         .SIB(2'b0),
- //         .SEB(1'b0),
- //         .COLLDISN(1'b1)
- //   );
  //   /* verilator lint_on PINCONNECTEMPTY */
 
  //   /* verilator lint_off PINCONNECTEMPTY */
diff --git a/rtl/VX_lsu.v b/rtl/VX_lsu.v
index fdd1afb5..ca28eaed 100644
--- a/rtl/VX_lsu.v
+++ b/rtl/VX_lsu.v
@@ -16,7 +16,7 @@ module VX_lsu (
 
 	// VX_inst_mem_wb_inter VX_mem_wb_temp();
 
-	assign out_delay = 1'b0;
+	assign out_delay = VX_dcache_rsp.delay;
 
 
 	// Generate Addresses
diff --git a/rtl/Vortex.v b/rtl/Vortex.v
index 07d2b14b..88152d8e 100644
--- a/rtl/Vortex.v
+++ b/rtl/Vortex.v
@@ -15,19 +15,25 @@ module Vortex(
 	output wire           out_ebreak
 	);
 
+// assign out_cache_driver_in_address   = 0;
+assign out_cache_driver_in_mem_read  = `NO_MEM_READ;
+assign out_cache_driver_in_mem_write = `NO_MEM_WRITE;
+// assign out_cache_driver_in_valid     = 0;
+// assign out_cache_driver_in_data      = 0;
+
+// assign out_cache_driver_in_address   = VX_dcache_req.out_cache_driver_in_address;
+// assign out_cache_driver_in_mem_read  = VX_dcache_req.out_cache_driver_in_mem_read;
+// assign out_cache_driver_in_mem_write = VX_dcache_req.out_cache_driver_in_mem_write;
+// assign out_cache_driver_in_valid     = VX_dcache_req.out_cache_driver_in_valid;
+// assign out_cache_driver_in_data      = VX_dcache_req.out_cache_driver_in_data;
+
+// assign VX_dcache_rsp.in_cache_driver_out_data = in_cache_driver_out_data;
+
+
 // Dcache Interface
 
 VX_dcache_response_inter VX_dcache_rsp();
-VX_dcache_request_inter VX_dcache_req();
-
-assign out_cache_driver_in_address   = VX_dcache_req.out_cache_driver_in_address;
-assign out_cache_driver_in_mem_read  = VX_dcache_req.out_cache_driver_in_mem_read;
-assign out_cache_driver_in_mem_write = VX_dcache_req.out_cache_driver_in_mem_write;
-assign out_cache_driver_in_valid     = VX_dcache_req.out_cache_driver_in_valid;
-assign out_cache_driver_in_data      = VX_dcache_req.out_cache_driver_in_data;
-
-assign VX_dcache_rsp.in_cache_driver_out_data = in_cache_driver_out_data;
-
+VX_dcache_request_inter  VX_dcache_req();
 
 // Icache Interface
 
@@ -100,6 +106,12 @@ VX_back_end vx_back_end(
 	.gpr_stage_delay     (gpr_stage_delay)
 	);
 
+
+VX_dmem_controller VX_dmem_controller(
+	.clk          (clk),
+	.VX_dcache_req(VX_dcache_req),
+	.VX_dcache_rsp(VX_dcache_rsp)
+	);
 // VX_csr_handler vx_csr_handler(
 // 		.clk                  (clk),
 // 		.in_decode_csr_address(decode_csr_address),
diff --git a/rtl/interfaces/VX_dcache_request_inter.v b/rtl/interfaces/VX_dcache_request_inter.v
index f8f95976..ac841a76 100644
--- a/rtl/interfaces/VX_dcache_request_inter.v
+++ b/rtl/interfaces/VX_dcache_request_inter.v
@@ -7,11 +7,11 @@
 
 interface VX_dcache_request_inter ();
 
-		wire[31:0] out_cache_driver_in_address[`NT_M1:0];
-		wire[2:0]  out_cache_driver_in_mem_read;
-		wire[2:0]  out_cache_driver_in_mem_write;
-		wire       out_cache_driver_in_valid[`NT_M1:0];
-		wire[31:0] out_cache_driver_in_data[`NT_M1:0];
+		wire[`NT_M1:0][31:0] out_cache_driver_in_address;
+		wire[2:0]            out_cache_driver_in_mem_read;
+		wire[2:0]            out_cache_driver_in_mem_write;
+		wire[`NT_M1:0]       out_cache_driver_in_valid;
+		wire[`NT_M1:0][31:0] out_cache_driver_in_data;
 
 endinterface
 
diff --git a/rtl/interfaces/VX_dcache_response_inter.v b/rtl/interfaces/VX_dcache_response_inter.v
index 682889a9..98ed58a3 100644
--- a/rtl/interfaces/VX_dcache_response_inter.v
+++ b/rtl/interfaces/VX_dcache_response_inter.v
@@ -7,7 +7,8 @@
 
 interface VX_dcache_response_inter ();
 
-		wire[31:0]  in_cache_driver_out_data[`NT_M1:0];
+		wire[`NT_M1:0][31:0] in_cache_driver_out_data;
+		wire                 delay;
 
 endinterface
 
diff --git a/rtl/results.txt b/rtl/results.txt
index 57d04687..5663d7cd 100644
--- a/rtl/results.txt
+++ b/rtl/results.txt
@@ -1,7 +1,7 @@
-# Dynamic Instructions: 52686
-# of total cycles:      52701
+# Dynamic Instructions: 14
+# of total cycles:      26
 # of forwarding stalls: 0
 # of branch stalls:     0
-# CPI:                  1.00028
-# time to simulate:     0 milliseconds
+# CPI:                  1.85714
+# time to simulate:     6.95313e-310 milliseconds
 # GRADE:                Failed on test: 4294967295
diff --git a/rtl/shared_memory/VX_bank_valids.v b/rtl/shared_memory/VX_bank_valids.v
new file mode 100644
index 00000000..3b1e63ab
--- /dev/null
+++ b/rtl/shared_memory/VX_bank_valids.v
@@ -0,0 +1,36 @@
+`include "../VX_define.v"
+
+// Converts in_valids to bank_valids
+module VX_bank_valids
+	#(
+		parameter NB            = 4,
+		parameter BITS_PER_BANK = 3
+	)
+	(
+	input wire[`NT_M1:0] in_valids,
+	input wire[`NT_M1:0][31:0] in_addr,
+	output reg[NB:0][`NT_M1:0] bank_valids
+	);
+
+	
+	integer i, j;
+	always@(*) begin
+		for(j = 0; j <= NB; j = j+1 ) begin
+			for(i = 0; i <= `NT_M1; i = i+1) begin
+				if(in_valids[i]) begin
+					if(in_addr[i][(2+BITS_PER_BANK-1):2] == j[BITS_PER_BANK-1:0]) begin
+						bank_valids[j][i] = 1'b1;
+					end
+					else begin
+						bank_valids[j][i] = 1'b0;
+					end
+
+				end
+				else begin
+					bank_valids[j][i] = 1'b0;
+				end
+			end
+		end
+	end
+
+endmodule
\ No newline at end of file
diff --git a/rtl/shared_memory/VX_priority_encoder_sm.v b/rtl/shared_memory/VX_priority_encoder_sm.v
new file mode 100644
index 00000000..b9fc9f67
--- /dev/null
+++ b/rtl/shared_memory/VX_priority_encoder_sm.v
@@ -0,0 +1,88 @@
+`include "../VX_define.v"
+
+module VX_priority_encoder_sm
+	#(
+		parameter NB            = 4,
+		parameter BITS_PER_BANK = 3
+	)
+	(
+	//INPUTS
+	input wire				clk,
+	//input wire				reset,
+	input wire[`NT_M1:0]			in_valid,
+	input wire[`NT_M1:0][31:0] 		in_address,
+	input wire[`NT_M1:0][31:0] 		in_data,
+	// OUTPUTS
+	// To SM Module
+	output reg[NB:0]         	    out_valid,
+	output reg[NB:0][31:0]  	    out_address,
+	output reg[NB:0][31:0] 		out_data,
+
+	// To Processor
+	output wire[NB:0][1:0]		    req_num,
+	output reg 			            stall,
+	output wire                      send_data // Finished all of the requests
+);
+
+wire[NB:0][`NT_M1:0] bank_valids;
+wire[NB:0][`NT_M1:0] temp_bank_valids;
+reg[NB:0][`NT_M1:0] temp_valid; // State - If there's any ones here, then stall
+wire[NB:0] temp_stall;
+integer counter[NB:0] ;
+wire[NB:0][`NT_M1:0] mask;
+wire[NB:0] update_temp_valid; 
+reg[NB:0] req_done;
+
+VX_bank_valids #(.NB(NB), .BITS_PER_BANK(BITS_PER_BANK)) vx_bank_valid(
+	.in_valids(in_valid),
+	.in_addr(in_address),
+	.bank_valids(bank_valids)
+	);
+
+genvar j;
+for(j=0; j <= NB; j++) begin
+	assign temp_stall[j] = ($countones(temp_valid[j]) != 0);
+	assign temp_bank_valids[j] = (temp_stall[j] || req_done[j]) ? temp_valid[j] : bank_valids[j];
+	assign update_temp_valid[j]  = !req_done[j] && ($countones(bank_valids[j]) > 1);
+
+	VX_generic_priority_encoder #(.N(4)) vx_priority_encoder(
+	    .valids(temp_bank_valids[j]),
+	    .index(req_num[j]),
+	    .found(out_valid[j])
+	  );
+
+	VX_set_bit vx_set_bit(
+		.index(req_num[j]),
+		.mask (mask[j])
+	);
+
+	assign out_address[j] = out_valid[j] ? in_address[req_num[j]] : 0;
+	assign out_data[j]    = out_valid[j] ? in_data[req_num[j]] : 0;
+end
+
+
+assign stall = |temp_stall;
+assign send_data = &req_done;
+
+genvar i;
+always @(posedge clk) begin
+	for(i = 0; i <= NB; i = i+1) begin
+		if (update_temp_valid[i]) begin
+			counter[i] <= counter[i] + 1;
+			if(counter[i] == 0) temp_valid[i] <= bank_valids[i] & mask[i];
+			else if (counter[i] > 0) temp_valid[i] <= temp_bank_valids[i] & mask[i];
+		end 
+		if(($countones(in_valid) > 0) && ($countones(bank_valids[i]) == 0)) begin
+			req_done[i] <= 1;
+		end
+		else if((counter[i][2:0] == ($countones(bank_valids[i])-1))) begin 
+			req_done[i] <= 1;
+			counter[i] <= 0;
+		end
+		else begin
+			req_done[i] <= 0;
+		end
+	end
+end
+
+endmodule
\ No newline at end of file
diff --git a/rtl/shared_memory/VX_set_bit.v b/rtl/shared_memory/VX_set_bit.v
new file mode 100644
index 00000000..fb07262c
--- /dev/null
+++ b/rtl/shared_memory/VX_set_bit.v
@@ -0,0 +1,21 @@
+`include "../VX_define.v"
+
+module VX_set_bit (
+	input  wire[1:0] index,
+	output reg[`NT_M1:0] mask
+);
+
+
+integer some_index;
+always @(*) begin
+	for (some_index = 0; some_index <= `NT_M1; some_index = some_index + 1) begin
+		if (some_index[1:0] == index) begin
+			assign mask[some_index] = 0;
+		end
+		else begin
+			assign mask[some_index] = 1;
+		end
+	end
+end
+
+endmodule
\ No newline at end of file
diff --git a/rtl/shared_memory/VX_shared_memory.v b/rtl/shared_memory/VX_shared_memory.v
new file mode 100644
index 00000000..6f7f447e
--- /dev/null
+++ b/rtl/shared_memory/VX_shared_memory.v
@@ -0,0 +1,135 @@
+`include "../VX_define.v"
+
+module VX_shared_memory
+	#(
+		parameter NB            = 4,
+		parameter BITS_PER_BANK = 3
+	)
+	(
+	//INPUTS
+	input wire clk,
+	input wire[`NT_M1:0] in_valid,
+	input wire[`NT_M1:0][31:0] in_address,
+	input wire[`NT_M1:0][31:0] in_data,
+	input wire[2:0] mem_read,
+	input wire[2:0] mem_write,
+	//OUTPUTS
+	output wire[`NT_M1:0] out_valid,
+	output wire[`NT_M1:0][31:0] out_data,
+	output wire stall
+	);
+
+reg[NB:0][31:0] temp_address;
+reg[NB:0][31:0] temp_in_data;
+reg[NB:0] temp_in_valid;
+
+reg[`NT_M1:0] temp_out_valid;
+reg[`NT_M1:0][31:0] temp_out_data;
+
+reg [NB:0][6:0] block_addr;
+reg [NB:0][3:0][31:0] block_wdata;
+reg [NB:0][3:0][31:0] block_rdata;
+reg [NB:0][1:0] block_we;
+
+wire send_data;
+
+reg[NB:0][1:0] req_num;
+reg shm_write;
+
+wire [`NT_M1:0] orig_in_valid;
+
+
+genvar i;
+for(i = 0; i <= `NT_M1; i = i+1) begin
+	assign orig_in_valid[i] = in_valid[i];
+end
+
+assign out_valid  = send_data ? temp_out_valid : 0;
+assign out_data   = send_data ? temp_out_data : 0;
+
+
+VX_priority_encoder_sm #(.NB(NB), .BITS_PER_BANK(BITS_PER_BANK)) vx_priority_encoder_sm(
+	.clk(clk),
+	//.reset(reset),
+	.in_valid(orig_in_valid),
+	.in_address(in_address),
+	.in_data(in_data),
+
+	.out_valid(temp_in_valid),
+	.out_address(temp_address),
+	.out_data(temp_in_data),
+
+	.req_num(req_num),
+	.stall(stall),
+	.send_data(send_data)
+	);
+
+genvar j;
+generate
+for(j=0; j<= NB; j=j+1) begin
+	VX_shared_memory_block vx_shared_memory_block(
+		.clk(clk),
+		.addr(block_addr[j]),
+		.wdata(block_wdata[j]),
+		.we(block_we[j]),
+		.shm_write(shm_write),
+		.data_out(block_rdata[j])
+	);
+end	
+endgenerate
+
+
+always @(*) begin
+		block_addr = 0;
+		block_we = 0;
+		block_wdata = 0;
+	for(i = 0; i <= NB; i = i+1) begin
+		if(temp_in_valid[i] == 1'b1) begin
+			//1. Check if the request is actually to the shared memory
+			if((temp_address[i][31:24]) == 8'hFF) begin
+			// STORES
+				if(mem_write != `NO_MEM_WRITE) begin 
+					shm_write = 1'b1;
+					if(mem_write == `SB_MEM_WRITE) begin
+						//TODO
+					end
+					else if(mem_write == `SH_MEM_WRITE) begin
+						//TODO
+					end
+					else if(mem_write == `SW_MEM_WRITE) begin
+						block_addr[i] = temp_address[i][13:7];
+						block_we[i] = temp_address[i][6:5];
+						block_wdata[i][temp_address[i][6:5]] = temp_in_data[i];
+					end
+				end
+				//LOADS
+				else if(mem_read != `NO_MEM_READ) begin 
+					shm_write = 1'b0;
+					if(mem_read == `LB_MEM_READ) begin
+						//TODO
+					end
+					else if (mem_read == `LH_MEM_READ)
+					begin
+						//TODO
+					end
+					else if (mem_read == `LW_MEM_READ)
+					begin
+						block_addr[i] = temp_address[i][13:7];
+						temp_out_data[req_num[i]] = block_rdata[i][temp_address[i][6:5]];
+						temp_out_valid[req_num[i]] = 1'b1;
+					end
+					else if (mem_read == `LBU_MEM_READ)
+					begin
+						//TODO
+					end
+					else if (mem_read == `LHU_MEM_READ)
+					begin
+						//TODO
+					end
+				end
+			end
+		end
+	end
+end
+
+endmodule
\ No newline at end of file
diff --git a/rtl/shared_memory/VX_shared_memory_block.v b/rtl/shared_memory/VX_shared_memory_block.v
new file mode 100644
index 00000000..44688b73
--- /dev/null
+++ b/rtl/shared_memory/VX_shared_memory_block.v
@@ -0,0 +1,81 @@
+module VX_shared_memory_block (
+	input clk,    // Clock
+	input wire[6:0]       addr,
+	input wire[3:0][31:0] wdata,
+	input wire[1:0] we,
+	input wire shm_write,
+
+	output wire[3:0][31:0] data_out
+	
+);
+
+	logic [3:0][31:0] shared_memory[127:0];
+
+	//wire need_to_write = (|we);
+
+	always @(posedge clk) begin
+		if(shm_write) begin
+			if (we == 2'b00) shared_memory[addr][0][31:0] <= wdata[0][31:0]; 
+			if (we == 2'b01) shared_memory[addr][1][31:0] <= wdata[1][31:0]; 
+			if (we == 2'b10) shared_memory[addr][2][31:0] <= wdata[2][31:0]; 
+			if (we == 2'b11) shared_memory[addr][3][31:0] <= wdata[3][31:0]; 
+		end
+	end
+
+
+	assign data_out = shm_write ? 0 : shared_memory[addr];
+
+
+
+
+	// wire cena = 1;
+	// wire cenb = shm_write;
+
+	// wire[3:0][31:0] write_bit_mask;
+
+	// assign write_bit_mask[0] = (we == 2'b00) ? 0 : {32{1'b1}};
+	// assign write_bit_mask[1] = (we == 2'b01) ? 0 : {32{1'b1}};
+	// assign write_bit_mask[2] = (we == 2'b10) ? 0 : {32{1'b1}};
+	// assign write_bit_mask[3] = (we == 2'b11) ? 0 : {32{1'b1}};
+
+	// // Using ASIC MEM
+	// /* verilator lint_off PINCONNECTEMPTY */
+ //   rf2_128x128_wm1 first_ram (
+ //         .CENYA(),
+ //         .AYA(),
+ //         .CENYB(),
+ //         .WENYB(),
+ //         .AYB(),
+ //         .QA(data_out),
+ //         .SOA(),
+ //         .SOB(),
+ //         .CLKA(clk),
+ //         .CENA(cena),
+ //         .AA(addr),
+ //         .CLKB(clk),
+ //         .CENB(cenb),
+ //         .WENB(write_bit_mask),
+ //         .AB(addr),
+ //         .DB(wdata),
+ //         .EMAA(3'b011),
+ //         .EMASA(1'b0),
+ //         .EMAB(3'b011),
+ //         .TENA(1'b1),
+ //         .TCENA(1'b0),
+ //         .TAA(5'b0),
+ //         .TENB(1'b1),
+ //         .TCENB(1'b0),
+ //         .TWENB(128'b0),
+ //         .TAB(5'b0),
+ //         .TDB(128'b0),
+ //         .RET1N(1'b1),
+ //         .SIA(2'b0),
+ //         .SEA(1'b0),
+ //         .DFTRAMBYP(1'b0),
+ //         .SIB(2'b0),
+ //         .SEB(1'b0),
+ //         .COLLDISN(1'b1)
+ //   );
+ //   /* verilator lint_on PINCONNECTEMPTY */
+
+endmodule
\ No newline at end of file
diff --git a/syn/syn.tcl b/syn/syn.tcl
index eb766360..f5c86b33 100755
--- a/syn/syn.tcl
+++ b/syn/syn.tcl
@@ -3,7 +3,7 @@ set link_library		[concat * sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_
 set symbol_library		{}
 set target_library		[concat sc12mc_cln28hpm_base_ulvt_c35_ssg_typical_max_0p81v_m40c.db]
 
-set verilog_files 	[ list VX_generic_priority_encoder.v VX_generic_stack.v VX_join_inter.v VX_csr_wrapper.v VX_csr_req_inter.v VX_csr_wb_inter.v  VX_gpgpu_inst.v VX_gpu_inst_req_inter.v VX_wstall_inter.v VX_inst_exec_wb_inter.v VX_lsu.v VX_execute_unit.v VX_lsu_addr_gen.v VX_inst_multiplex.v VX_exec_unit_req_inter.v VX_lsu_req_inter.v VX_alu.v VX_back_end.v VX_gpr_stage.v VX_gpr_data_inter.v VX_csr_handler.v VX_decode.v VX_define.v VX_scheduler.v VX_fetch.v VX_front_end.v VX_generic_register.v VX_gpr.v VX_gpr_wrapper.v VX_one_counter.v VX_priority_encoder.v VX_warp.v VX_warp_scheduler.v VX_writeback.v Vortex.v byte_enabled_simple_dual_port_ram.v VX_branch_response_inter.v VX_dcache_request_inter.v VX_dcache_response_inter.v VX_frE_to_bckE_req_inter.v VX_gpr_clone_inter.v VX_gpr_jal_inter.v VX_gpr_read_inter.v VX_gpr_wspawn_inter.v VX_icache_request_inter.v VX_icache_response_inter.v VX_inst_mem_wb_inter.v VX_inst_meta_inter.v VX_jal_response_inter.v VX_mem_req_inter.v VX_mw_wb_inter.v VX_warp_ctl_inter.v VX_wb_inter.v VX_d_e_reg.v VX_f_d_reg.v \
+set verilog_files 	[ list VX_bank_valids.v VX_priority_encoder_sm.v VX_set_bit.v VX_shared_memory.v VX_shared_memory_block.v VX_dmem_controller.v VX_generic_priority_encoder.v VX_generic_stack.v VX_join_inter.v VX_csr_wrapper.v VX_csr_req_inter.v VX_csr_wb_inter.v  VX_gpgpu_inst.v VX_gpu_inst_req_inter.v VX_wstall_inter.v VX_inst_exec_wb_inter.v VX_lsu.v VX_execute_unit.v VX_lsu_addr_gen.v VX_inst_multiplex.v VX_exec_unit_req_inter.v VX_lsu_req_inter.v VX_alu.v VX_back_end.v VX_gpr_stage.v VX_gpr_data_inter.v VX_csr_handler.v VX_decode.v VX_define.v VX_scheduler.v VX_fetch.v VX_front_end.v VX_generic_register.v VX_gpr.v VX_gpr_wrapper.v VX_one_counter.v VX_priority_encoder.v VX_warp.v VX_warp_scheduler.v VX_writeback.v Vortex.v byte_enabled_simple_dual_port_ram.v VX_branch_response_inter.v VX_dcache_request_inter.v VX_dcache_response_inter.v VX_frE_to_bckE_req_inter.v VX_gpr_clone_inter.v VX_gpr_jal_inter.v VX_gpr_read_inter.v VX_gpr_wspawn_inter.v VX_icache_request_inter.v VX_icache_response_inter.v VX_inst_mem_wb_inter.v VX_inst_meta_inter.v VX_jal_response_inter.v VX_mem_req_inter.v VX_mw_wb_inter.v VX_warp_ctl_inter.v VX_wb_inter.v VX_d_e_reg.v VX_f_d_reg.v \
 					]
 
 analyze -format sverilog $verilog_files