From b7d7e69f47ae9ac0151b1486316d86510a2ac75d Mon Sep 17 00:00:00 2001 From: Blaise Tine Date: Fri, 26 Jun 2020 00:27:55 -0400 Subject: [PATCH] fixed assertion in lsu_unit --- driver/rtlsim/Makefile | 29 ++++++++++++++--------------- driver/tests/basic/kernel.bin | Bin hw/rtl/VX_lsu_unit.v | 2 +- hw/simulate/Makefile | 21 +++++++++++---------- hw/simulate/simulator.cpp | 4 ++++ 5 files changed, 30 insertions(+), 26 deletions(-) mode change 100644 => 100755 driver/tests/basic/kernel.bin diff --git a/driver/rtlsim/Makefile b/driver/rtlsim/Makefile index 2ae9becb..09fd957d 100644 --- a/driver/rtlsim/Makefile +++ b/driver/rtlsim/Makefile @@ -4,16 +4,17 @@ CFLAGS += -std=c++11 -g -O0 -Wall -Wextra -Wfatal-errors CFLAGS += -I../../include -I../../../hw/simulate -I../../../hw # control RTL debug print states -DBG_PRINT_FLAGS = -DDBG_PRINT_CORE_ICACHE \ - -DDBG_PRINT_CORE_DCACHE \ - -DDBG_PRINT_CACHE_BANK \ - -DDBG_PRINT_CACHE_SNP \ - -DDBG_PRINT_CACHE_MSRQ \ - -DDBG_PRINT_DRAM \ - -DDBG_PRINT_PIPELINE \ - -DDBG_PRINT_OPAE +DBG_PRINT_FLAGS += -DDBG_PRINT_CORE_ICACHE +DBG_PRINT_FLAGS += -DDBG_PRINT_CORE_DCACHE +DBG_PRINT_FLAGS += -DDBG_PRINT_CACHE_BANK +DBG_PRINT_FLAGS += -DDBG_PRINT_CACHE_SNP +DBG_PRINT_FLAGS += -DDBG_PRINT_CACHE_MSRQ +DBG_PRINT_FLAGS += -DDBG_PRINT_DRAM +DBG_PRINT_FLAGS += -DDBG_PRINT_PIPELINE +DBG_PRINT_FLAGS += -DDBG_PRINT_OPAE -#DBG_PRINT=$(DBG_PRINT_FLAGS) +#DBG_FLAGS += $(DBG_PRINT_FLAGS) +#DBG_FLAGS += -DDBG_CORE_REQ_INFO #CONFIGS += -DNUM_CLUSTERS=2 -DNUM_CORES=4 #CONFIGS += -DNUM_CLUSTERS=1 -DNUM_CORES=4 @@ -46,13 +47,11 @@ VL_FLAGS += --x-assign unique # Debugigng ifdef DEBUG - VL_FLAGS += --trace -DVCD_OUTPUT $(DBG_PRINT) - CFLAGS += -DVCD_OUTPUT $(DBG_PRINT) - #VL_FLAGS += -DDBG_CORE_REQ_INFO - #CFLAGS += -DDBG_CORE_REQ_INFO -else - CFLAGS += -DNDEBUG + VL_FLAGS += -DVCD_OUTPUT --assert --trace $(DBG_FLAGS) + CFLAGS += -DVCD_OUTPUT $(DBG_FLAGS) +else VL_FLAGS += -DNDEBUG + CFLAGS += -DNDEBUG endif # AFU diff --git a/driver/tests/basic/kernel.bin b/driver/tests/basic/kernel.bin old mode 100644 new mode 100755 diff --git a/hw/rtl/VX_lsu_unit.v b/hw/rtl/VX_lsu_unit.v index 9800b5f8..e9bf2c36 100644 --- a/hw/rtl/VX_lsu_unit.v +++ b/hw/rtl/VX_lsu_unit.v @@ -113,7 +113,7 @@ module VX_lsu_unit #( end if (mrq_pop_part) begin mem_rsp_mask[mrq_read_addr] <= mem_rsp_mask_upd; - assert(mrq_read_addr == dbg_mrq_write_addr); + assert(mrq_read_addr == dbg_mrq_write_addr); end end diff --git a/hw/simulate/Makefile b/hw/simulate/Makefile index c8bd3ffa..4385c6c1 100644 --- a/hw/simulate/Makefile +++ b/hw/simulate/Makefile @@ -3,16 +3,17 @@ MULTICORE += -DNUM_CLUSTERS=1 -DNUM_CORES=2 # control RTL debug print states -DBG_PRINT_FLAGS = -DDBG_PRINT_CORE_ICACHE \ - -DDBG_PRINT_CORE_DCACHE \ - -DDBG_PRINT_CACHE_BANK \ - -DDBG_PRINT_CACHE_SNP \ - -DDBG_PRINT_CACHE_MSRQ \ - -DDBG_PRINT_DRAM \ - -DDBG_PRINT_PIPELINE \ - -DDBG_PRINT_OPAE +DBG_PRINT_FLAGS += -DDBG_PRINT_CORE_ICACHE +DBG_PRINT_FLAGS += -DDBG_PRINT_CORE_DCACHE +DBG_PRINT_FLAGS += -DDBG_PRINT_CACHE_BANK +DBG_PRINT_FLAGS += -DDBG_PRINT_CACHE_SNP +DBG_PRINT_FLAGS += -DDBG_PRINT_CACHE_MSRQ +DBG_PRINT_FLAGS += -DDBG_PRINT_DRAM +DBG_PRINT_FLAGS += -DDBG_PRINT_PIPELINE +DBG_PRINT_FLAGS += -DDBG_PRINT_OPAE -#DBG_PRINT=$(DBG_PRINT_FLAGS) +#DBG_FLAGS += $(DBG_PRINT_FLAGS) +#DBG_FLAGS += -DDBG_CORE_REQ_INFO INCLUDE = -I../rtl/ -I../rtl/libs -I../rtl/interfaces -I../rtl/pipe_regs -I../rtl/cache -I../rtl/simulate @@ -27,7 +28,7 @@ VF += -Wno-DECLFILENAME VF += --x-initial unique VF += -exe $(SRCS) $(INCLUDE) -DBG += -DVCD_OUTPUT $(DBG_PRINT) +DBG += -DVCD_OUTPUT $(DBG_FLAGS) DBG += -DDBG_CORE_REQ_INFO THREADS ?= $(shell python3 -c 'import multiprocessing as mp; print(max(1, mp.cpu_count() // 2))') diff --git a/hw/simulate/simulator.cpp b/hw/simulate/simulator.cpp index 731ff8fc..f4e5bb3e 100644 --- a/hw/simulate/simulator.cpp +++ b/hw/simulate/simulator.cpp @@ -13,6 +13,10 @@ Simulator::Simulator() { // force random values for unitialized signals Verilated::randReset(2); +#ifdef NDEBUG + Verilated::assertOn(false); +#endif + ram_ = nullptr; vortex_ = new VVortex();