Vortex 2.0 changes:
+ Microarchitecture optimizations + 64-bit support + Xilinx FPGA support + LLVM-16 support + Refactoring and quality control fixes minor update minor update minor update minor update minor update minor update cleanup cleanup cache bindings and memory perf refactory minor update minor update hw unit tests fixes minor update minor update minor update minor update minor update minor udpate minor update minor update minor update minor update minor update minor update minor update minor updates minor updates minor update minor update minor update minor update minor update minor update minor updates minor updates minor updates minor updates minor update minor update
This commit is contained in:
Blaise Tine
@@ -40,9 +40,9 @@ VX.cache.v is the top module of the cache verilog code located in the `/hw/rtl/c
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- Core Response Merge
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- Cache accesses one line at a time. As a result, each request may not come back in the same response. This module tries to recombine the responses by thread ID.
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### VX_bank.v
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### VX_cache_bank.v
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VX_bank.v is the verilog code that handles cache bank functionality and is located in the `/hw/rtl/cache` directory.
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VX_cache_bank.v is the verilog code that handles cache bank functionality and is located in the `/hw/rtl/cache` directory.
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@@ -3,38 +3,39 @@
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The directory/file layout of the Vortex codebase is as followed:
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- `hw`:
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- `rtl`: hardware rtl sources
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- `cache`: cache subsystem code
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- `fp_cores`: floating point unit code
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- `rtl`: hardware rtl sources
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- `core`: core pipeline
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- `cache`: cache subsystem
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- `mem`: memory subsystem
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- `fpu`: floating point unit
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- `interfaces`: interfaces for inter-module communication
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- `libs`: general-purpose RTL modules
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- `libs`: general-purpose RTL modules
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- `syn`: synthesis directory
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- `opae`: OPAE synthesis scripts
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- `quartus`: Quartus synthesis scripts
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- `altera`: Altera synthesis scripts
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- `xilinx`: Xilinx synthesis scripts
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- `synopsys`: Synopsys synthesis scripts
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- `modelsim`: Modelsim synthesis scripts
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- `yosys`: Yosys synthesis scripts
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- `unit_tests`: unit tests for some hardware components
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- `driver`: host drivers repository
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- `runtime`: host runtime software APIs
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- `include`: Vortex driver public headers
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- `stub`: Vortex stub driver library
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- `fpga`: software driver that uses Intel OPAE FPGA
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- `asesim`: software driver that uses Intel ASE simulator
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- `vlsim`: software driver that uses vlsim simulator
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- `opae`: software driver that uses Intel OPAE API with device targets=fpga|asesim|opaesim
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- `xrt`: software driver that uses Xilinx XRT API with device targets=hw|hw_emu|sw_emu
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- `rtlsim`: software driver that uses rtlsim simulator
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- `simx`: software driver that uses simX simulator
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- `runtime`: kernel runtime software
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- `kernel`: GPU kernel software APIs
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- `include`: Vortex runtime public headers
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- `linker`: linker file for compiling kernels
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- `src`: runtime implementation
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- `sim`:
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- `vlsim`: AFU RTL simulator
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- `opaesim`: Intel OPAE AFU RTL simulator
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- `rtlsim`: processor RTL simulator
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- `simX`: cycle approximate simulator for vortex
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- `tests`: tests repository.
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- `runtime`: runtime tests
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- `regression`: regression tests
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- `riscv`: RISC-V standard tests
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- `riscv`: RISC-V conformance tests
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- `kernel`: kernel tests
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- `regression`: regression tests
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- `opencl`: opencl benchmarks and tests
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- `ci`: continuous integration scripts
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- `miscs`: miscellaneous resources.
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@@ -1,29 +1,37 @@
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# Debugging Vortex Hardware
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# Debugging Vortex GPU
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## Testing changes to the RTL or simulator GPU driver.
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The Blackbox utility script will not pick up your changes if the h/w configuration is the same as during teh last run.
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To force the utility to build the driver, you need pass the --rebuild=1 option when running tests.
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Using --rebuild=0 will prevent the rebuild even if the h/w configuration is different from last run.
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$ ./ci/blackbox.sh --driver=simx --app=demo --rebuild=1
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## SimX Debugging
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SimX cycle-approximate simulator allows faster debugging of Vortex kernels' execution.
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The recommended method to enable debugging is to pass the `--debug` flag to `blackbox` tool when running a program.
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The recommended method to enable debugging is to pass the `--debug=<level>` flag to `blackbox` tool when running a program.
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// Running demo program on SimX in debug mode
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$ ./ci/blackbox.sh --driver=simx --app=demo --debug
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$ ./ci/blackbox.sh --driver=simx --app=demo --debug=1
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A debug trace `run.log` is generated in the current directory during the program execution. The trace includes important states of the simulated processor (decoded instruction, register states, pipeline states, etc..). You can increase the verbosity level of the trace by changing the `DEBUG_LEVEL` variable to a value [1-5] (default is 3).
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A debug trace `run.log` is generated in the current directory during the program execution. The trace includes important states of the simulated processor (decoded instruction, register states, pipeline states, etc..). You can increase the verbosity of the trace by changing the debug level.
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// Using SimX in debug mode with verbose level 4
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$ CONFIGS=-DDEBUG_LEVEL=4 ./ci/blackbox.sh --driver=simx --app=demo --debug
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// Using SimX in debug mode with verbose level 3
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$ ./ci/blackbox.sh --driver=simx --app=demo --debug=3
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## RTL Debugging
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To debug the processor RTL, you need to use VLSIM or RTLSIM driver. VLSIM simulates the full processor including the AFU command processor (using `/rtl/afu/vortex_afu.sv` as top module). RTLSIM simulates the Vortex processor only (using `/rtl/Vortex.v` as top module).
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To debug the processor RTL, you need to use VLSIM or RTLSIM driver. VLSIM simulates the full processor including the AFU command processor (using `/rtl/afu/opae/vortex_afu.sv` as top module). RTLSIM simulates the Vortex processor only (using `/rtl/Vortex.v` as top module).
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The recommended method to enable debugging is to pass the `--debug` flag to `blackbox` tool when running a program.
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// Running demo program on vlsim in debug mode
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$ ./ci/blackbox.sh --driver=vlsim --app=demo --debug
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// Running demo program on the opae simulator in debug mode
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$ TARGET=opaesim ./ci/blackbox.sh --driver=opae --app=demo --debug=1
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// Running demo program on rtlsim in debug mode
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$ ./ci/blackbox.sh --driver=rtlsim --app=demo --debug
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$ ./ci/blackbox.sh --driver=rtlsim --app=demo --debug=1
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A debug trace `run.log` is generated in the current directory during the program execution. The trace includes important states of the simulated processor (memory, caches, pipeline, stalls, etc..). A waveform trace `trace.vcd` is also generated in the current directory during the program execution. You can visualize the waveform trace using any tool that can open VCD files (Modelsim, Quartus, Vivado, etc..). [GTKwave] (http://gtkwave.sourceforge.net) is a great open-source scope analyzer that also works with VCD files.
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@@ -32,7 +40,7 @@ A debug trace `run.log` is generated in the current directory during the program
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Debugging the FPGA directly may be necessary to investigate runtime bugs that the RTL simulation cannot catch. We have implemented an in-house scope analyzer for Vortex that works when the FPGA is running. To enable the FPGA scope analyzer, the FPGA bitstream should be built using `SCOPE=1` flag
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& cd /hw/syn/opae
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$ CONFIGS=-DSCOPE=1 make fpga-4c
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$ CONFIGS="-DSCOPE=1" TARGET=fpga make
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When running the program on the FPGA, you need to pass the `--scope` flag to the `blackbox` tool.
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@@ -40,4 +48,18 @@ When running the program on the FPGA, you need to pass the `--scope` flag to the
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$ ./ci/blackbox.sh --driver=fpga --app=demo --scope
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A waveform trace `trace.vcd` will be generated in the current directory during the program execution. This trace includes a limited set of signals that are defined in `/hw/scripts/scope.json`. You can expand your signals' selection by updating the json file.
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A waveform trace `trace.vcd` will be generated in the current directory during the program execution. This trace includes a limited set of signals that are defined in `/hw/scripts/scope.json`. You can expand your signals' selection by updating the json file.
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## Analyzing Vortex trace log
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When debugging Vortex RTL or SimX Simulator, reading the trace run.log file can be overwhelming when the trace gets really large.
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We provide a trace sanitizer tool under ./hw/scripts/trace_csv.py that you can use to convert the large trace into a CSV file containing all the instructions that executed with their source and destination operands.
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$ ./ci/blackbox.sh --driver=rtlsim --app=demo --debug=3 --log=run_rtlsim.log
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$ ./ci/trace_csv.py -trtlsim run_rtlsim.log -otrace_rtlsim.csv
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$ ./ci/blackbox.sh --driver=simx --app=demo --debug=3 --log=run_simx.log
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$ ./ci/trace_csv.py -tsimx run_simx.log -otrace_simx.csv
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The first column in the CSV trace is UUID (universal unique identifier) of the instruction and the content is sorted by the UUID. You can use the UUID to trace the same instruction running on either the RTL hw or SimX simulator.
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This can be very effective if you want to use SimX to debugging your RTL hardware by comparing CSV traces.
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@@ -1,128 +0,0 @@
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# Execute OpenCL on Vortex backend
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## Requirements
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- [Vortex](https://github.com/vortexgpgpu/vortex)
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- [POCL for Vortex](https://github.com/vortexgpgpu/pocl)
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- [riscv-toolchain](https://github.com/riscv-collab/riscv-gnu-toolchain)
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- [llvm-riscv](https://github.com/llvm-mirror/llvm)
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For installation, please see [Build Instructions](../README.md) for more details.
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**For Ubuntu18.04 users, you can directly download pre-build toolchains with [toolchain_install.sh](https://github.com/vortexgpgpu/vortex/blob/master/ci/toolchain_install.sh) script.**
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```bash
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# please modify the DESTDIR variable in the script before execution
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bash toolchain_install.sh -all
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```
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Assuming we have installed all dependencies in `/opt` path, we can get the following environment:
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```bash
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tree -L 2 /opt
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'''
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/opt/
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├── llvm-riscv
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│ ├── bin
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│ ├── include
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│ ├── lib
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│ ├── libexec
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│ └── share
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├── pocl
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│ ├── compiler
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│ └── runtime
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├── riscv-gnu-toolchain
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│ ├── bin
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│ ├── drops
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│ ├── include
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│ ├── lib
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│ ├── libexec
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│ ├── riscv32-unknown-elf
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│ ├── share
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│ └── var
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└── verilator
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├── bin
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├── examples
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├── include
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├── verilator-config.cmake
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└── verilator-config-version.cmake
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'''
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```
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## Execute OpenCL on Vortex
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In this tutorial, we show the example of executing a vecadd programs on SIMX backend.
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To execute a OpenCL program on Vortex, we have the following steps:
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- Compile the [OpenCL kernels](https://github.com/vortexgpgpu/vortex/blob/master/tests/opencl/vecadd/kernel.cl) into risc-v binary by POCL compiler.
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- Compile the [OpenCL host](https://github.com/vortexgpgpu/vortex/blob/master/tests/opencl/vecadd/main.cc) and link with Vortex driver(```-lvortex```).
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- Execute the compiled host programs on a backend.
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Thus, we can write a Makefile as following:
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```Makefile
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LLVM_PREFIX ?= /opt/llvm-riscv
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RISCV_TOOLCHAIN_PATH ?= /opt/riscv-gnu-toolchain
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SYSROOT ?= $(RISCV_TOOLCHAIN_PATH)/riscv32-unknown-elf
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POCL_CC_PATH ?= /opt/pocl/compiler
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POCL_RT_PATH ?= /opt/pocl/runtime
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OPTS ?= -n64
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# please edit these two variable to your environment
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VORTEX_DRV_PATH ?= $(realpath ../../../driver)
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VORTEX_RT_PATH ?= $(realpath ../../../runtime)
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K_LLCFLAGS += "-O3 -march=riscv32 -target-abi=ilp32f -mcpu=generic-rv32 -mattr=+m,+f -mattr=+vortex -float-abi=hard -code-model=small"
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K_CFLAGS += "-v -O3 --sysroot=$(SYSROOT) --gcc-toolchain=$(RISCV_TOOLCHAIN_PATH) -march=rv32imf -mabi=ilp32f -Xclang -target-feature -Xclang +vortex -I$(VORTEX_RT_PATH)/include -fno-rtti -fno-exceptions -ffreestanding -nostartfiles -fdata-sections -ffunction-sections"
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K_LDFLAGS += "-Wl,-Bstatic,-T$(VORTEX_RT_PATH)/linker/vx_link.ld -Wl,--gc-sections $(VORTEX_RT_PATH)/libvortexrt.a -lm"
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CXXFLAGS += -std=c++11 -O2 -Wall -Wextra -Wfatal-errors
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CXXFLAGS += -Wno-deprecated-declarations -Wno-unused-parameter
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CXXFLAGS += -I$(POCL_RT_PATH)/include
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LDFLAGS += -L$(POCL_RT_PATH)/lib -L$(VORTEX_DRV_PATH)/stub -lOpenCL -lvortex
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PROJECT = vecadd
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SRCS = main.cc
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all: $(PROJECT) kernel.pocl
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kernel.pocl: kernel.cl
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LLVM_PREFIX=$(LLVM_PREFIX) POCL_DEBUG=all LD_LIBRARY_PATH=$(LLVM_PREFIX)/lib:$(POCL_CC_PATH)/lib $(POCL_CC_PATH)/bin/poclcc -LLCFLAGS $(K_LLCFLAGS) -CFLAGS $(K_CFLAGS) -LDFLAGS $(K_LDFLAGS) -o kernel.pocl kernel.cl
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$(PROJECT): $(SRCS)
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$(CXX) $(CXXFLAGS) $^ $(LDFLAGS) -o $@
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run-fpga: $(PROJECT) kernel.pocl
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LD_LIBRARY_PATH=$(POCL_RT_PATH)/lib:$(VORTEX_DRV_PATH)/fpga:$(LD_LIBRARY_PATH) ./$(PROJECT) $(OPTS)
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run-asesim: $(PROJECT) kernel.pocl
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LD_LIBRARY_PATH=$(POCL_RT_PATH)/lib:$(VORTEX_DRV_PATH)/asesim:$(LD_LIBRARY_PATH) ./$(PROJECT) $(OPTS)
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run-vlsim: $(PROJECT) kernel.pocl
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LD_LIBRARY_PATH=$(POCL_RT_PATH)/lib:$(VORTEX_DRV_PATH)/vlsim:$(LD_LIBRARY_PATH) ./$(PROJECT) $(OPTS)
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run-simx: $(PROJECT) kernel.pocl
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LD_LIBRARY_PATH=$(POCL_RT_PATH)/lib:$(VORTEX_DRV_PATH)/simx:$(LD_LIBRARY_PATH) ./$(PROJECT) $(OPTS)
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run-rtlsim: $(PROJECT) kernel.pocl
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LD_LIBRARY_PATH=$(POCL_RT_PATH)/lib:$(VORTEX_DRV_PATH)/rtlsim:$(LD_LIBRARY_PATH) ./$(PROJECT) $(OPTS)
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.depend: $(SRCS)
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$(CXX) $(CXXFLAGS) -MM $^ > .depend;
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clean:
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rm -rf $(PROJECT) *.o .depend
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clean-all: clean
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rm -rf *.pocl *.dump
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ifneq ($(MAKECMDGOALS),clean)
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-include .depend
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endif
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```
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First, build the host program.
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```bash
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make all
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```
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If we want to execute on SIMX, we can execute the command below.
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```bash
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make run-simx
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```
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@@ -17,22 +17,16 @@ OPAE Build
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------------------
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The FPGA has to following configuration options:
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- 1 core fpga (fpga-1c)
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- 2 cores fpga (fpga-2c)
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- 4 cores fpga (fpga-4c)
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- 8 cores fpga (fpga-8c)
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- 16 cores fpga (fpga-16c)
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- 32 cores fpga (fpga-32c)
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- 64 cores fpga (fpga-64c)
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- DEVICE_FAMILY=arria10 | stratix10
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- NUM_CORES=#n
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Command line:
|
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$ cd hw/syn/opae
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$ make fpga-<num-of-cores>c
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$ cd hw/syn/altera/opae
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$ PREFIX=test1 TARGET=fpga NUM_CORES=4 make
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Example: `make fpga-4c`
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A new folder (ex: `build_fpga_4c`) will be created and the build will start and take ~30-480 min to complete.
|
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A new folder (ex: `test1_xxx_4c`) will be created and the build will start and take ~30-480 min to complete.
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Setting TARGET=ase will build the project for simulation using Intel ASE.
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|
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OPAE Build Configuration
|
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@@ -45,35 +39,32 @@ The hardware configuration file `/hw/rtl/VX_config.vh` defines all the hardware
|
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|
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You configure the syntesis build from the command line:
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|
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$ CONFIGS="-DPERF_ENABLE -DNUM_THREADS=8" make fpga-4c
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$ CONFIGS="-DPERF_ENABLE -DNUM_THREADS=8" make
|
||||
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||||
OPAE Build Progress
|
||||
-------------------
|
||||
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||||
You could check the last 10 lines in the build log for possible errors until build completion.
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||||
|
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$ tail -n 10 ./build_fpga_<num-of-cores>c/build.log
|
||||
$ tail -n 10 <build_dir>/build.log
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||||
|
||||
Check if the build is still running by looking for quartus_sh, quartus_syn, or quartus_fit programs.
|
||||
|
||||
$ ps -u <username>
|
||||
|
||||
|
||||
If the build fails and you need to restart it, clean up the build folder using the following command:
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||||
|
||||
$ make clean-fpga-<num-of-cores>c
|
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|
||||
Example: `make clean-fpga-4c`
|
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$ make clean
|
||||
|
||||
The file `vortex_afu.gbs` should exist when the build is done:
|
||||
|
||||
$ ls -lsa ./build_fpga_<num-of-cores>c/vortex_afu.gbs
|
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$ ls -lsa <build_dir>/vortex_afu.gbs
|
||||
|
||||
|
||||
Signing the bitstream and Programming the FPGA
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||||
----------------------------------------------
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||||
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$ cd ./build_fpga_<num-of-cores>c
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$ cd <build_dir>
|
||||
$ PACSign PR -t UPDATE -H openssl_manager -i vortex_afu.gbs -o vortex_afu_unsigned_ssl.gbs
|
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$ fpgasupdate vortex_afu_unsigned_ssl.gbs
|
||||
|
||||
|
||||
@@ -11,7 +11,6 @@
|
||||
- [Debugging](debugging.md)
|
||||
- [Useful Links](references.md)
|
||||
|
||||
|
||||
## Installation
|
||||
|
||||
- Refer to the build instructions in [README](../README.md).
|
||||
@@ -22,9 +21,11 @@ Running Vortex simulators with different configurations:
|
||||
- Run basic driver test with rtlsim driver and Vortex config of 2 clusters, 2 cores, 2 warps, 4 threads
|
||||
|
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$ ./ci/blackbox.sh --driver=rtlsim --clusters=2 --cores=2 --warps=2 --threads=4 --app=basic
|
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- Run demo driver test with vlsim driver and Vortex config of 1 clusters, 4 cores, 4 warps, 2 threads
|
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|
||||
$ ./ci/blackbox.sh --driver=vlsim --clusters=1 --cores=4 --warps=4 --threads=2 --app=demo
|
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- Run demo driver test with opae driver and Vortex config of 1 clusters, 4 cores, 4 warps, 2 threads
|
||||
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$ ./ci/blackbox.sh --driver=opae --clusters=1 --cores=4 --warps=4 --threads=2 --app=demo
|
||||
|
||||
- Run dogfood driver test with simx driver and Vortex config of 4 cluster, 4 cores, 8 warps, 6 threads
|
||||
|
||||
$ ./ci/blackbox.sh --driver=simx --clusters=4 --cores=4 --warps=8 --threads=6 --app=dogfood
|
||||
@@ -10,7 +10,7 @@ SimX is a C++ cycle-level in-house simulator developed for Vortex. The relevant
|
||||
|
||||
### FGPA Simulation
|
||||
|
||||
The current target FPGA for simulation is the Arria10 Intel Accelerator Card v1.0. The guide to build the fpga with specific configurations is located [here.](https://github.com/vortexgpgpu/vortex-dev/blob/master/doc/FPGA_Startup_Guide.md)
|
||||
The current target FPGA for simulation is the Arria10 Intel Accelerator Card v1.0. The guide to build the fpga with specific configurations is located [here.](fpga_setup.md)
|
||||
|
||||
### How to Test
|
||||
|
||||
@@ -22,15 +22,15 @@ Running tests under specific drivers (rtlsim,simx,fpga) is done using the script
|
||||
- *Threads* - used to specify the number of threads (smallest unit of computation) within a configuration.
|
||||
- *L2cache* - used to enable the shard l2cache among the Vortex cores.
|
||||
- *L3cache* - used to enable the shared l3cache among the Vortex clusters.
|
||||
- *Driver* - used to specify which driver to run the Vortex simulation (either rtlsim, vlsim, fpga, or simx).
|
||||
- *Driver* - used to specify which driver to run the Vortex simulation (either rtlsim, opae, xrt, simx).
|
||||
- *Debug* - used to enable debug mode for the Vortex simulation.
|
||||
- *Perf* - used to enable the detailed performance counters within the Vortex simulation.
|
||||
- *App* - used to specify which test/benchmark to run in the Vortex simulation. The main choices are vecadd, sgemm, basic, demo, and dogfood. Other tests/benchmarks are located in the `/benchmarks/opencl` folder though not all of them work wit the current version of Vortex.
|
||||
- *Args* - used to pass additional arguments to the application.
|
||||
|
||||
Example use of command line arguments: Run the sgemm benchmark using the vlsim driver with a Vortex configuration of 1 cluster, 4 cores, 4 warps, and 4 threads.
|
||||
Example use of command line arguments: Run the sgemm benchmark using the opae driver with a Vortex configuration of 1 cluster, 4 cores, 4 warps, and 4 threads.
|
||||
|
||||
$ ./ci/blackbox.sh --clusters=1 --cores=4 --warps=4 --threads=4 --driver=vlsim --app=sgemm
|
||||
$ ./ci/blackbox.sh --clusters=1 --cores=4 --warps=4 --threads=4 --driver=opae --app=sgemm
|
||||
|
||||
Output from terminal:
|
||||
```
|
||||
|
||||
33
docs/testing.md
Normal file
33
docs/testing.md
Normal file
@@ -0,0 +1,33 @@
|
||||
# Testing
|
||||
|
||||
## Running a Vortex application
|
||||
|
||||
The framework provides a utility script: blakcbox.sh under the /ci/ folder for executing applications in the tests tree.
|
||||
You can query the commandline options of the tool using:
|
||||
|
||||
$ ./ci/blakcbox.sh --help
|
||||
|
||||
To execute sgemm test program on the simx driver and passing "-n10" as argument to sgemm:
|
||||
|
||||
$ ./ci/blakcbox.sh --driver=simx --app=sgemm --args="-n10"
|
||||
|
||||
You can execute the same application of a GPU architecture with 2 cores:
|
||||
|
||||
$ ./ci/blakcbox.sh --core=2 --driver=simx --app=sgemm --args="-n10"
|
||||
|
||||
When excuting, Blackbox needs to recompile the driver if the desired architecture changes.
|
||||
It tracks the latest configuration in a file under the current directory blackbox.<driver>.cache.
|
||||
To avoid having to rebuild the driver all the time, Blackbox checks if the latest cached configuration matches the current.
|
||||
|
||||
## Running Benchmarks
|
||||
|
||||
The Vortex test suite is located under the /test/ folder
|
||||
You can execute the default regression suite by running the following commands at the root folder.
|
||||
|
||||
$ make -C tests/regression run-simx
|
||||
$ make -C tests/regression run-rtlsim
|
||||
|
||||
You can execute the default opncl suite by running the following commands at the root folder.
|
||||
|
||||
$ make -C tests/opencl run-simx
|
||||
$ make -C tests/opencl run-rtlsim
|
||||
Reference in New Issue
Block a user