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[BUGFIX] Fix wrong bitwidth of way_idx when NUM_WAYS=1

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When NUM_WAYS=1, CLOG2(NUM_WAYS)-1 becomes -1, setting the MSB of
way_idx to a wrong value.
This commit is contained in:
Hansung Kim
2023-11-28 16:05:41 -08:00
parent 9a8020a683
commit c3c9a4b5d8
1 changed files with 6 additions and 1 deletions
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7
hw/rtl/cache/VX_cache_data.sv vendored
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@@ -93,7 +93,12 @@ module VX_cache_data #(
assign wren = fill; assign wren = fill;
end end
wire [`CLOG2(NUM_WAYS)-1:0] way_idx; generate if (NUM_WAYS == 1) begin
wire [0:0] way_idx;
end else begin
wire [`CLOG2(NUM_WAYS)-1:0] way_idx;
end
endgenerate
VX_onehot_encoder #( VX_onehot_encoder #(
.N (NUM_WAYS) .N (NUM_WAYS)