From c3ec4c9e90cc8ab57907dd2dc9d0cb272da35c6b Mon Sep 17 00:00:00 2001 From: Blaise Tine Date: Thu, 3 Dec 2020 09:30:59 -0800 Subject: [PATCH] minor update --- hw/rtl/libs/VX_stream_arbiter.v | 2 +- hw/syn/quartus/project.sdc | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/rtl/libs/VX_stream_arbiter.v b/hw/rtl/libs/VX_stream_arbiter.v index 90bacadf..5950d42e 100644 --- a/hw/rtl/libs/VX_stream_arbiter.v +++ b/hw/rtl/libs/VX_stream_arbiter.v @@ -3,7 +3,7 @@ module VX_stream_arbiter #( parameter NUM_REQS = 1, parameter DATAW = 1, - parameter TYPE = "F", + parameter TYPE = "R", parameter BUFFERED = 0 ) ( input wire clk, diff --git a/hw/syn/quartus/project.sdc b/hw/syn/quartus/project.sdc index 59686a41..a8170852 100644 --- a/hw/syn/quartus/project.sdc +++ b/hw/syn/quartus/project.sdc @@ -1,6 +1,6 @@ set_time_format -unit ns -decimal_places 3 -create_clock -name {clk} -period "200 MHz" -waveform { 0.0 1.0 } [get_ports {clk}] +create_clock -name {clk} -period "220 MHz" -waveform { 0.0 1.0 } [get_ports {clk}] derive_pll_clocks -create_base_clocks derive_clock_uncertainty