FPU float<->int conversion optimization
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@@ -150,14 +150,13 @@ module VX_fpu_unit #(
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wire stall_out = ~fpu_commit_if.ready && fpu_commit_if.valid;
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VX_generic_register #(
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.N(1 + `NW_BITS + `NUM_THREADS + 32 + `NR_BITS + 1 + (`NUM_THREADS * 32) + 1 + `FFG_BITS),
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.R(1)
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VX_pipe_register #(
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.DATAW (1 + `NW_BITS + `NUM_THREADS + 32 + `NR_BITS + 1 + (`NUM_THREADS * 32) + 1 + `FFG_BITS),
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.RESETW (1)
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) pipe_reg (
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.clk (clk),
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.reset (reset),
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.stall (stall_out),
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.flush (1'b0),
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.enable (!stall_out),
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.data_in ({valid_out, rsp_wid, rsp_tmask, rsp_PC, rsp_rd, rsp_wb, result, has_fflags, rsp_fflags}),
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.data_out ({fpu_commit_if.valid, fpu_commit_if.wid, fpu_commit_if.tmask, fpu_commit_if.PC, fpu_commit_if.rd, fpu_commit_if.wb, fpu_commit_if.data, has_fflags_r, fflags_r})
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);
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