Vortex 2.0 changes:
+ Microarchitecture optimizations + 64-bit support + Xilinx FPGA support + LLVM-16 support + Refactoring and quality control fixes
This commit is contained in:
Blaise Tine
111
runtime/include/vortex.h
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111
runtime/include/vortex.h
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// Copyright © 2019-2023
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#ifndef __VX_VORTEX_H__
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#define __VX_VORTEX_H__
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#include <stddef.h>
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#include <stdint.h>
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#include <stdio.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef void* vx_device_h;
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// device caps ids
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#define VX_CAPS_VERSION 0x0
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#define VX_CAPS_NUM_THREADS 0x1
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#define VX_CAPS_NUM_WARPS 0x2
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#define VX_CAPS_NUM_CORES 0x3
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#define VX_CAPS_CACHE_LINE_SIZE 0x4
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#define VX_CAPS_GLOBAL_MEM_SIZE 0x5
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#define VX_CAPS_LOCAL_MEM_SIZE 0x6
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#define VX_CAPS_KERNEL_BASE_ADDR 0x7
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#define VX_CAPS_ISA_FLAGS 0x8
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// device isa flags
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#define VX_ISA_STD_A (1ull << 0)
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#define VX_ISA_STD_C (1ull << 2)
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#define VX_ISA_STD_D (1ull << 3)
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#define VX_ISA_STD_E (1ull << 4)
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#define VX_ISA_STD_F (1ull << 5)
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#define VX_ISA_STD_H (1ull << 7)
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#define VX_ISA_STD_I (1ull << 8)
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#define VX_ISA_STD_N (1ull << 13)
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#define VX_ISA_STD_Q (1ull << 16)
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#define VX_ISA_STD_S (1ull << 18)
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#define VX_ISA_STD_U (1ull << 20)
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#define VX_ISA_BASE(flags) (1 << (((flags >> 30) & 0x3) + 4))
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#define VX_ISA_EXT_TEX (1ull << 32)
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#define VX_ISA_EXT_RASTER (1ull << 33)
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#define VX_ISA_EXT_ROP (1ull << 34)
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// device memory types
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#define VX_MEM_TYPE_GLOBAL 0
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#define VX_MEM_TYPE_LOCAL 1
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// ready wait timeout
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#define VX_MAX_TIMEOUT (24*60*60*1000) // 24 Hr
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// open the device and connect to it
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int vx_dev_open(vx_device_h* hdevice);
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// Close the device when all the operations are done
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int vx_dev_close(vx_device_h hdevice);
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// return device configurations
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int vx_dev_caps(vx_device_h hdevice, uint32_t caps_id, uint64_t *value);
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// allocate device memory and return address
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int vx_mem_alloc(vx_device_h hdevice, uint64_t size, int type, uint64_t* dev_addr);
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// release device memory
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int vx_mem_free(vx_device_h hdevice, uint64_t dev_addr);
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// get device memory info
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int vx_mem_info(vx_device_h hdevice, int type, uint64_t* mem_free, uint64_t* mem_used);
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// Copy bytes from host to device memory
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int vx_copy_to_dev(vx_device_h hdevice, uint64_t dev_addr, const void* host_ptr, uint64_t size);
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// Copy bytes from device memory to host
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int vx_copy_from_dev(vx_device_h hdevice, void* host_ptr, uint64_t dev_addr, uint64_t size);
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// Start device execution
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int vx_start(vx_device_h hdevice);
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// Wait for device ready with milliseconds timeout
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int vx_ready_wait(vx_device_h hdevice, uint64_t timeout);
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// write device configuration registers
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int vx_dcr_write(vx_device_h hdevice, uint32_t addr, uint64_t value);
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////////////////////////////// UTILITY FUNCTIONS //////////////////////////////
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// upload kernel bytes to device
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int vx_upload_kernel_bytes(vx_device_h hdevice, const void* content, uint64_t size);
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// upload kernel file to device
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int vx_upload_kernel_file(vx_device_h hdevice, const char* filename);
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// performance counters
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int vx_dump_perf(vx_device_h hdevice, FILE* stream);
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int vx_perf_counter(vx_device_h hdevice, int counter, int core_id, uint64_t* value);
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#ifdef __cplusplus
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}
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#endif
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#endif // __VX_VORTEX_H__
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@@ -1,214 +0,0 @@
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#ifndef VX_INTRINSICS_H
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#define VX_INTRINSICS_H
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#include <VX_config.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifdef __ASSEMBLY__
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#define __ASM_STR(x) x
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#else
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#define __ASM_STR(x) #x
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#endif
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#define csr_read(csr) ({ \
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unsigned __r; \
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__asm__ __volatile__ ("csrr %0, %1" : "=r" (__r) : "i" (csr)); \
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__r; \
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})
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#define csr_write(csr, val) ({ \
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unsigned __v = (unsigned)(val); \
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if (__builtin_constant_p(val) && __v < 32) \
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__asm__ __volatile__ ("csrw %0, %1" :: "i" (csr), "i" (__v)); \
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else \
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__asm__ __volatile__ ("csrw %0, %1" :: "i" (csr), "r" (__v)); \
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})
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#define csr_swap(csr, val) ({ \
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unsigned __r; \
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unsigned __v = (unsigned)(val); \
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if (__builtin_constant_p(val) && __v < 32) \
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__asm__ __volatile__ ("csrrw %0, %1, %2" : "=r" (__r) : "i" (csr), "i" (__v)); \
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else \
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__asm__ __volatile__ ("csrrw %0, %1, %2" : "=r" (__r) : "i" (csr), "r" (__v)); \
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__r; \
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})
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#define csr_read_set(csr, val) ({ \
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unsigned __r; \
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unsigned __v = (unsigned)(val); \
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if (__builtin_constant_p(val) && __v < 32) \
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__asm__ __volatile__ ("csrrs %0, %1, %2" : "=r" (__r) : "i" (csr), "i" (__v)); \
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else \
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__asm__ __volatile__ ("csrrs %0, %1, %2" : "=r" (__r) : "i" (csr), "r" (__v)); \
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__r; \
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})
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#define csr_set(csr, val) ({ \
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unsigned __v = (unsigned)(val); \
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if (__builtin_constant_p(val) && __v < 32) \
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__asm__ __volatile__ ("csrs %0, %1" :: "i" (csr), "i" (__v)); \
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else \
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__asm__ __volatile__ ("csrs %0, %1" :: "i" (csr), "r" (__v)); \
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})
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#define csr_read_clear(csr, val) ({ \
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unsigned __r; \
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unsigned __v = (unsigned)(val); \
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if (__builtin_constant_p(val) && __v < 32) \
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__asm__ __volatile__ ("csrrc %0, %1, %2" : "=r" (__r) : "i" (csr), "i" (__v)); \
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else \
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__asm__ __volatile__ ("csrrc %0, %1, %2" : "=r" (__r) : "i" (csr), "r" (__v)); \
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__r; \
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})
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#define csr_clear(csr, val) ({ \
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unsigned __v = (unsigned)(val); \
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if (__builtin_constant_p(val) && __v < 32) \
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__asm__ __volatile__ ("csrc %0, %1" :: "i" (csr), "i" (__v)); \
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else \
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__asm__ __volatile__ ("csrc %0, %1" :: "i" (csr), "r" (__v)); \
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})
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// Texture load
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#define vx_tex(unit, u, v, lod) ({ \
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unsigned __r; \
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__asm__ __volatile__ (".insn r4 0x5b, 0, %1, %0, %2, %3, %4" : "=r"(__r) : "i"(unit), "r"(u), "r"(v), "r"(lod)); \
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__r; \
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})
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// Conditional move
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#define vx_cmov(c, t, f) ({ \
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unsigned __r; \
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__asm__ __volatile__ (".insn r4 0x5b, 1, 0, %0, %1, %2, %3" : "=r"(__r : "r"(c), "r"(t), "r"(f)); \
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__r; \
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})
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// Set thread mask
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inline void vx_tmc(unsigned thread_mask) {
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asm volatile (".insn s 0x6b, 0, x0, 0(%0)" :: "r"(thread_mask));
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}
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// Set thread predicate
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inline void vx_pred(unsigned condition) {
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asm volatile (".insn s 0x6b, 0, x1, 0(%0)" :: "r"(condition));
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}
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typedef void (*vx_wspawn_pfn)();
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// Spawn warps
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inline void vx_wspawn(unsigned num_warps, vx_wspawn_pfn func_ptr) {
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asm volatile (".insn s 0x6b, 1, %1, 0(%0)" :: "r"(num_warps), "r"(func_ptr));
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}
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// Split on a predicate
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inline void vx_split(int predicate) {
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asm volatile (".insn s 0x6b, 2, x0, 0(%0)" :: "r"(predicate));
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}
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// Join
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inline void vx_join() {
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asm volatile (".insn s 0x6b, 3, x0, 0(x0)");
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}
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// Warp Barrier
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inline void vx_barrier(unsigned barried_id, unsigned num_warps) {
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asm volatile (".insn s 0x6b, 4, %1, 0(%0)" :: "r"(barried_id), "r"(num_warps));
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}
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// Prefetch
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inline void vx_prefetch(unsigned addr) {
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asm volatile (".insn s 0x6b, 5, x0, 0(%0)" :: "r"(addr) );
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}
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// Return active warp's thread id
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inline int vx_thread_id() {
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int result;
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asm volatile ("csrr %0, %1" : "=r"(result) : "i"(CSR_WTID));
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return result;
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}
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// Return active core's local thread id
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inline int vx_thread_lid() {
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int result;
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asm volatile ("csrr %0, %1" : "=r"(result) : "i"(CSR_LTID));
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return result;
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}
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// Return processsor global thread id
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inline int vx_thread_gid() {
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int result;
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asm volatile ("csrr %0, %1" : "=r"(result) : "i"(CSR_GTID));
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return result;
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}
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// Return active core's local warp id
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inline int vx_warp_id() {
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int result;
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asm volatile ("csrr %0, %1" : "=r"(result) : "i"(CSR_LWID));
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return result;
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}
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// Return processsor's global warp id
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inline int vx_warp_gid() {
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int result;
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asm volatile ("csrr %0, %1" : "=r"(result) : "i"(CSR_GWID));
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return result;
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}
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// Return processsor core id
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inline int vx_core_id() {
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int result;
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asm volatile ("csrr %0, %1" : "=r"(result) : "i"(CSR_GCID));
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return result;
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}
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// Return current threadk mask
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inline int vx_thread_mask() {
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int result;
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asm volatile ("csrr %0, %1" : "=r"(result) : "i"(CSR_TMASK));
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return result;
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}
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// Return the number of threads in a warp
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inline int vx_num_threads() {
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int result;
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asm volatile ("csrr %0, %1" : "=r"(result) : "i"(CSR_NT));
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return result;
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}
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// Return the number of warps in a core
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inline int vx_num_warps() {
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int result;
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asm volatile ("csrr %0, %1" : "=r"(result) : "i"(CSR_NW));
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return result;
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}
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// Return the number of cores in the processsor
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inline int vx_num_cores() {
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int result;
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asm volatile ("csrr %0, %1" : "=r"(result) : "i"(CSR_NC));
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return result;
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}
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inline void vx_fence() {
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asm volatile ("fence iorw, iorw");
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}
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#define __if(b) vx_split(b); \
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if (b)
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#define __else else
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#define __endif vx_join();
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#define __DIVERGENT__ __attribute__((annotate("divergent")))
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#ifdef __cplusplus
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}
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#endif
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#endif
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@@ -1,21 +0,0 @@
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#ifndef VX_PRINT_H
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#define VX_PRINT_H
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#include <stdarg.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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int vx_vprintf(const char* format, va_list va);
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int vx_printf(const char * format, ...);
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void vx_putchar(int c);
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void vx_putint(int value, int base);
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void vx_putfloat(float value, int precision);
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#ifdef __cplusplus
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}
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#endif
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#endif
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@@ -1,43 +0,0 @@
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#ifndef VX_API_H
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#define VX_API_H
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#include <stdint.h>
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#include <stdio.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef struct {
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uint32_t num_groups[3];
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uint32_t global_offset[3];
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uint32_t local_size[3];
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char * printf_buffer;
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uint32_t *printf_buffer_position;
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uint32_t printf_buffer_capacity;
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uint32_t work_dim;
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} context_t;
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typedef void (*vx_spawn_kernel_cb) (
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const void * /* arg */,
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const context_t * /* context */,
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uint32_t /* group_x */,
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uint32_t /* group_y */,
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uint32_t /* group_z */
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);
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typedef void (*vx_spawn_tasks_cb)(int task_id, void *arg);
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typedef void (*vx_serial_cb)(void *arg);
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void vx_spawn_kernel(context_t * ctx, vx_spawn_kernel_cb callback, void * arg);
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void vx_spawn_tasks(int num_tasks, vx_spawn_tasks_cb callback, void * arg);
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void vx_serial(vx_serial_cb callback, void * arg);
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#ifdef __cplusplus
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}
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#endif
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#endif
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