Removed all comments labelled \'simx64\'
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@@ -123,7 +123,6 @@ void Warp::execute(const Instr &instr, pipeline_trace_t *trace) {
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for (int t = 0; t < num_threads; ++t) {
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if (!tmask_.test(t))
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continue;
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// simx64
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rddata[t] = (immsrc << 12) & 0xfffffffffffff000;
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}
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rd_write = true;
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@@ -155,15 +154,13 @@ void Warp::execute(const Instr &instr, pipeline_trace_t *trace) {
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break;
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case 1: {
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// RV32M: MULH
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// simx64
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__int128_t first = sext128((__int128_t)rsdata[t][0], 64);
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__int128_t second = sext128((__int128_t)rsdata[t][1], 64);
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rddata[t] = ((first * second) >> 64) & 0xFFFFFFFFFFFFFFFF;
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trace->alu.type = AluType::IMUL;
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} break;
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case 2: {
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// RV32M: MULHSU
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// simx64
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// RV32M: MULHSU
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__int128_t first = sext128((__int128_t)rsdata[t][0], 64);
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__int128_t second = (__int128_t)rsdata[t][1];
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rddata[t] = ((first * second) >> 64) & 0xFFFFFFFFFFFFFFFF;
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@@ -171,7 +168,6 @@ void Warp::execute(const Instr &instr, pipeline_trace_t *trace) {
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} break;
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case 3: {
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// RV32M: MULHU
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// simx64
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__uint128_t first = (__int128_t)rsdata[t][0];
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__uint128_t second = (__int128_t)rsdata[t][1];
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rddata[t] = ((first * second) >> 64) & 0xFFFFFFFFFFFFFFFF;
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@@ -179,7 +175,6 @@ void Warp::execute(const Instr &instr, pipeline_trace_t *trace) {
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} break;
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case 4: {
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// RV32M: DIV
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// simx64
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DoubleWordI dividen = rsdata[t][0];
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DoubleWordI divisor = rsdata[t][1];
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if (divisor == 0) {
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@@ -193,7 +188,6 @@ void Warp::execute(const Instr &instr, pipeline_trace_t *trace) {
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} break;
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case 5: {
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// RV32M: DIVU
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// simx64
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DoubleWord dividen = rsdata[t][0];
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DoubleWord divisor = rsdata[t][1];
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if (divisor == 0) {
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@@ -205,7 +199,6 @@ void Warp::execute(const Instr &instr, pipeline_trace_t *trace) {
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} break;
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case 6: {
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// RV32M: REM
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// simx64
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DoubleWordI dividen = rsdata[t][0];
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DoubleWordI divisor = rsdata[t][1];
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if (rsdata[t][1] == 0) {
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