rtl refactoring

2020-05-04 20:12:05 -04:00
parent 69f607b73e
commit f142afac80
39 changed files with 31067 additions and 31607 deletions
--- a/hw/rtl/VX_csr_data.v
+++ b/hw/rtl/VX_csr_data.v
@@ -1,6 +1,6 @@
 `include "VX_define.vh"

-module VX_csr_data  #(
+module VX_csr_data #(
    parameter CORE_ID = 0
 ) (
    input wire clk,    // Clock