53 Commits

Author SHA1 Message Date
tinebp
88ed687557 Update .travis.yml 2022-09-30 04:19:53 -04:00
tinebp
ebff870d54 Update .travis.yml 2022-09-30 03:09:35 -04:00
tinebp
d802defd6c Update .travis.yml 2022-09-30 01:44:54 -04:00
Blaise Tine
77002dd06a minor updates 2022-02-05 20:52:23 -05:00
Santosh Srivatsan
1b5b7a3cba Modified travis.yml 2022-02-05 14:45:21 -05:00
Santosh Srivatsan
09833fdfb1 Fixed merge conflict 2022-02-05 14:34:36 -05:00
Santosh Srivatsan
b7e5a83ba3 Merged branch xlen-parameterization into staging 2022-02-05 13:47:42 -05:00
Blaise Tine
bda77760c8 addition bug fixes 2022-02-05 09:14:35 -05:00
Blaise Tine
a06812f93f minor updates 2022-02-01 22:51:33 -05:00
Blaise Tine
d48f1c1c5f minor updates 2022-02-01 06:53:31 -05:00
Santosh Srivatsan
7e3a2fdb0f Modifications to allow 64-bit riscv tests to run on travis CI 2022-01-27 15:55:19 -05:00
Blaise Tine
5d90439a51 travis update 2021-10-17 11:25:57 -07:00
Blaise Tine
170c5d0c8a regression script update 2021-09-08 23:22:50 -04:00
Blaise Tine
53c8cddccf LKG build - minor update 2021-08-30 10:25:52 -07:00
Blaise Tine
cc259f60f6 minor update 2021-08-11 15:39:21 -07:00
Blaise Tine
90fa9eee7d minor update 2021-08-08 18:35:05 -07:00
Blaise Tine
80cf1f26f9 minor update 2021-07-20 14:15:08 -07:00
Blaise Tine
152d807301 parallelizing continious integration 2021-07-20 12:12:11 -07:00
Blaise Tine
c81b1173b8 minor update 2021-05-24 18:20:46 -07:00
Blaise Tine
4cb98a25a7 enabling 128-bit dram bus 2021-04-24 00:31:27 -04:00
Blaise Tine
4aaaebab6e minor update 2021-02-12 10:18:57 -08:00
Blaise Tine
6a6711b735 minor update 2021-02-04 09:11:46 -08:00
Blaise Tine
ba743678dc duplicate load addresses optimization 2021-01-11 01:58:04 -08:00
Blaise Tine
707ba3760f minor update 2020-12-08 21:37:53 -08:00
Blaise Tine
dada72f830 minor update 2020-12-06 15:28:58 -08:00
Blaise Tine
00d7473268 build warnings clean 2020-11-28 14:59:13 -05:00
Blaise Tine
461be0880d fixed FPU-CSR data dependence 2020-11-25 09:05:38 -08:00
Blaise Tine
71b98b166c minor update 2020-11-24 07:10:02 -08:00
Blaise Tine
eb307edd9c minor update 2020-11-23 17:34:06 -08:00
Blaise Tine
f4ed1e97f7 minor update 2020-11-23 12:08:31 -08:00
Blaise Tine
e281d32138 travis timeout workaround 2020-11-22 19:07:46 -08:00
Blaise Tine
f9e1e11dc5 travis timeout workaround 2020-11-22 12:41:58 -08:00
Blaise Tine
20f22c7446 scope minor fix 2020-11-22 11:51:46 -08:00
Blaise Tine
7ae770f4eb config update 2020-11-21 12:27:42 -08:00
Blaise Tine
1795980a52 L2 and L1 using different block size support, RTLsim fixes, dram_rsp_ready optimization 2020-11-21 09:47:56 -08:00
Blaise Tine
a7da36c007 minor update 2020-11-17 03:19:35 -08:00
Blaise Tine
c287b53e01 minor update 2020-11-17 02:26:49 -08:00
Blaise Tine
51cbda6b3f minor update 2020-11-17 00:38:20 -08:00
Blaise Tine
3e1fe66d9e minor update 2020-11-16 08:25:45 -08:00
Blaise Tine
77bca2deca constant integration updates 2020-11-16 02:39:53 -08:00
Blaise Tine
a1fcdd467a reset networks optimization 2020-11-16 01:12:02 -08:00
Blaise Tine
1bc4b8e7a8 constant integration updates, cache bank incoming_fill optimization 2020-11-15 23:01:24 -08:00
Blaise Tine
60f5c15bc8 constant integration update 2020-11-15 23:27:02 -05:00
Blaise Tine
4c73382675 constant integration updates 2020-11-15 11:23:06 -08:00
Blaise Tine
4337146fe9 constant integration updates 2020-11-15 09:18:44 -08:00
Blaise Tine
9a9f7955f0 basic test timing + scope tracing ccip 2020-10-27 17:04:04 -04:00
Blaise Tine
e29c1a543d update CI scripts 2020-09-19 17:00:45 -04:00
Blaise Tine
f6f95e0c46 mutiple fixes: parallel printf, fixed cycle in cache, opencl refactored vecadd and sgemm, regen opencl kernels with hard-float, fixed vortex io bus interface, fixed dpi floats APi to support multicore mode, make vlsim multicore default, make rtlsim multi-core default, removed POCL binaries from repository, updated Makefiles to use external POCL 2020-09-19 14:45:42 -04:00
Blaise Tine
9aa24d3d83 Ci fixes 2020-09-01 15:07:33 -04:00
Blaise Tine
b82f5a9011 fix ci bui;d 2020-09-01 10:45:44 -07:00