|
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0ad87bde81
|
Implement WU architecture support
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2026-05-25 19:25:05 +08:00 |
|
Hansung Kim
|
86deaa8e07
|
Give some slack time for other cores to finish
|
2024-06-12 09:47:21 -07:00 |
|
Richard Yan
|
d624b3e50a
|
store fencing, large smem, fix tensor core for firesim
|
2024-05-15 21:45:48 -07:00 |
|
Richard Yan
|
8de5470da4
|
round robin warp scheduling
|
2024-04-16 23:03:00 -07:00 |
|
Hansung Kim
|
50263a5f7d
|
Rename sched_barrier_stalls -> perf_sched_barrier_idles
Sched stall by barrier is really idle because it causes !scheduler_if.valid,
which is counted as part of sched_idle.
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2024-03-28 22:45:12 -07:00 |
|
Hansung Kim
|
9438862389
|
Add perf counter for barrier schedule stalls
|
2024-03-20 15:29:28 -07:00 |
|
Hansung Kim
|
b25deb8a2e
|
Fix assignment for perf counters
|
2024-03-19 14:06:44 -07:00 |
|
Hansung Kim
|
df4b21507e
|
Customize global barrier response logic for clusters
|
2024-03-18 14:30:32 -07:00 |
|
Hansung Kim
|
2525df9c5f
|
Use GBAR_CLUSTER_ENABLE to guard cluster-specific modification
|
2024-03-17 18:24:04 -07:00 |
|
Blaise Tine
|
38b92ad592
|
- using SV_DPI defines to disable DPI in synthesis-based simulations
- fixed Intel ASE run script: run_ase.sh
|
2024-01-28 00:22:21 -08:00 |
|
Blaise Tine
|
e04e026a14
|
profiling update
minor updates
|
2023-12-18 04:43:44 -08:00 |
|
Blaise Tine
|
c6845a4c8d
|
profiling timing optimization
minor update
minor update
minor update
|
2023-12-18 04:43:10 -08:00 |
|
root
|
900a1efaca
|
BUFFER_EX refactoring
|
2023-12-05 04:55:50 -08:00 |
|
Blaise Tine
|
24973ffca0
|
scoreboard optimization & profiling
|
2023-11-27 05:53:36 -08:00 |
|
Blaise Tine
|
d47cccc157
|
Vortex 2.0 changes:
+ Microarchitecture optimizations
+ 64-bit support
+ Xilinx FPGA support
+ LLVM-16 support
+ Refactoring and quality control fixes
|
2023-10-19 20:51:22 -07:00 |
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