Commit Graph

10 Commits

Author SHA1 Message Date
felsabbagh3
fe09aafbb4 Interface Checkpoint 2 - Remove Lints 2019-09-05 19:32:37 -04:00
felsabbagh3
2d0e41db63 checkpoint: Added icache struct 2019-09-03 16:19:06 -04:00
felsabbagh3
b216da5a6a ram stdint + Quartus Files 2019-06-11 21:13:30 -07:00
felsabbagh3
d7afef04a9 Sim Work miss 2019-05-18 23:42:55 +04:00
felsabbagh3
191ed73415 Less expensive but slower fetch logic 2019-05-05 22:55:47 -04:00
felsabbagh3
166b9ae48d Before Scratchpad 2019-04-05 17:56:05 -04:00
felsabbagh3
99a0792a0c Passing all tests with 2 threads 2019-03-30 03:54:20 -04:00
felsabbagh3
d02c3d25b7 sync 2019-03-27 13:52:13 -04:00
felsabbagh3
cc0fb0eece better use of valid signal 2019-03-27 00:07:59 -04:00
felsabbagh3
7a528c5ef2 Packing data wires + ALU module 2019-03-26 19:17:11 -04:00