Commit Graph

2100 Commits

Author SHA1 Message Date
Santosh Srivatsan
5edb9098ce Merge branch 'simx64' 2021-12-10 21:48:29 -05:00
Santosh Srivatsan
e7bc436b52 Renamed simX to simx 2021-12-10 16:57:29 -05:00
Santosh Srivatsan
be499d6f38 Renamed simX to simx and added 64-bit riscv-tests 2021-12-10 16:56:12 -05:00
Santosh Srivatsan
b8b3405efe Merge branch 'vortexgpgpu-master'
Merged updated codebase with master branch.
2021-12-10 16:41:43 -05:00
Santosh Srivatsan
0e38c39b62 Merge branch 'master' of https://github.com/vortexgpgpu/vortex into vortexgpgpu-master 2021-12-10 16:38:00 -05:00
Santosh Raghav Srivatsan
bde789b320 Added support for RV32D and RV64D instructions 2021-12-10 16:30:24 -05:00
Blaise Tine
d7737542e4 cache uuid support 2021-12-09 20:43:22 -05:00
Blaise Tine
0e2de4f13a prefetch test fixes 2021-12-09 04:54:10 -05:00
Blaise Tine
fb6106267c Merge branch 'master' of https://github.com/vortexgpgpu/vortex 2021-12-09 00:00:28 -05:00
Blaise Tine
5825b7c15a dram simulator fix 2021-12-07 22:44:06 -05:00
Santosh Raghav Srivatsan
e6eda67d0c Modified RV32F instructions to support 64-bit register file and added RV64F ISA extension 2021-12-06 18:55:13 -05:00
Blaise Tine
a9ec1c08a7 minor update 2021-12-06 15:44:25 -05:00
Blaise Tine
9811740ead minor update 2021-12-06 14:34:20 -05:00
Blaise Tine
71ce58500a minor update 2021-12-06 14:09:31 -05:00
Blaise Tine
30d9d3e956 minor update 2021-12-06 13:17:51 -05:00
Blaise Tine
b741807f8c using ramulator dram simulator 2021-12-06 01:22:45 -05:00
Santosh Raghav Srivatsan
30a0d34151 Fixed Makefile 2021-12-05 15:55:43 -05:00
Blaise Tine
59232642c4 Merge branch 'master' of https://github.gatech.edu/casl/Vortex 2021-12-02 10:34:11 -08:00
Blaise Tine
38f166f090 texture unit hardware optimizations 2021-12-02 10:22:21 -08:00
Santosh Raghav Srivatsan
3784da0d2f riscv-tests work on simx 2021-12-01 19:41:16 -05:00
Blaise Tine
189cec3ca2 minor update 2021-12-01 10:36:50 -05:00
Santosh Raghav Srivatsan
f0dc04ad04 Added tests to commit. 64 bit simx still not working 2021-12-01 02:44:14 -05:00
Blaise Tine
092ff42ab4 simx multicore fix 2021-12-01 00:12:16 -05:00
Blaise Tine
4477cbeed1 blackbox caching fix 2021-11-30 15:36:59 -05:00
Blaise Tine
7c4b3cab29 adding cocogfx 2021-11-30 14:26:54 -05:00
Blaise Tine
d4cb3b8410 removed cocogfx 2021-11-30 14:24:34 -05:00
Blaise Tine
d4addc65ab minor update 2021-11-30 08:55:40 -05:00
Blaise Tine
2a7a4df342 simx directory name fix 2021-11-30 07:17:58 -05:00
Blaise Tine
41d7e6c63a cummulative fixes, RTL uuid trace, texture unit fixes, simx timing fixes 2021-11-30 07:08:15 -05:00
Santosh Raghav Srivatsan
28ab94e925 Added isa tests 2021-11-27 12:37:29 -05:00
Santosh Raghav Srivatsan
a48a78088c Added 64 bit basic test 2021-11-27 12:36:26 -05:00
Santosh Raghav Srivatsan
64d47f3637 Added support for RV64I instructions 2021-11-27 12:33:30 -05:00
Blaise Tine
b995843a5b cocogfx fixes and refactoring 2021-11-25 13:58:09 -05:00
Blaise Tine
a671e1a05d moving submodules into third_party folder 2021-11-24 18:10:00 -05:00
Blaise Tine
d25fa21a59 adding cocogfx submodule 2021-11-24 18:03:09 -05:00
Blaise Tine
18762dffce fixes: texture unit mem access sometimes going to smem, bilinear texture filtering; new: cache req_id, 2021-11-24 00:00:17 -05:00
Blaise Tine
1501360f4b minor update 2021-11-14 09:06:13 -05:00
Blaise Tine
27a65fdee7 driver refactoring 2021-11-14 09:05:15 -05:00
Blaise Tine
808bddb586 simx timing simulation refactoring 2021-11-14 08:52:34 -05:00
Blaise Tine
9656779d48 minor update 2021-11-14 04:45:06 -05:00
Blaise Tine
bd70afa688 cache multi-porting fix - ensure per-bank uniform rw 2021-11-14 04:44:25 -05:00
Blaise Tine
c2721fd545 SimX timing simulation 2021-11-13 01:41:12 -05:00
Santosh Raghav Srivatsan
d1892bd6ec Added support for a few RV64I instructions 2021-11-11 13:35:14 -05:00
Santosh Raghav Srivatsan
9cd8dec397 Extended register file to 64 bits 2021-11-08 17:54:16 -05:00
Santosh Raghav Srivatsan
8a550b625c Merge branch 'master' of https://github.com/SantoshSrivatsan24/vortex 2021-11-08 16:35:32 -05:00
Santosh Raghav Srivatsan
ad633aa639 Added prefetch test to commit 2021-11-08 16:32:52 -05:00
tinebp
d64bc880b2 Merge pull request #26 from SantoshSrivatsan24/assignment5
Added tests for prefetch
2021-10-19 18:56:38 -04:00
tinebp
007b10e79c Merge branch 'master' into assignment5 2021-10-19 18:54:09 -04:00
Santosh Raghav Srivatsan
620ec78cc0 Updated Makefile to include tests for software prefetch 2021-10-19 18:47:37 -04:00
Santosh Raghav Srivatsan
d219e29f0c Added tests for prefetch 2021-10-19 17:56:58 -04:00