Blaise Tine
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700f9eea19
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moving MUL unit into ALU unit
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2021-02-23 13:49:02 -08:00 |
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Blaise Tine
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ab63ac9e5d
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cache request interfaces update
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2021-02-10 20:55:04 -08:00 |
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Blaise Tine
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fcbf57b66a
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specialized shared memory module
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2021-01-16 04:41:58 -08:00 |
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Blaise Tine
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7c4823e65c
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fixed GPR reset bug, fixed lsu dup loading, fixed riscv-tests
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2021-01-11 23:55:09 -08:00 |
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Blaise Tine
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06945533cf
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fixed l2/l3 caches related bugs
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2021-01-09 16:32:55 -08:00 |
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Blaise Tine
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9cef1aae04
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cache fill response address is the mshr's top address, no need to store it
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2021-01-03 00:57:24 -05:00 |
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Blaise Tine
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2d69ca5d67
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scratchpad optimization for stack access using custom bank offset aligned to stack size
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2021-01-02 16:00:00 -05:00 |
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Blaise Tine
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30d950ada2
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vx_spawn_warps redesign using opencl's style scheduler
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2021-01-01 14:13:48 -05:00 |
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Blaise Tine
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138db29310
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Merge branch 'master' of https://github.gatech.edu/casl/Vortex
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2020-12-31 22:40:34 -05:00 |
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Blaise Tine
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e4a00dd0d9
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fixed loader script stack setup
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2020-12-31 22:37:20 -05:00 |
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Blaise Tine
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abe32ed553
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cache optimization - moved read requests to stage1 and eliminating stage3
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2020-12-31 07:40:58 -08:00 |
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Blaise Tine
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703a861fe9
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added support for write-through cache, removed cache snooping support
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2020-12-23 23:51:02 -08:00 |
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Blaise Tine
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d5438fd591
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merging perf counters
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2020-12-08 21:02:39 -08:00 |
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Blaise Tine
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268ad15098
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minor update
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2020-12-06 22:55:17 -08:00 |
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Blaise Tine
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1332970636
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refactoring cores clustering
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2020-12-06 14:42:12 -08:00 |
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Blaise Tine
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b2652527bb
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data/dram bus refactoring
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2020-12-06 03:37:22 -08:00 |
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Blaise Tine
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f3b1069ce8
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adding stream arbiter
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2020-12-03 06:40:23 -08:00 |
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Blaise Tine
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20f22c7446
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scope minor fix
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2020-11-22 11:51:46 -08:00 |
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Blaise Tine
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1795980a52
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L2 and L1 using different block size support, RTLsim fixes, dram_rsp_ready optimization
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2020-11-21 09:47:56 -08:00 |
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Blaise Tine
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5d58bf3d11
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fixed l3cache hang using memory arbiter in afu
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2020-11-15 06:36:32 -08:00 |
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Blaise Tine
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10505caae1
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refactoring all arbiters with buffering for request count > 2, optimized the cache core response module in critical path when running as L2
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2020-11-08 01:31:46 -08:00 |
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Blaise Tine
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43ae82e788
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vlsim fix, verilator fst trace, use ram optimization
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2020-10-25 16:40:50 -07:00 |
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Blaise Tine
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4e1007e5b2
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scope refactoring
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2020-10-03 18:53:21 -04:00 |
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Blaise Tine
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42e3b6c45d
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fixed lmp_mult parameters, ram init filepath
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2020-09-04 07:51:46 -07:00 |
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Blaise Tine
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df711986bc
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FPU DPI fallback
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2020-08-31 09:19:55 -04:00 |
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Blaise Tine
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0a0b28aac0
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minor update - 206-214 mhz
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2020-08-29 05:14:08 -07:00 |
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Blaise Tine
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ee81e81818
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adding using serial divider to save area cost
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2020-08-25 02:29:27 -07:00 |
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Blaise Tine
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57971f6c76
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decode op_mod optimization
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2020-08-24 02:55:14 -07:00 |
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Blaise Tine
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0b355f228e
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ibuffer addition
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2020-08-22 00:22:04 -07:00 |
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Blaise Tine
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6c12391338
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pipeline refactoring - fmax >= 222 mhz
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2020-08-14 21:50:14 -07:00 |
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Blaise Tine
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65415d2bbc
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getting dogfood tests passing on Verilator!
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2020-08-09 18:13:12 -04:00 |
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Blaise Tine
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cd29362d10
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fixed FPU handshake, optimized writeback's critical path
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2020-08-07 10:11:54 -07:00 |
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Blaise Tine
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ffd9515881
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added altera fpu modules
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2020-08-05 15:53:59 -07:00 |
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Blaise Tine
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31ee824862
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merged fpu_port branch
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2020-07-31 17:13:22 -04:00 |
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Blaise Tine
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836a735555
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minor updates
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2020-07-31 13:39:52 -07:00 |
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Blaise Tine
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c9755a0c48
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lkg build with pipeline + FPU fixes
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2020-07-31 09:29:44 -04:00 |
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Blaise Tine
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27e95530ef
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pipeline optimization
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2020-07-30 03:06:01 -07:00 |
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Blaise Tine
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c2dd0a8b39
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modelsim fixes && pipeline optimization
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2020-07-28 14:20:23 -07:00 |
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Blaise Tine
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6a9504422f
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minor update
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2020-07-28 05:52:28 -04:00 |
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Blaise Tine
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e0a9089647
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floating point support fixes
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2020-07-27 16:01:56 -04:00 |
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Blaise Tine
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ff12393998
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floating point support fixes
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2020-07-27 04:53:13 -04:00 |
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Blaise Tine
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7c86b68977
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pipeline refactoring: centralized issue buffer
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2020-07-26 11:21:08 -04:00 |
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Blaise Tine
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1f63f9da25
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new fpu implementation
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2020-07-24 00:00:37 -04:00 |
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Blaise Tine
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ff7f65bd1f
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opae build fixes
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2020-07-21 05:44:13 -07:00 |
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Blaise Tine
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e2100e9e87
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pipeline refactoring
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2020-07-20 09:38:54 -04:00 |
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Blaise Tine
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577a5791dc
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pipeline refactoring
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2020-07-20 08:04:04 -04:00 |
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Blaise Tine
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25f66e6490
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pipeline refactoring
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2020-07-19 05:03:47 -04:00 |
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Blaise Tine
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77c3b2d45f
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lsu_unit refactoring to reduce critical path
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2020-07-10 11:23:34 -07:00 |
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Blaise Tine
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83a1695c73
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OPAE CSR access
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2020-06-30 18:14:06 -07:00 |
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Blaise Tine
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f66c251309
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minor update
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2020-06-29 15:09:14 -07:00 |
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