Blaise Tine
c1e168fdbe
Vortex 2.0 changes:
...
+ Microarchitecture optimizations
+ 64-bit support
+ Xilinx FPGA support
+ LLVM-16 support
+ Refactoring and quality control fixes
minor update
minor update
minor update
minor update
minor update
minor update
cleanup
cleanup
cache bindings and memory perf refactory
minor update
minor update
hw unit tests fixes
minor update
minor update
minor update
minor update
minor update
minor udpate
minor update
minor update
minor update
minor update
minor update
minor update
minor update
minor updates
minor updates
minor update
minor update
minor update
minor update
minor update
minor update
minor updates
minor updates
minor updates
minor updates
minor update
minor update
2023-11-10 02:47:05 -08:00
Blaise Tine
1bd25acb0b
cmov
2022-02-05 17:58:12 -05:00
Santosh Srivatsan
b7e5a83ba3
Merged branch xlen-parameterization into staging
2022-02-05 13:47:42 -05:00
Blaise Tine
140124b423
additional bug fixes
2022-02-05 07:42:50 -05:00
Blaise Tine
5fbace9fa0
fixed several bugs and refactor memory access
2022-02-04 17:50:19 -05:00
Blaise Tine
cf2a0a5f39
code refactoring
2022-02-04 00:07:24 -05:00
Santosh Srivatsan
836c777680
XLEN parameterization for simx
2022-02-03 15:19:31 -05:00
Santosh Srivatsan
01d183c6a9
Removed xlen.h
2022-02-01 13:59:39 -05:00
Santosh Srivatsan
3eb2b71955
removed traces of xlen. Overloaded sext
2022-02-01 13:54:51 -05:00
Santosh Srivatsan
a73f656d06
Minor bug fixes
2022-01-31 17:01:14 -05:00
Santosh Srivatsan
4cf596338d
Minor bug fixes
2022-01-31 15:53:49 -05:00
Santosh Srivatsan
7aa93a735d
Added FLEN parameterization for RV32/64 F and D instructions
2022-01-24 15:42:15 -05:00
Santosh Srivatsan
91c22a2592
Fixed some riscv-tests
2022-01-22 12:54:10 -05:00
Blaise Tine
29df0da8b5
minor warning fixes
2022-01-10 20:33:37 -05:00
Santosh Srivatsan
f93303bac7
Minor update
2021-12-15 17:21:38 -05:00
Santosh Srivatsan
b1e82223ee
Renamed rv_f* functions to rvf*_s to follow the naming convention between single and double precision floating point
2021-12-13 20:37:29 -05:00
Santosh Srivatsan
885bb58ca9
Merged RV64IMFD extensions to master branch
2021-12-11 17:06:29 -05:00
Santosh Srivatsan
3324b32a29
Moved Dockerfile to miscs
2021-12-10 21:54:41 -05:00
Santosh Srivatsan
5edb9098ce
Merge branch 'simx64'
2021-12-10 21:48:29 -05:00
Santosh Raghav Srivatsan
bde789b320
Added support for RV32D and RV64D instructions
2021-12-10 16:30:24 -05:00
Blaise Tine
5825b7c15a
dram simulator fix
2021-12-07 22:44:06 -05:00
Santosh Raghav Srivatsan
e6eda67d0c
Modified RV32F instructions to support 64-bit register file and added RV64F ISA extension
2021-12-06 18:55:13 -05:00
Blaise Tine
b741807f8c
using ramulator dram simulator
2021-12-06 01:22:45 -05:00
Blaise Tine
41d7e6c63a
cummulative fixes, RTL uuid trace, texture unit fixes, simx timing fixes
2021-11-30 07:08:15 -05:00
Santosh Raghav Srivatsan
64d47f3637
Added support for RV64I instructions
2021-11-27 12:33:30 -05:00
Blaise Tine
b995843a5b
cocogfx fixes and refactoring
2021-11-25 13:58:09 -05:00
Blaise Tine
a671e1a05d
moving submodules into third_party folder
2021-11-24 18:10:00 -05:00
Blaise Tine
18762dffce
fixes: texture unit mem access sometimes going to smem, bilinear texture filtering; new: cache req_id,
2021-11-24 00:00:17 -05:00
Blaise Tine
27a65fdee7
driver refactoring
2021-11-14 09:05:15 -05:00
Blaise Tine
808bddb586
simx timing simulation refactoring
2021-11-14 08:52:34 -05:00
Blaise Tine
c2721fd545
SimX timing simulation
2021-11-13 01:41:12 -05:00
Blaise Tine
48b2238a1f
adding rvfloats library
2021-10-10 13:26:11 -07:00
Blaise Tine
b8682f56ac
softfloat library integration
2021-10-10 13:20:50 -07:00
Blaise Tine
54bddeee9c
simulation framework refactoring
2021-10-09 10:20:42 -04:00
