Blaise Tine
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3cc1190cd7
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CSRs I/O refactoring
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2021-06-11 03:08:07 -07:00 |
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Blaise Tine
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b3e54e66f8
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fixed compiler warnings
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2021-05-23 10:54:06 -07:00 |
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Blaise Tine
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95f057bc2e
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fpga build refactoring
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2021-04-29 06:17:28 -07:00 |
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Blaise Tine
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8410c49f53
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code refactoring: DRAM => MEM renaming
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2021-04-26 00:58:48 -07:00 |
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Blaise Tine
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0615e7481a
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minor update
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2021-04-24 03:06:24 -04:00 |
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Blaise Tine
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4cb98a25a7
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enabling 128-bit dram bus
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2021-04-24 00:31:27 -04:00 |
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Blaise Tine
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66ea340d05
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Fix RAM memory deallocation
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2021-03-09 01:52:56 -08:00 |
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Blaise Tine
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907e6868cd
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simx refactoring, fixed simple.hex, compatibility with rtlsim and vlsim complete, added to regression suite
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2021-03-08 23:58:33 -08:00 |
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Blaise Tine
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062d02ddce
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Merge branch 'master' of https://github.gatech.edu/casl/Vortex
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2021-03-04 20:51:03 -08:00 |
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Blaise Tine
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a8452483fe
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simX refactoring
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2021-02-27 02:27:19 -08:00 |
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Blaise Tine
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6c1dc96626
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simX refactoring + removed oldRTL + CSR updates
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2021-02-06 12:52:54 -08:00 |
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Blaise Tine
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5419859281
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fcvt fix
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2021-01-25 02:22:00 -08:00 |
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Blaise Tine
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5c83c594c1
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minor update
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2021-01-07 17:25:59 -08:00 |
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Blaise Tine
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146c285aa0
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minor update
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2021-01-06 19:59:04 -08:00 |
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Blaise Tine
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2b8435471a
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speeding up simulation using dedicated full dpi-based FPU core
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2021-01-06 18:44:06 -08:00 |
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Blaise Tine
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e4a00dd0d9
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fixed loader script stack setup
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2020-12-31 22:37:20 -05:00 |
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Blaise Tine
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703a861fe9
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added support for write-through cache, removed cache snooping support
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2020-12-23 23:51:02 -08:00 |
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Blaise Tine
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d5438fd591
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merging perf counters
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2020-12-08 21:02:39 -08:00 |
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Xandy Liu
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1595ff08e2
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PERF pipeline stalls and cache
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2020-12-08 01:14:41 -05:00 |
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Blaise Tine
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b85391389b
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rename MSRQ to MSHR
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2020-11-28 17:32:00 -05:00 |
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Blaise Tine
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00d7473268
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build warnings clean
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2020-11-28 14:59:13 -05:00 |
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Blaise Tine
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461be0880d
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fixed FPU-CSR data dependence
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2020-11-25 09:05:38 -08:00 |
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Blaise Tine
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c04d385641
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minor update
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2020-11-23 20:12:04 -08:00 |
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Blaise Tine
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20f22c7446
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scope minor fix
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2020-11-22 11:51:46 -08:00 |
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Blaise Tine
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1795980a52
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L2 and L1 using different block size support, RTLsim fixes, dram_rsp_ready optimization
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2020-11-21 09:47:56 -08:00 |
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Blaise Tine
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34b650be94
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fixed shared memory addressing critical path, fixed VX_fp_noncomp output bug
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2020-11-17 00:27:24 -08:00 |
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Blaise Tine
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61add25d96
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minor fix
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2020-11-16 08:23:16 -08:00 |
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Blaise Tine
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77bca2deca
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constant integration updates
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2020-11-16 02:39:53 -08:00 |
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Blaise Tine
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e946d976e7
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constant integration updates
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2020-11-15 08:44:57 -08:00 |
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Blaise Tine
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5d58bf3d11
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fixed l3cache hang using memory arbiter in afu
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2020-11-15 06:36:32 -08:00 |
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Blaise Tine
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ce95c40aee
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fixed redundant cache fills
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2020-11-11 12:07:27 -05:00 |
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Blaise Tine
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5be1d85648
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cache refactoring (fixed redundant fill requests, merged fill and writeback queues), optimized priority encoder, fixed crs cycles count
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2020-11-02 01:50:12 -08:00 |
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Blaise Tine
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4bd5ee2673
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fixed rtlsim regression
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2020-10-26 12:59:58 -04:00 |
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Blaise Tine
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4e1007e5b2
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scope refactoring
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2020-10-03 18:53:21 -04:00 |
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Blaise Tine
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f6f95e0c46
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mutiple fixes: parallel printf, fixed cycle in cache, opencl refactored vecadd and sgemm, regen opencl kernels with hard-float, fixed vortex io bus interface, fixed dpi floats APi to support multicore mode, make vlsim multicore default, make rtlsim multi-core default, removed POCL binaries from repository, updated Makefiles to use external POCL
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2020-09-19 14:45:42 -04:00 |
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Blaise Tine
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fba2fa03c7
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fixed new AFU Driver bugs - now functional
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2020-09-09 17:05:48 -04:00 |
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Blaise Tine
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0fab1ddd92
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adding support for verilator-driven AFU driver: vlsim
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2020-09-08 13:05:26 -04:00 |
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Blaise Tine
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ce29f57d0c
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minor update
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2020-09-04 07:14:30 -04:00 |
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Blaise Tine
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112d8ab815
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adding CSR support to rtlsim driver
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2020-09-04 06:51:31 -04:00 |
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Blaise Tine
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c63217f67d
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fixed SCOPE interface
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2020-09-01 05:20:13 -07:00 |
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Blaise Tine
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df711986bc
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FPU DPI fallback
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2020-08-31 09:19:55 -04:00 |
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Blaise Tine
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e54425404e
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fixed driver unrsolved dependencies
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2020-08-27 06:41:40 -04:00 |
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Blaise Tine
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0b355f228e
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ibuffer addition
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2020-08-22 00:22:04 -07:00 |
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Blaise Tine
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65415d2bbc
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getting dogfood tests passing on Verilator!
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2020-08-09 18:13:12 -04:00 |
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Blaise Tine
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b8cd3b0b28
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gpr pipeline optimization
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2020-08-01 12:38:30 -04:00 |
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Blaise Tine
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31ee824862
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merged fpu_port branch
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2020-07-31 17:13:22 -04:00 |
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Blaise Tine
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c2dd0a8b39
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modelsim fixes && pipeline optimization
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2020-07-28 14:20:23 -07:00 |
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Blaise Tine
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8976100025
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floating point support fixes
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2020-07-28 04:19:46 -04:00 |
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Blaise Tine
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7c86b68977
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pipeline refactoring: centralized issue buffer
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2020-07-26 11:21:08 -04:00 |
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Blaise Tine
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ff7f65bd1f
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opae build fixes
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2020-07-21 05:44:13 -07:00 |
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