Santosh Srivatsan
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b23a9c76e7
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Changed run-simx-32imf to run-simx to comply with the rest of the code
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2022-02-01 13:26:41 -05:00 |
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Santosh Srivatsan
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0ce51df108
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Removed simx64 comments
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2022-02-01 13:25:26 -05:00 |
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Blaise Tine
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d48f1c1c5f
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minor updates
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2022-02-01 06:53:31 -05:00 |
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Santosh Srivatsan
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a73f656d06
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Minor bug fixes
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2022-01-31 17:01:14 -05:00 |
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Santosh Srivatsan
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4cf596338d
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Minor bug fixes
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2022-01-31 15:53:49 -05:00 |
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Blaise Tine
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e3e2609f7e
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adding unit test for vx_malloc
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2022-01-30 05:57:18 -05:00 |
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Blaise Tine
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3750c672a7
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Makefiles update
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2022-01-30 00:26:55 -05:00 |
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Blaise Tine
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f7887d8720
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refactoring device memory allocation and cleanup
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2022-01-28 21:57:16 -05:00 |
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Santosh Srivatsan
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7e3a2fdb0f
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Modifications to allow 64-bit riscv tests to run on travis CI
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2022-01-27 15:55:19 -05:00 |
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Santosh Srivatsan
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7aa93a735d
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Added FLEN parameterization for RV32/64 F and D instructions
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2022-01-24 15:42:15 -05:00 |
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Santosh Srivatsan
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ad92c09f5b
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Changed all instances of DWord to XWord and DWordI to XWordI. Added XLEN parameterization to the simx Makefile
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2022-01-22 13:47:44 -05:00 |
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Santosh Srivatsan
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91c22a2592
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Fixed some riscv-tests
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2022-01-22 12:54:10 -05:00 |
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tinebp
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d3c65edcf5
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Update README.md
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2022-01-21 13:18:19 -05:00 |
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Santosh Srivatsan
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d762d401cd
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Added 64-bit linker script
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2022-01-11 17:22:16 -05:00 |
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Blaise Tine
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29df0da8b5
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minor warning fixes
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2022-01-10 20:33:37 -05:00 |
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Santosh Srivatsan
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d7e2a6b3b1
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Minor update
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2021-12-18 16:27:29 -05:00 |
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Santosh Srivatsan
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a9e3104ce1
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Removed ramulator log from tests/riscv/isa
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2021-12-15 17:30:12 -05:00 |
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Santosh Srivatsan
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f93303bac7
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Minor update
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2021-12-15 17:21:38 -05:00 |
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Santosh Srivatsan
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71acf4eadb
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Changed instruction size from wsize() * 4 to wsize() * 8
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2021-12-13 20:42:44 -05:00 |
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Santosh Srivatsan
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d8796efd89
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Minor update
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2021-12-13 20:39:40 -05:00 |
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Santosh Srivatsan
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b1e82223ee
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Renamed rv_f* functions to rvf*_s to follow the naming convention between single and double precision floating point
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2021-12-13 20:37:29 -05:00 |
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Santosh Srivatsan
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039f5eb733
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Moved 64-bit riscv-tests to tests/riscv/isa from tests/riscv/isa64
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2021-12-13 20:21:51 -05:00 |
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Santosh Srivatsan
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d14e05e748
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Removed all instances of my username \'ssrivatsan8\' and un-did the changes to vx_start.S
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2021-12-13 20:01:11 -05:00 |
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Santosh Srivatsan
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76eb79d7fa
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Removed pipeline.cpp
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2021-12-13 19:57:47 -05:00 |
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Santosh Srivatsan
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4abfca4cb2
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Replaced all instanced of DoubleWord to DWord and DoubleWordI to DWordI
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2021-12-13 19:55:02 -05:00 |
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Santosh Srivatsan
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e82d5fe48f
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Removed all comments labelled \'simx64\'
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2021-12-13 19:52:13 -05:00 |
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Santosh Srivatsan
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67daa6e616
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Minor update
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2021-12-11 17:58:31 -05:00 |
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Santosh Srivatsan
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427146d59b
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Removed 64-bit runtime and regression tests
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2021-12-11 17:20:40 -05:00 |
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Santosh Srivatsan
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885bb58ca9
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Merged RV64IMFD extensions to master branch
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2021-12-11 17:06:29 -05:00 |
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Santosh Srivatsan
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3324b32a29
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Moved Dockerfile to miscs
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2021-12-10 21:54:41 -05:00 |
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Santosh Srivatsan
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5edb9098ce
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Merge branch 'simx64'
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2021-12-10 21:48:29 -05:00 |
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Santosh Srivatsan
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e7bc436b52
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Renamed simX to simx
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2021-12-10 16:57:29 -05:00 |
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Santosh Srivatsan
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be499d6f38
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Renamed simX to simx and added 64-bit riscv-tests
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2021-12-10 16:56:12 -05:00 |
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Santosh Srivatsan
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b8b3405efe
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Merge branch 'vortexgpgpu-master'
Merged updated codebase with master branch.
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2021-12-10 16:41:43 -05:00 |
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Santosh Srivatsan
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0e38c39b62
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Merge branch 'master' of https://github.com/vortexgpgpu/vortex into vortexgpgpu-master
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2021-12-10 16:38:00 -05:00 |
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Santosh Raghav Srivatsan
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bde789b320
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Added support for RV32D and RV64D instructions
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2021-12-10 16:30:24 -05:00 |
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Blaise Tine
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d7737542e4
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cache uuid support
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2021-12-09 20:43:22 -05:00 |
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Blaise Tine
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0e2de4f13a
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prefetch test fixes
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2021-12-09 04:54:10 -05:00 |
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Blaise Tine
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fb6106267c
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Merge branch 'master' of https://github.com/vortexgpgpu/vortex
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2021-12-09 00:00:28 -05:00 |
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Blaise Tine
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5825b7c15a
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dram simulator fix
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2021-12-07 22:44:06 -05:00 |
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Santosh Raghav Srivatsan
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e6eda67d0c
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Modified RV32F instructions to support 64-bit register file and added RV64F ISA extension
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2021-12-06 18:55:13 -05:00 |
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Blaise Tine
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a9ec1c08a7
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minor update
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2021-12-06 15:44:25 -05:00 |
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Blaise Tine
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9811740ead
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minor update
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2021-12-06 14:34:20 -05:00 |
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Blaise Tine
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71ce58500a
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minor update
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2021-12-06 14:09:31 -05:00 |
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Blaise Tine
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30d9d3e956
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minor update
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2021-12-06 13:17:51 -05:00 |
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Blaise Tine
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b741807f8c
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using ramulator dram simulator
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2021-12-06 01:22:45 -05:00 |
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Santosh Raghav Srivatsan
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30a0d34151
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Fixed Makefile
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2021-12-05 15:55:43 -05:00 |
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Blaise Tine
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59232642c4
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Merge branch 'master' of https://github.gatech.edu/casl/Vortex
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2021-12-02 10:34:11 -08:00 |
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Blaise Tine
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38f166f090
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texture unit hardware optimizations
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2021-12-02 10:22:21 -08:00 |
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Santosh Raghav Srivatsan
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3784da0d2f
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riscv-tests work on simx
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2021-12-01 19:41:16 -05:00 |
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