wu-arch/vortex
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f41b50fc07b03d1e6ee91cfecbe6750be61e44f5
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2 Commits

Author SHA1 Message Date
Hansung Kim
f41b50fc07 Define DBG_TRACE_CORE_PIPELINE_VCS for selective debug trace 2023-11-27 16:05:15 -08:00
Blaise Tine
d47cccc157 Vortex 2.0 changes: 
+ Microarchitecture optimizations
+ 64-bit support
+ Xilinx FPGA support
+ LLVM-16 support
+ Refactoring and quality control fixes
 2023-10-19 20:51:22 -07:00