54 lines
927 B
C++
54 lines
927 B
C++
#include "cachesim.h"
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#include <iostream>
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#include <fstream>
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#include <iomanip>
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#define VCD_OUTPUT 1
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int main(int argc, char **argv)
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{
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//init
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RAM ram;
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CacheSim cachesim;
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cachesim.attach_ram(&ram);
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// reset the device
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cachesim.reset();
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//write block to cache
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cachesim.set_core_req();
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for (int i = 0; i < 100; ++i){
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/*if(i == 1){
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cachesim.clear_req();
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}*/
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cachesim.step();
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cachesim.get_core_rsp();
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}
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// read block
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cachesim.set_core_req2();
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for (int i = 0; i < 100; ++i){
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/*if(i == 1){
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//read block from cache
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cachesim.clear_req();
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}*/
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cachesim.step();
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cachesim.get_core_rsp();
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}
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/*
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core_req_t *write;
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write->valid = 1;
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//write.tag = 0xff; //TODO: make a reasonable tag
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//write.addr[0] = 0x11111111;
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//write.addr[1] = 0x22222222;
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//write.addr[2] = 0x33333333;
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//write.addr[3] = 0x44444444;
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//write.
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*/
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return 0;
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}
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