d47cccc157
+ Microarchitecture optimizations + 64-bit support + Xilinx FPGA support + LLVM-16 support + Refactoring and quality control fixes
104 lines
2.9 KiB
C++
104 lines
2.9 KiB
C++
// Copyright © 2019-2023
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#pragma once
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#include <cstdint>
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#include <assert.h>
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constexpr uint32_t count_leading_zeros(uint32_t value) {
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return value ? __builtin_clz(value) : 32;
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}
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constexpr uint32_t count_trailing_zeros(uint32_t value) {
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return value ? __builtin_ctz(value) : 32;
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}
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constexpr bool ispow2(uint32_t value) {
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return value && !(value & (value - 1));
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}
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constexpr uint32_t log2ceil(uint32_t value) {
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return 32 - count_leading_zeros(value - 1);
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}
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inline unsigned log2up(uint32_t value) {
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return std::max<uint32_t>(1, log2ceil(value));
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}
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constexpr unsigned log2floor(uint32_t value) {
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return 31 - count_leading_zeros(value);
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}
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constexpr unsigned ceil2(uint32_t value) {
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return 32 - count_leading_zeros(value);
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}
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inline uint64_t bit_clr(uint64_t bits, uint32_t index) {
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assert(index <= 63);
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return bits & ~(1ull << index);
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}
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inline uint64_t bit_set(uint64_t bits, uint32_t index) {
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assert(index <= 63);
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return bits | (1ull << index);
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}
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inline bool bit_get(uint64_t bits, uint32_t index) {
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assert(index <= 63);
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return (bits >> index) & 0x1;
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}
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inline uint64_t bit_clrw(uint64_t bits, uint32_t start, uint32_t end) {
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assert(end >= start);
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assert(end <= 63);
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uint32_t shift = 63 - end;
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uint64_t mask = (0xffffffffffffffff << (shift + start)) >> shift;
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return bits & ~mask;
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}
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inline uint64_t bit_setw(uint64_t bits, uint32_t start, uint32_t end, uint64_t value) {
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assert(end >= start);
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assert(end <= 63);
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uint32_t shift = 63 - end;
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uint64_t dirty = (value << (shift + start)) >> shift;
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return bit_clrw(bits, start, end) | dirty;
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}
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inline uint64_t bit_getw(uint64_t bits, uint32_t start, uint32_t end) {
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assert(end >= start);
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assert(end <= 63);
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uint32_t shift = 63 - end;
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return (bits << shift) >> (shift + start);
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}
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template <typename T = uint32_t>
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T sext(const T& word, uint32_t width) {
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assert(width > 1);
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assert(width <= (sizeof(T) * 8));
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if (width == (sizeof(T) * 8))
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return word;
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T mask((static_cast<T>(1) << width) - 1);
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return ((word >> (width - 1)) & 0x1) ? (word | ~mask) : (word & mask);
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}
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template <typename T = uint32_t>
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T zext(const T& word, uint32_t width) {
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assert(width > 1);
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assert(width <= (sizeof(T) * 8));
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if (width == (sizeof(T) * 8))
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return word;
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T mask((static_cast<T>(1) << width) - 1);
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return word & mask;
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}
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