d47cccc157
+ Microarchitecture optimizations + 64-bit support + Xilinx FPGA support + LLVM-16 support + Refactoring and quality control fixes
26 lines
760 B
C
26 lines
760 B
C
// Copyright © 2019-2023
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#pragma once
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#ifndef RAM_PAGE_SIZE
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#define RAM_PAGE_SIZE 4096
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#endif
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#ifndef MEM_CYCLE_RATIO
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#define MEM_CYCLE_RATIO -1
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#endif
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#ifndef MEMORY_BANKS
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#define MEMORY_BANKS 2
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#endif |