32 lines
438 B
Systemverilog
32 lines
438 B
Systemverilog
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`include "VX_define.v"
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`ifndef VX_FWD_CSR_RSP
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`define VX_FWD_CSR_RSP
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interface VX_forward_csr_response_inter ();
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/* verilator lint_off UNUSED */
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wire csr_fwd;
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wire[31:0] csr_fwd_data;
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/* verilator lint_on UNUSED */
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// source-side view
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modport snk (
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input csr_fwd,
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input csr_fwd_data
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);
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// source-side view
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modport src (
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output csr_fwd,
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output csr_fwd_data
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);
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endinterface
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`endif |