git-svn-id: http://www.cdkersey.com/harp/harptool@35 0246edb2-e076-4747-b392-db732a341fa2
74 lines
1.8 KiB
C++
74 lines
1.8 KiB
C++
/*******************************************************************************
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HARPtools by Chad D. Kersey, Summer 2011
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*******************************************************************************/
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#ifndef __CORE_H
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#define __CORE_H
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#include <string>
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#include <vector>
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#include "types.h"
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#include "archdef.h"
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#include "enc.h"
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#include "mem.h"
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namespace Harp {
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#ifdef EMU_INSTRUMENTATION
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void reg_doWrite(Word cpuId, Word regNum);
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void reg_doRead(Word cpuId, Word regNum);
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#endif
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template <typename T> class Reg {
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public:
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Reg(): cpuId(0), regNum(0) {}
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Reg(Word c, Word n): cpuId(c), regNum(n) {}
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Reg &operator=(T r) { val = r; doWrite(); return *this; }
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operator T() { doRead(); return val; }
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private:
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Word cpuId, regNum;
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T val;
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#ifdef EMU_INSTRUMENTATION
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/* Access size here is 8, representing the register size of 64-bit cores. */
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void doWrite() { reg_doWrite(cpuId, regNum); }
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void doRead() { reg_doRead(cpuId, regNum); }
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#else
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void doWrite() {}
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void doRead() {}
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#endif
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};
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class Core {
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public:
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Core(const ArchDef &a, Decoder &d, MemoryUnit &mem, Word id=0);
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void step();
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bool interrupt(Word r0);
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bool running() const { return activeThreads; }
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#ifdef EMU_INSTRUMENTATION
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bool getSupervisorMode() const { return supervisorMode; }
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#endif
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private:
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const ArchDef a;
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Decoder &iDec;
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MemoryUnit &mem;
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Word pc, interruptEntry, shadowPc, id;
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Size activeThreads, shadowActiveThreads;
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std::vector<std::vector<Reg<Word> > > reg;
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std::vector<std::vector<Reg<bool> > > pred;
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std::vector<Word> shadowReg;
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std::vector<bool> shadowPReg;
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bool interruptEnable, shadowInterruptEnable, supervisorMode,
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shadowSupervisorMode;
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friend class Instruction;
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};
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};
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#endif
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