c1e168fdbe
+ Microarchitecture optimizations + 64-bit support + Xilinx FPGA support + LLVM-16 support + Refactoring and quality control fixes minor update minor update minor update minor update minor update minor update cleanup cleanup cache bindings and memory perf refactory minor update minor update hw unit tests fixes minor update minor update minor update minor update minor update minor udpate minor update minor update minor update minor update minor update minor update minor update minor updates minor updates minor update minor update minor update minor update minor update minor update minor updates minor updates minor updates minor updates minor update minor update
45 lines
913 B
Makefile
45 lines
913 B
Makefile
XLEN ?= 32
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RTLSIM_DIR = ../../sim/rtlsim
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CXXFLAGS += -std=c++11 -Wall -Wextra -pedantic -Wfatal-errors
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CXXFLAGS += -I../include -I../common -I../../hw -I$(RTLSIM_DIR) -I$(RTLSIM_DIR)/../common
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CXXFLAGS += -DXLEN_$(XLEN)
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# Position independent code
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CXXFLAGS += -fPIC
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# Add external configuration
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CXXFLAGS += $(CONFIGS)
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# Dump perf stats
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CXXFLAGS += -DDUMP_PERF_STATS
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LDFLAGS += -shared -pthread
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LDFLAGS += -L. -lrtlsim
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SRCS = vortex.cpp ../common/utils.cpp
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# Debugigng
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ifdef DEBUG
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CXXFLAGS += -g -O0
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else
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CXXFLAGS += -O2 -DNDEBUG
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endif
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# Enable perf counters
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ifdef PERF
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CXXFLAGS += -DPERF_ENABLE
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endif
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PROJECT = libvortex.so
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all: $(PROJECT)
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$(PROJECT): $(SRCS)
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DESTDIR=../../runtime/rtlsim $(MAKE) -C $(RTLSIM_DIR) ../../runtime/rtlsim/librtlsim.so
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$(CXX) $(CXXFLAGS) $(SRCS) $(LDFLAGS) -o $(PROJECT)
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clean:
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DESTDIR=../../runtime/rtlsim $(MAKE) -C $(RTLSIM_DIR) clean
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rm -rf $(PROJECT) *.o
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