Files
vortex/hw/syn/quartus/project.sdc
2020-06-19 09:12:07 -07:00

10 lines
194 B
Tcl

set_time_format -unit ns -decimal_places 3
create_clock -name {clk} -period "250 MHz" -waveform { 0.0 1.0 } [get_ports {clk}]
derive_pll_clocks -create_base_clocks
derive_clock_uncertainty